Understanding DDR4 and Today s DRAM Frontier. Oct 15 th 2014

Transcription

1 Understanding DDR4 and Today s DRAM Frontier Oct 15 th 2014

2 Contents 1. Industry Trend 2. Introduction of DDR4 3. New Technology Node 4. 3D Stacking Technology 5. What s coming Next 2/32

3 DRAM Market & Application 47% of DRAM for Server and PC application Server (15%) Mainframe Supercomputer Server Workstation Desktop Notebook PC (32%) Mobile (25%) Tablet Smart Phone Cellular Phone Mini laptop EDP (Electronic Data Processing) Industrial 7% Military Consumer & Gfx (21%) TV/ LCD/ Printer Set-top box/ D.Camera Navigation/ Black Box Gfx card / Video Game Aerospace Home Appliance Source : Gartner( 14.1Q) 3/32

4 Server Application Trend Memory RAS and Low TCO are required for server Server Virtualization Moving to Cloud Big Data Source : Gartner( 14.1Q) Low TCO Enhanced RAS High Performance Operating voltage Stand-by power Core & I/O power Better S/I Reinforced resiliency High bandwidth Better efficiency 4/32

5 Client Application Trend Mobility and small form factor are key index Smart Phone & Tablet 2-in-1 Ultrabook Traditional NB AIO/NUC Mobility PC like Experience Longer Battery Life Small Form Factor Better Experience Operating voltage Stand-by power Core & I/O power Limited real estate High capacity DRAM High bandwidth Better efficiency 5/32

6 High Capacity High Performance/Watt High Reliability But Low Cost 6/32

7 4 th Generation of DDR SDRAM Successor of DDR3 from 2014 supporting all Computing system GDDR GDDR2 GDDR3 GDDR4 GDDR5 C:\> PC DDR DDR2 DDR3 DDR4 MDDR MDDR2 LPDDR3 LPDDR4 7/32

8 DDR4 Fully Addresses Industry Requirements Key Market Needs & How DDR4 Meets Them X2 Bandwidth with Lower Power Evolutionary path Better Resources Up to 3.2Gbps with more coming 20~40% power savings with power features Single-ended Same clocking (Source Synchronous) Double banks Higher density (up to 16Gb/mono, 128Gb/3DS) Lower Power Consumption +5 Power savings (Voltage/IO/Features) Greater Reliability +6 RAS features Low Cost Keep 8 bit prefetch Bank grouping 8/32

9 Contents 1. Industry Trend 2. Introduction of DDR4 3. New Technology Node 4. 3D Stacking Technology 5. What s coming Next 9/32

10 DDR4 Feature Summary DDR4 has advanced features over DDR3 Spec items DDR3 DDR4 Density / Speed Voltage (VDD/VDDQ/VPP) 512Mb~4Gb 0.8~1.8Gbps 1.5V/1.5V/NA (1.35V/1.35V/NA) 4Gb~16Gb 1.6~3.2Gbps 1.2V/1.2V/2.5V Interface Data IO CTT (34ohm) POD (34ohm) Vref_DQ External Vref (VDD/2) Internal Vref (need training) CMD/ADDR IO CTT CTT Strobe Bi-dir / diff Bi-dir / diff # of banks 8Banks 16Banks (4Bank Group) Core architecture Page size(x4/8/16) 1KB / 1KB / 2KB 512B / 1KB / 2KB # of prefetch 8bits 8bits Added functions RESET/ZQ/Dynamic ODT + 3DS/CRC/DBI/Multi preamble Package type/balls (X4,8/X16) 78 / 96 BGA 78 / 96 BGA Physical DIMM type R, LR, U, SoDIMM DIMM Capacity 512MB to 64GB 8GB to 256GB DIMM pins 240 (R,LR,U) / 204 (So) 288 (R,LR,U) / 260 (So) 10/32

11 Advanced Features for Performance Advanced features to increase system performance 2x Bandwidth of DDR4 versus DDR3 B/W(Mbps) DDR3 800~1600 DDR4 1600~3200 No interleaving delay w/ Bank group DDR3 trrd DDR4 DDR3 4nCK 5nCK(1bubble) DDR4 16Banks(4BG) 1 DDR3_ % 1.16 DDR4_1866 tfaw limit-free of DDR4 : DDR4 512B page vs. DDR3 1KB page DDR3 DDR tfaw tfaw * tfaw : Four Active Window CMD Set DDR4 Platform Benefits DDR3 Platform* DDR4 12C Max Cores 18C AVX(128b) Vector Inst. AVX2(256b) 8.0GT/s QPI 9.6GT/s * DDR3 13 SV Platform, DDR4 14 SV Platform 11/32

12 System Performance Comparison Platform using DDR4 offers better performance More benefit for the application requiring high capacity(multi DPC) 1DPC 2DPC 3DPC Max 42% Better Max 45% Better Max 65% Better 42% 45% 65% DDR3L 1600M DDR4 2133M DDR3L 1333M DDR4 1867M DDR3L 800M DDR4 1600M Source : Samsung SPEC_CPU Benchmark/DDR3L 1.35V vs. DDR4 1.2V/2Rank 16GB 12/32

13 Power Reduction of Core and I/O Operating voltage is decreased from 1.5V(1.35V) to 1.2V POD(Pseudo Open Drain) reduces I/O power Continuous decreasing of VDD - DDR4 1.2V, P V 2 POD Interface : half of I/O power DDR3 SSTL Interface *SSTL : Stub Series Terminated Logic Term. DDR4 POD Interface Term. Power Consumption 13/32

14 Efficient Power Consumption DDR4 is about 20% more power efficient against DDR3 1DPC 2DPC 26% Power Efficient 20% Power Efficient [Performance/watt] [Performance/watt] 26% 20% DDR3 1600M DDR4 2133M DDR3 1333M DDR4 1867M * Measured under controller s POR condition w/ 2Rank 16GB RDIMM Source : Samsung Power Benchmark/DDR3L 1.35V vs. DDR4 1.2V 14/32

15 Features for High Reliability DDR4 supports Write CRC and CA Parity for high reliability Write CRC helps to recognize multi-bits failures during transmission DDR4 can prevent mal-operation by CMD/ADD error DDR3 x Data x x Wrong data will be written to DRAM Controller DDR3 DDR4 x Data x x C R C Data or Register Parity for CMD/ADD DDR4 CRC check & re-request x Failed data during data transmission * Once parity error occurs, DDR4 request CMD/ADD set again *CRC : Cyclic Redundancy Checking 15/32

16 PPR(Post Package Repair) Single bit and single row failure are repairable without any system power-off Normal Rows Redundant Row Recognizing Can repair half of function failures Repairable by PPR(51%) PPR Others 49% Single Bit Fail 37% Single Row 14% Restoring Source : Samsung 16/32

17 DDR3 DDR4 DDR3 DDR4 DDR4 in Client Platform Better performance(30%) and lower power(70%) Performance Intel HEDT Launched x1.0 x1.3 x1.0 x1.2 DDR3 DDR4 DDR3 DDR4 Sandra2014 Performance Test 8.0 Power Consumption x1.0 x1.0 x0.8 x0.7 Active Idle 17/32

18 Samsung DDR4 Line-up DDR4 module solution for server application Application DIMM Type Status IA Server Registered DIMM Load Reduced DIMM Production Production Micro Server ECC SODIMM Production DDR4 module solution for client application Application Type Status Traditional Desktop / HEDT UDIMM Production Ultrabook / AIO / NUC SODIMM Sampling 18/32

19 Contents 1. Industry Trend 2. Introduction of DDR4 3. New Technology Node 4. 3D Stacking Technology 5. What s coming Next 19/32

20 Samsung s Process Technology Journey New DRAM process technology node every year 2znm new process product under mass production 8xnm 6xnm 5xnm Tom s Hardware(Mar. 14) 4xnm Computerworld(Mar. 14) 3xnm Extreme Tech(Mar. 14) 2xnm 2ynm 2znm * Customer Sample shipping date for 1 st product of each process node 20/32

21 2znm DDR3 4Gb Status 2znm DDR3 4Gb is verified with Current Client platforms Already in mass production with valuable customers DIMM Type Density(Org.) Validation Result Status Unbuffered SODIMM Unbuffered DIMM 4GB(1Rx8) Pass Production 8GB(2Rx8) Pass Production 4GB(1Rx8) Pass Production 8GB(2Rx8) Pass Production 21/32

22 2znm DDR4 8Gb Introduction 32GB RDIMM(8Gb) consumes 26% lower power than 32GB LRDIM(4Gb) 3% performance gain by eliminating data buffer LRDIMM More Power tpd from DB 32GB Comparision RDIMM 26% Power Saving % Performance Gain LRDIMM Delay From DB DDR4 32GB LR DDR4 32GB RD DDR4 DDR4 LR 32GB LR DDR4 32GB RD Power Performance DDR4(4Gb) 32GB LRDIMM vs. DDR4(8Gb) 32GB RDIMM 22/32

23 Contents 1. Industry Trend 2. Introduction of DDR4 3. New Technology Node 4. 3D Stacking Technology 5. What s coming Next 23/32

24 TSV technology for 3DS Enables DRAM stacking with better electrical characteristics Conventional Stack Solutions <QDP Wire-bond Package> RDL* Wire-Bond TSV Solutions <4H TSV Package> Slave Chip Master Chip TSV VIA *RDL : Re-distribution Layer <QDP LRDIMM> <3DS TSV RDIMM> Memory Controller Data Buffer DRAM Memory Controller Integrated Buffer Less I/O power DRAM (Master) Number of loading limits high speed operations Only master chip communicates with controller regardless of number of stacking 24/32

25 Power Efficiency of 3DS Solution 3DS solution shows similar performance to buffered solutions Significant less power by removing additional ICs Performance & Latency Power Consumption Bandwidth and Latency Latency ~24% ~28% DDP LR 4H TSV 3DS 4H TSV_LR 3DS 32GB LRDIMM 64GB RDIMM 64GB LRDIMM LR LR TSV TSV TSV_LR TSV_LR Stream Performance Stream LMBench LMBench Latency 3DS RDIMM performs the same as buffered solutions DDP DDP LRDIMM TSV 4H RDIMM 3DS TSV 4H LRDIMM 3DS 32GB LRDIMM 64GB RDIMM 64GB LRDIMM 4H 3DS DRAM consumes same as conventional 2stack *Performance: SPECjbb benchmark, Latency: ATE, Power: Samsung memory stress system 25/32

26 Unveiled 1 st TSV product, 64GB RDIMM 64GB RDIMM with TSV is IN PRODUCTION 26/32

27 Contents 1. Industry Trend 2. Introduction of DDR4 3. New Technology Node 4. 3D Stacking Technology 5. What s coming Next 27/32

28 Needs for Higher Performance Memory High performance DRAM solution needed in N/W, GFX and HPC Graphic Graphics Revolution Improved 3D graphics, 4K Resolution, etc Expanded use of GPGPU Network 200/400Gbit Ethernet from Big Data : 6.6 Zetabyte in 16(CAGR 31%) Connected Devices : 1 trillion in 16(IBM) Internet speed goes up : LTE, LTE-A HPC GPGPU application enlargement Expand from Super Computer to Server. Shazam : Cloud Service using GPGPU accelerator Core, Memory B/W increase Higher B/W requirement Look up Buffer : RLDRAM HBM Packet Buffer : DDR3/4 HBM GPGPU Acceleration GPU performance (Flops) Overcome Uncanny Valley Memory B/W keep increasing 4.7Tera Flops in 13 : 288GB/s (GDDR5) 9.7Tera Flops in 15 : 600GB/s 3 Tera 20, 60 Tera Ethernet Solution 40/100Gbit DDR3 1866Mbps (x16 *8) 200Gb DDR4 2.8~3.2Gbps(x16 * 16) 400Gb HBM 100~200GB/s (1~2ea) Memory BW Increase 28/32

29 HBM (High Bandwidth Memory) Concept HBM has 8 channels with 1024 I/O, support up to 256GB/s 2/4/8H HBM stacks can be supported with TSV technology DRAM Channel 0 Channel 1 Logic Processor Si Interposer Buffer PCB Mother Board [System side view using 4H HBM] DRAM Buffer [HBM Structure 4H Case] HBM is the unique solution to achieve higher B/W with low power Bandwidth Requirement 900 [Memory Bandwidth, GB/s] HBM x4ea (1TB/s, 2Gbps) DDR3/4, WIO HBM GDDR5 GDDR5 x12ea (384GB/s, 8Gbps) 29/32

30 Thermal Management in 2.5D PKG is ready Buffer Die 1 st DRAM Die 2 nd DRAM Die 3 rd DRAM Die 4 th DRAM Die [Temperature ( C] DRAM Logic Processor Si Interposer PCB Buffer Mother Board 30/32

31 Infrastructure Readiness for HBM 300mm wafer process line is ready for Mass Production Fab process qualification is completed with State of the art facilities FAB Post-FAB Assembly TSV Bump Carrier Bond Back-side Pad Debond & Saw Stacking 31/32

32 Samsung Memory for All Computing Device DDR4 /LPDDR3,4 DDR4 GDDR5 32/32 LPDDR3/4

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