Bringing 3D Integration to Packaging Mainstream

Transcription

1 Bringing 3D Integration to Packaging Mainstream Enabling a Microelectronic World MEPTEC Nov 2012 Choon Lee Technology HQ, Amkor

2 Highlighted TSV in Packaging TSMC reveals plan for 3DIC design based on silicon interposer & TSV(Jun 8 th 2010) Elpida, PTI & UMC to partner for 3DIC commercialization of logic+dram stack with 28nm by 2011(Jun 23 rd 2010) 3DIC memory with wide I/O interface is coming by 2013, says NOKIA (Sep 17 th 2010) Xilinx brings 3D TSV interconnects to commercialization phase in digital FPGA world (Oct 27 th 2010) Micron reveals Hyper Memory Cube 3DIC technology (Feb 18 th 2011) Samsung wide I/O memory for mobile products A deeper look (Feb 28 th 2011) Micron, Samsung Form 3-D Memory Consortium, HMCC (Oct 6 th 2011) 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 2

3 3D IC Technology TSV Vias First Vias Early/Middle Vias Last Back Side Front-End FAB Process Vias drilled in bare Si Vias filled with Poly-Si Possible via resistance issues Front-End FAB Process W-CVD or Cu plated OSAT Process Active Interposer Passive Interposer Passive Interposer substrate 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 3

4 2.5D Interposer TSV 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 4

5 Interposer Benefit Source : ITRI 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 5

6 Si Interposer Technology 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 6

7 Si Interposer Attributes Design Rule Nitride termination layer with patterned openings to Top Metal Ni Au Pads M4 Also oxide layers Via 3 Via 2 Via 1 Oxide 1µm M1 to Si Spacing M3 M2 M1 Feature Spec Note TSV Size 10 µm dia. TSV Depth 100 µm Metal 1 1 µm L / S /Th Metal 2 & 3 2 µm L / S /Th Metal 4 4 µm L / S /Th Metal to Metal 1-2 µm spacing Via 1-2 µm dia Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 7

8 Si Interposer Applications - FPGA Interposers Increase Logic Capacity while Reducing Power - Higher yields - Over 2X FPGA capacity advantage - 50% power reduction from 40nm FPGAs - 5X reduction in latency - 100X improvement in inter-die bandwidth/watt - Passive silicon interposer : Minimizes heat flux issues : 20X denser wire pitch : Utilizes 65 nm technology From GSA Memory Conference, Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 8

9 Si Interposer Applications Active Very high memory bandwidth (>1 Tb/sec) Used for high performance server and super computer 4 memory die Heat spreader TIM Logic die Organic substrate 200um bump pitch 1000um bump pitch 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 9

10 Si Interposer as substrate RF Module Si TSV Interposer RF Module 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 10

11 Si Interposer Substrate : A Si Interposer BGA PKG with Cu-filled TSV and Multi layer Cu Plating Interconnect, Kouichi Kumagai et al, 2008 ECTC 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 11

12 3D Interposer Wafer Forecast by Application Source : Yole, Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 12

13 Interposer Supply Chain Logistics Wafer Finish Can be at either Foundry or OSAT Business Concerns : Ownership of TSV related failures Cost Agreed to metric for good known good Wfr Technical Concerns : BOM Compatibility Same bump metallurgies Same passivation materials Thin wafer handling / shipping 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 13

14 Who Is Doing What? TSV RDL Bumping Packaging Test 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 14 Source : Yole, 2010

15 Alternative: Organic Interposer Through via by laser drilling or mechanical punching Organic core with 5ppm/k CTE Core thickness: 60~300um available Source : Samsung Electro-Mechanics 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 15

16 3D Device TSV 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 16

17 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 17

18 Mobile Applications TIM Cu pillar bump Heat spreader EMC NCP 1 NCP 0 Memory die Logic die Substrate Cu pillar bump TSV solder ball Wide I/O memory die ( ~1200ubumps, no TSV) 28nm (Cu pillar, 10um dia. TSV) Substrate (14 x 14 /12 x 12 mm) Die 2 Substrate interconnection : TCNCP Die 2 Die interconnection : TCNCP Heat spreader attach (exposed die molding) :optional 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 18

19 Memory Applications EMC Substrate DDR3 4Gb DIMM (1.066GHz) for server application is around $250 DDR3 4Gb for PC is around $ Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 19

20 Process Flow Memory Stacking NCP dispensing and TC bonding 1 TC bonding 2, 3 and 4 Mold Solder ball attach 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 20

21 Process flow Frontside bumping & thinning TSV Wafer Front Side Bump Edge Trimming Carrier wafer Adhesive Coating Bonding Wafer Back grinding 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 21

22 Process flow backside processing Si Etching Polymer Coating TSV Opening Back side Pad 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 22

23 Process flow Carrier debonding Carrier Slide Off Adhesive Cleaning Film Frame Film Frame Mounting 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 23

24 3D TSV Applications Key to 3D commercialization is a cost/performance ratio! Application Driver Status Barrier Image sensors Performance, Form factor Production None CPUs + memory Performance 16nm Si node or beyond Cost, process, yield, infrastructure GPUs + memory Performance 2014 FPGAs Performance 2014 Cost, process, yield, infrastructure Cost, process, yield, infrastructure Wide I/O memory with processor Performance (bandwidth extension, lower power consumption), Form factor 2012~13 Cost, process, yield, KGD, infrastructure (including business logistics) Memory (stacked) Performance, Form factor (z-height) 2012 Cost, process, yield, assembly Source : TechSearch, Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 24

25 Technical issues 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 25

26 TSV Technical Issues in Packaging - 1 Wafer thinning and handling system - Misaligned bonding (device to carrier) - TSV Cu smearing & Non exposed TSV - Cu contamination - Device wafer crack: low mechanical properties - Total Thickness control - Debonding without damage - WSS Adhesive delamination Cu smearing Interface delamination TTV control Thin die Handling Crack 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 26

27 TSV Technical Issues in Packaging - 2 Backside of TSV wafer processing - Non uniform TSV tip height (= non uniform Si recess etch) - Most Appropriate Backside Passivation per options - Si-Etching, Incomplete TSV exposure and surface uniformity - Top/Bottom stress balancing for best warpage control - Backside Inspection 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 27

28 TSV Technical Issues in Packaging - 3 Microbumping - Microbump height uniformity - Small CD passivation pattern opening - 3D inspection, AOI difficulty Thin wafer handling and shipping - Broken or cracked wafer - Adhesive residue on the wafer front-side - Incoming Inspection and cleaning Assembly accuracy 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 28

29 TSV Technical Issues in Packaging - 4 3D stacking and packaging - Thin (and large) die pick up issue - cracking - Adhesive overflow - u-bump misalign - Warpage control for both single dies and as stacked dies - High throughput Reliable TC bonding - Particle Control from inspection, testing to bonding TSV Chip to Substrate Bonding by TCNCP 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 29

30 2011 Amkor Technology, Inc. Amkor Information for Controlled Release at MEPTEC 30