Engineer To Engineer Note EE-188 Technicl Notes on using Anlog Devices' DSP components nd development tools Contct our technicl support by phone: (800) ANALOG-D or e-mil: dsp.support@nlog.com Or visit our on-line resources http://www.nlog.com/dsp nd http://www.nlog.com/dsp/ezanswers Using C To Implement Interrupt-Driven Systems On ADSP-219x DSPs Contributed by Joe B Mrch 19, 2003 Introduction This Engineer-to-Engineer note will describe the process for implementing timer routine for the ADSP-219x fmily of DSPs using the C progrmming lnguge. Plese refer to chpter 12 of the ADSP-219x DSP Hrdwre Reference for further detils regrding the timers. The referenced code in this ppliction note ws verified using VisulDSP++ 3.0 for ADSP-21xx DSPs nd revision 2.0 of the ADDS-2191-EZLITE development bord. ADSP-219x Fmily Timers Contrry to the ADSP-218x fmily of Digitl Signl Processors (DSPs), the ADSP- 219x fmily hs three timers, ech of which cn be configured in ny of three modes. On the ssembly level, configurtion of the timers nd use of interrupts is firly strightforwrd. However, in C, using interrupts nd ccessing the timer registers requires knowledge of some of the system heder files nd n understnding of how the C run-time environment works with embedded DSP progrms. The process explined herein describes how to implement n interrupt-driven timer routine in C but the methods used cn be pplied to ny C-coded interrupt routines. The ADSP-218x C librries defined three C-cllble functions for timer mngement (timer_on, timer_off, nd timer_set), which were creted to mke life for the C developer little esier. In n ADSP-219x-bsed project, these functions no longer pply becuse now there re THREE possible sets of timer registers to ssocite these functions to, the registers for progrmming the timers re different, nd the register memory spce is lso chnged significntly from the ADSP-218x fmily of DSPs. Additionlly, the 32-bit period, width, nd count timer registers re now broken into low nd high words, giving the ADSP-219x timers 65536 times the durtion tht the ADSP- 218x timer hd. Using Fetures In VisulDSP++ VisulDSP++ 3.0 comes equipped with severl built-in, or intrinsic, functions designed to mke progrmming DSP in C environment even more user-friendly. Formerly, memory-mpped registers were ccessed by referencing-dereferencing scheme using csted pointers (*(int *)). Access to non-memory-mpped registers in C ws tedious tsk, requiring embedded ssembly source code. Now, the intrinsic functions sysreg_red nd sysreg_write re vilble for mnipulting these registers. In ddition to these system register functions, the ADSP-219x tools feture two other intrinsic functions, io_spce_red nd io_spce_write, which provides ccess to ll the memory-mpped I/O spce registers s well. Copyright 2003, Anlog Devices, Inc. All rights reserved. Anlog Devices ssumes no responsibility for customer product design or the use or ppliction of customers products or for ny infringements of ptents or rights of others which my result from Anlog Devices ssistnce. All trdemrks nd logos re property of their respective holders. Informtion furnished by Anlog Devices Applictions nd Development Tools Engineers is believed to be ccurte nd relible, however no responsibility is ssumed by Anlog Devices regrding the technicl ccurcy nd topiclity of the content provided in ll Anlog Devices Engineer-to-Engineer Notes.
These four functions re defined in the heder file sysreg.h. In this heder, there is lso n enumerted type, listing the system registers tht cn be ccessed using sysreg_red nd sysreg_write. One will lso find ll the bit mnipultion instructions here s well (sysreg_bit_clr, sysreg_bit_set, sysreg_bit_tgl). The io_spce_red nd io_spce_write intrinsic functions require the rchitecture definition heder file, def2191.h, be included lso. This heder detils the ddresses for ll of the I/O spce registers. It should be noted tht the ddressing scheme utilized in this heder ssumes tht the user hs lredy set the IO Pge (IOPG) register ppropritely, which is one of the system registers detiled in the enumerted type in sysreg.h (sysreg_iopg). The IO Pges re lso given convenient nmes in def2191.h. For exmple, if the user wnted to configure their ADSP-2191 EZ-KIT to hve LEDs 8-11 s outputs, this routine would do the trick: #include <sysreg.h> #include <def2191.h> min( ) } sysreg_write (sysreg_iopg, Generl_Purpose_IO); io_spce_write (DIRS, 0x000F); LEDs 8-11 mp to the Progrmmble Flg Pins 0-3. Therefore, we wnt to configure PF0-3 to be outputs. This informtion is contined in the DIRS register, where 1 mens tht the PFx pin is n output. The first thing we need to do is to mke sure tht we re on the correct IO Pge for ccessing the DIRS register. Becuse IOPG is system register, this is ccomplished using the sysreg_write intrinsic with the correct rguments. The first rgument is the register to be written to, sysreg_iopg (s defined in the enumertion in sysreg.h). The second rgument is the vlue to be written to the IOPG register, Generl_Purpose_IO, which is #defined in def2191.h to be 0x06 (the pge offset required to ccess the GPIO register set). Now tht the IOPG register is set ppropritely to ccess the GPIO registers, we hve ccess to the DIRS register. The second line of code uses the io_spce_write intrinsic becuse DIRS is n IO spce register. Here, the rguments re the ddress to be written to, DIRS, which is #defined in def2191.h to be 0x001 (the physicl I/O ddress on IO pge 6 of the DIRS register) nd the vlue to be written to tht ddress, 0x000F, where bits 0-3 re set to 1 to enble the corresponding PF pins 0-3 to be outputs. Accessing the Timer0 registers is done in the sme fshion, s you will see in the ttched code. First, you must set the IOPG register using the sysreg_write intrinsic to hve the offset for the Timer_Pge. Then you ll hve ccess to the timer register ddresses nd must use the io_spce_write intrinsic to configure the ssocited registers s pproprite (see lines 27-34 of the ttched source). Interrupt Hndling In C The interrupt hndling in C is unchnged from the ADSP-218x fmily tools from coding perspective. Users still utilize the heder-defined interrupt(signl, subroutine) module to tke cre of everything. First nd foremost, this function ssocites specific ISR module to be run for ny given signl tht could be received during run-time. The list of possible signls is detiled in the signl.h heder file. This function lso sets the correct bit in IMASK to enble servicing for tht interrupt. In ddition to this interruptregistering scheme, the user will hve to globlly enble interrupts by using the intrinsic function enble_interrupts(). Prior to version 6.1.1 of the ADSP-219x Compiler, globl enbling of interrupts ws utomticlly performed by the interrupt(signl, subroutine) module. From version 6.1.1 on, explicit use of the Using C To Implement Interrupt-Driven Systems On ADSP-219x DSPs (EE-188) Pge 2 of 5
enble_interrupts() module is required. One new feture of the ADSP-219x fmily of DSPs is tht the interrupts re now optionlly configurble. There is set of interrupt priority registers, nmely IPR0, IPR1, IPR2, nd IPR3, tht cn be configured prior to using the interrupt module in C to tell the hrdwre which interrupts hve higher priority (i.e., which IMASK bit needs to be set to enble interrupt servicing). In this exmple, we will not touch these registers nd will go with the defult priority settings. Plese refer to pge C-3 of the ADSP-219x Hrdwre Reference for more informtion regrding interrupt priority. In tble C-2, the reder will see the Peripherl Interrupts nd Priority t Reset, where it is depicted tht the Timer0 interrupt hs n ID of 9. However, it should be noted tht this ID is ctully n offset from the four nonconfigurble highest-priority interrupts (Reset, Power-Down, Loop nd PC Stck, nd Emultion Kernel), which use interrupt vectors 0, 1, 2, nd 3, respectively. Therefore, the ctul signl used for the defult Timer0 interrupt is SIG_INT13, not SIG_INT9. Becuse of this, the line of code for configuring the interrupt in C (line 36) reds s follows: interrupt (SIG_INT13, Timer0_ISR); As ws lredy explined, SIG_INT13 is the defult signl number for the Timer0 interrupt. If you chose to utilize the option to prioritize your interrupts, just know tht you will need to use different SIG_INT vlue in this line of code bsed upon the priority vlue you gve to the Timer0 interrupt. For exmple, if you gve it n ID of 0 (highest priority fter the four nonconfigurble interrupts), you d be using SIG_INT4. Conversely, if you gve it n ID of 11 (lowest priority), you d use SIG_INT15. In this exmple, Timer0_ISR() is the function tht is clled to service the Timer0 interrupt once it hs been ltched in the interrupt ltch (IRPTL) register. The interrupt gets ltched into IRPTL bsed on the contents of the peripherl s sttus register. Since the timers sttus bits re sticky, they require write-1- to-cler opertion to be performed few cycles before the RTI occurs. This will llow the sttus write to tke effect before the RTI is executed, which will ensure tht the sme interrupt is not ltched immeditely by IRPTL. The Code Exmple Itself The following exmple code hs been referenced throughout this ppliction note. This exmple is the C equivlent to the ssembly exmple provided in the Timer Chpter of the ADSP-219x/2191 DSP Hrdwre Reference on pges 12-15 through 12-18. This module sets up the timer initiliztion nd interrupt routines for timer in Pulsewidth Modultion (PWMOUT) Mode. The min module re-mps the Interrupt Vector Tble (IVT) to internl memory, configures the pproprite LEDs to be outputs, sets up the timer registers, ssocites the ISR to the timer signl, nd strts the timer. The ISR checks the polrity of the output PF pins 0-3 to check the sttus of LEDs 8-11 nd toggles them upon ech instnce of timer expirtion. Physiclly, on the ADDS-2191-EZ-KIT- LITE, LEDs 8, 9, 10, nd 11 will lterntely light/extinguish for roughly 1 second, ssuming 160 MHz clock. Min Code /* C-interrupts Exmple for ADSP-2191 EZ-KIT Creted 10/12/2001 - JB Modified 3/14/2003 - JB */ #include <signl.h> /* Interrupts */ #include <def2191.h> /* MMRs */ #include <sysreg.h> /* Intrinsics */ void Timer0_ISR(); /* ISR Prototype */ Using C To Implement Interrupt-Driven Systems On ADSP-219x DSPs (EE-188) Pge 3 of 5
min() int temp; sysreg_write(sysreg_iopg, Clock_nd_System_Control_Pge); temp = io_spce_red(syscr); temp = 0x0010; /* Mp IVT To Pge 0 */ io_spce_write (SYSCR, temp); // Cler/Reset All Interrupts sysreg_write(sysreg_irptl, 0x0000); sysreg_write(sysreg_icntl, 0x0000); sysreg_write(sysreg_imask, 0x0000); sysreg_write(sysreg_iopg, Generl_Purpose_IO); io_spce_write(dir, 0x000F); // set outputs /* Go To Timer Pge Initilize Timer0 */ sysreg_write(sysreg_iopg, Timer_Pge); /* SET: PWM_OUT Mode, Positive Active Pulse, * Count To End Of Period, Int Request Enble, * Timer_Pin Select */ io_spce_write(t_cfgr0, 0x001D); /* Timer0 Period Register (High Word) */ io_spce_write(t_prdh0, 0x0410); /* Timer0 Period Register (Low Word) */ io_spce_write(t_prdl0, 0x5A00); /* Timer0 Width Register (High Word) */ io_spce_write(t_whr0, 0x0410); /* Enble Timer0 */ io_spce_write(t_gsr0, 0x0100); /* INT13 Is Defult Timer0 Interrupt */ interrupt(sig_int13, Timer0_ISR); /* Globlly Enble Interrupts */ enble_interrupts(); while(1); /* wit for interrupts */ } /* end of min */ ISR Code void Timer0_ISR() int Timer Flg_Polrity; /* Check Flgs */ /* Go To Timer I/O Pge */ sysreg_write(sysreg_iopg, Timer_Pge); /* Cler TMR0 Interrupt Ltch Bit */ io_spce_write(t_gsr0, 0x1); /* Go To GPIO I/O Pge */ sysreg_write(sysreg_iopg, Generl_Purpose_IO); /* Get Vlues Of PF Flgs */ Timer Flg_Polrity = io_spce_red(flags); if ((Timer Flg_Polrity & 0x000F) == 0) /* If The LEDs Aren't On */ io_spce_write(flags, 0x000F); /* turn EZ-KIT LEDs ON */ else /* otherwise they re ON */ io_spce_write(flagc, 0x000F); /* turn EZ-KIT LEDs OFF */ } // end Timer0_ISR /* Timer0 Width Register (Low Word) */ io_spce_write(t_wlr0, 0x2D00); Using C To Implement Interrupt-Driven Systems On ADSP-219x DSPs (EE-188) Pge 4 of 5
References [1] ADSP-219x/2191 DSP Hrdwre Reference Mnul, First Edition, July 2001 Document History Version Mrch 19, 2003 by Joe B Description Initil Relese Using C To Implement Interrupt-Driven Systems On ADSP-219x DSPs (EE-188) Pge 5 of 5