IPC-7351B was released in 2010 and supersedes IPC-7351A (which was released in 2007).
|
|
- Cathleen Glenn
- 5 years ago
- Views:
Transcription
1 IPC-7351B Compliance Old Content - visit altium.com/documentation Modified by Jason Howie on Nov 13, 2014 Altium Designer 14.3 incorporates a number of additions and enhancements to both the IPC Compliant Footprint Wizard, and the IPC -Compliant Footprints Batch Generator. These changes are aimed at making both truly compliant with Revision B of the IPC standard Generic Requirements for Surface Mount Design and Land Pattern Standard. IPC-7351B was released in 2010 and supersedes IPC-7351A (which was released in 2007). The following additional packages are now supported: CAPAE, CHIP ARRAY, DFN, LGA, PQFN, PSON, SODFL, SON, and SOTFL. In addition, existing packages have been reviewed and modified with respect to data required and/or terminology, with graphics enhanced to better illustrate the application of that data. Three further beneficial enhancements have also been added in this release: Splitting of the paste mask into small fills, for packages with a large thermal pad (sized 2.1mm x 1.6mm, or larger). For packages involving gullwing leads, pads are trimmed to prevent them from otherwise extending under the package's body. For small packages having a large central thermal pad (PQFP, QFN, SOIC, SOP), the peripheral pads are trimmed to ensure required clearance between the pads, in accordance with the IPC Standard. Where pad trimming is applied, a warning is displayed in the IPC -Compliant Footprint Wizard, or in the report generated from the IPC -Compliant Footprints Batch Generator.
2 Create PCB library components compliant with IPC standard 7351B - individually, or en-masse - using the enhanced IPC -Compliant Footprint Wizard and IPC -Compliant Footprints Batch Generator. Newly Supported Packages The following sections detail the new packages introduced in Altium Designer 14.3, and supported in both the IPC-Compliant Footprint Wizard and the IPC-Compliant Footprints Batch Generator. Previously existing packages have been modified, where necessary, to comply with the IPC-7351B standard. Consult the legends in the underlying Excel templates (accessed from the Open Template menu in the IPC-Compliant Footprints Batch Generator dialog), for the current data sets for each of those packages. CAPAE Description: Electrolytic Aluminum Capacitor Included Packages: CAPAE
3 Support for CAPAE packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the CAPAE package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to CAPAE Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Lmin, Lmax Minimum and maximum lead span Wmin, Wmax Minimum and maximum body width Footprint
4 Tmin, Tmax Minimum and maximum length of lead Twmin, Twmax Minimum and maximum width of lead Amin Minimum component height Amax Maximum component height L1min, L1max Minimum and maximum body length Dmax,Dmin Diameter of Body DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) JHmin Minimum value for heel fillet JSmin Minimum value for side fillet JTmin Minimum value for toe fillet DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to CAPAE Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges G Distance between pads. Measured from inside edges X Pad width Y Pad length C Row spacing. Distance between pad centers A Assembly width B Assembly length V1 Courtyard width V2 Courtyard length R1 Silkscreen width R2 Silkscreen length Chip Array Description: Chip Array Included Packages: Chip Array, Chip Array Exposed Pad
5 Support for Chip Array packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the Chip Array package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to Chip Array Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is autogenerated Footprint Description (Dimensions in mm)
6 Emin, Emax Minimum and maximum body width Dmin, Dmax Minimum and maximum body length (side containing pin 1) Bmin, Bmax Minimum and maximum lead width B1min, B1max Minimum and maximum corner lead width Lmin, Lmax Minimum and maximum lead length Amax Maximum height Amin Minimum height PinCount Total number of pin positions (including absent pins) Pitch Pitch (e) PackageType Flat,Concave,ConvexE, ConvexS Type of packge DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) JHmin Minimum value for heel fillet. JSmin Minimum value for side fillet. JTmin Minimum value for toe fillet. DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to Chip Array Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges C Row spacing. Distance between pad centers G Distance between pads. Measured from inside edges X Pad width X1 Corner pad width Y Pad length A Assembly width (E side) B Assembly length (D side) V1 Courtyard width (E side) V2 Courtyard length (D side)
7 R1 Silkscreen width (E side) R2 Silkscreen length (D side) DFN Description: Dual Flat No-lead Included Packages: DFN Support for DFN packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the DFN package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard.
8 Table of data related to DFN Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Emin, Emax Minimum and maximum body width Dmin, Dmax Minimum and maximum body length (side containing pin 1) b1min, b1max Minimum and maximum lead width (small lead) L1min, L1 max Minimum and maximum lead length (small lead) Amax Maximum height Amin Minimum height A1max Maximum standoff height A1min Minimum standoff height PinCount Total number of pin positions (2,3,4) e1 Pitch (e1) e2 Pitch (e2) e Pitch (e) b2min, b2max Minimum and maximum lead width (big lead) L2min, L2max Minimum and maximum lead length (big lead) Footprint DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to DFN Footprint Specifications. Value Required A Assemble width (D side) B Assemble length (E side) C pads span betwen small one C1 pads span between big and samll one C2 distance from package center to center of big pad R1 Silkscreen width (D side) R2 Silkscreen length (E side) V1 Courtyard width (D side) V2 Courtyard length (E side) X1 Small pad width
9 Y1 Small pad length X2 Big pad width Y2 Big pad length LGA Description: Land Grid Array Included Packages: LGA Support for LGA packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the LGA package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will
10 be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to LGA Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Dmin, Dmax Minimum and maximum body length along D side (A, B, C,...) D1ave Average length of grid along D side Emin, Emax Minimum and maximum body length along E side (1, 2, 3,...) E1ave Average length of grid along E side A1min Minimum standoff height A1max Maximum standoff height A2min, A2max Minimum and maximum body height Amin Minimum overall height Amax Maximum overall height Bnom Average lead size LeadShape R,S Lead shape, round or square PitchD, PitchE Distance between ball centres, in "D" and "E" directions GridType P, S P = Plain Grid, S = Staggered Grid MatrixType F, P, SD, TE F = Full Matrix, P = Perimeter, SD = Selectively Depopulated, TE = Thermally Enhanced Rows Number of balls along D side (A, B, C,...) Columns Number of balls along E side (1, 2, 3,...) Nmax Maximum number of ball positions (Rows x Columns) PinCount Number of actual balls present DepopulateBalls Ball positions removed from matrix. Example: C5-H10,B6-B9,A1 RepopulateBalls Ball positions added back into depopulated matrix. Example: C8,D6-F9 DrawingNote If package has other features that will affect the footprint, then enter details. Footprint Table of data related to LGA Footprint Specifications. Value Required
11 Diameter of pad. If specified this overrides the calculated value. This can be used to specify a manufacturer's recommended pad size. X C1 C2 A Assembly width B Assembly length V1 Courtyard width V2 Courtyard length R1 Silkscreen width R2 Silkscreen length PQFN Description: Pulback Quad Flat No-lead Included Packages: PQFN
12 Support for PQFN packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the PQFN package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to PQFN Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Dmin, Dmax Minimum and maximum body span on side D Footprint
13 Emin, Emax Minimum and maximum body span on side E Bmin, Bmax Minimum and maximum lead width Lmin, Lmax Minimum and maximum lead length Amin Minimum height Amax Maximum height A1min Minimum standoff height A1max Maximum standoff height L1min, L1max Lead pull-back length PinCountD Number of pins on D side of package PinCountE Number of pins on E side of package PitchD Distance between two adjacent pins on side D PitchE Distance between two adjacent pins on side E Pin1 S2, C1 Location of pin 1; S2 = corner of package. C1 = center of package side D2min, D2max Minimum and maximum thermal pad size on D side. If there is no thermal pad leave this field blank E2min, E2max Minimum and maximum thermal pad size on E side. If there is no thermal pad leave this field blank DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) Periphery Land Periphery DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to PQFN Footprint Specifications. Value Required ZE Distance between pads. Measured from outside edges ZD Distance between pads. Measured from outside edges GE Distance between pads. Measured from inside edges GD Distance between pads. Measured from inside edges X Pad width Y Pad length CE Row spacing. Distance between pad centers CD Row spacing. Distance between pad centers E2t Thermal Pad width D2t Thermal Pad length
14 L2 Power Bar width. B2, B3, B4, B5, G3, G4, G5, G6 Power Bar length. If all are blank, no power bars are drawn. A Assembly width (E side) B Assembly length (D side) V1 Courtyard width (E side) V2 Courtyard length (D side) R1 Silkscreen width (E side) R2 Silkscreen length (D side) PSON Description: Pulback Small Outline No-lead Included Packages: PSON
15 Support for PSON packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the PSON package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to PSON Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Footprint
16 Emin, Emax Minimum and maximum body width Dmin, Dmax Minimum and maximum body length (side containing pin 1) D2min, D2max Minimum and maximum thermal pad size on D side. If there is no thermal pad leave this field blank E2min, E2max Minimum and maximum thermal pad size on E side. If there is no thermal pad leave this field blank Bmin, Bmax Minimum and maximum lead width cmin, cmax Minimum and maximum lead height Lmin, Lmax Minimum and maximum lead length L1min, L1max Minimum and maximum lead pullback Amax Maximum height Amin Minimum height A1max Maximum standoff height A1min Minimum standoff height PinCount Total number of pin positions (including absent pins) Pitch Pitch (e) AbsentPins Comma separated list showing absent pins. Example: 1,2,5. If blank all pins present PinOrder Comma separated list showing pin order. If blank pin order is assumed sequential from 1 to PinCount. Example: 8,7,6,5,4,3,2,1 will reverse the pin order of an 8 pin package DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) Periphery DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to PSON Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges C Row spacing. Distance between pad centers G Distance between pads. Measured from inside edges X Pad width Y Pad length
17 E2t Thermal Pad width (X2) D2t Thermal Pad length (Y2) A Assembly width (E side) B Assembly length (D side) V1 Courtyard width (E side) V2 Courtyard length (D side) R1 Silkscreen width (E side) R2 Silkscreen length (D side) ViaCountE Number of thermal vias in the E direction ViaCountD Number of thermal vias in the D direction ViaPitchE Thermal Via Pitch in the E direction ViaPitchD Thermal Via Pitch in the D direction Peripheral Pads - Top Solder Layer. Enter expansion value for Solder Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank X2Y2_Solder Thermal Pad - Top Solder Layer. Enter expansion value for Solder Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank XY_Paste Peripheral Pads - Top Paste Layer. Enter expansion value for Paste Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank. X2Y2_Paste Thermal Pad - Top Paste Layer. Enter expansion value for Paste Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank. X_Paste Peripheral Pads - Fill on Top Paste Layer. Value in X direction. Y_Paste Peripheral Pads - Fill on Top Paste Layer. Value in Y direction. X2_Paste Thermal Pad- Fill on Top Paste Layer. Value in X direction. Y2_Paste Thermal Pad- Fill on Top Paste Layer. Value in Y direction. FillCountE Number of Top Paste fills placed on the thermal pad in the E direction (No Paste Mask fills placed if blank) FillCountD Number of Top Paste fills placed on the thermal pad in the D direction (No Paste Mask fills placed if blank) Fill_Gap Gap between Top Paste fills placed on the thermal pad (0.2mm if blank) XY_Solder SODFL Description: Small Outline Diode, Flat Lead Included Packages: SODFL
18 Support for SODFL packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the SODFL package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to SODFL Package Specifications. Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Footprint
19 Dmin, Dmax Minimum and maximum body length Emin, Emax Minimum and maximum lead span E1min, E1max Minimum and maximum body width Bmin, Bmax Minimum and maximum width Lmin, Lmax Minimum and maximum lead length Amin, Amax Minimum height DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) JHmin Minimum value for heel fillet JSmin Minimum value of side fillet JTmin Minimum value for toe fillet DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to SODFL Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges C Distance between pads. Measured from pad centre G Distance between pads. Measured from inside edges X Pad width Y Pad length X1 Pad width (large pad) A Assembly width B Assembly length V1 Courtyard width V2 Courtyard length R1 Silkscreen width R2 Silkscreen length SON Description: Small Outline No-lead Included Packages: SON, SON Exposed Pad
20 Support for SON packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the SON package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to SON Package Specifications. Footprint Value Required If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Emin, Emax Minimum and maximum body width Dmin, Dmax Minimum and maximum body length (side containing pin 1) D2min, D2max Minimum and maximum thermal pad size on D side. If there is no thermal pad leave this field blank
21 E2min, E2max Minimum and maximum thermal pad size on E side. If there is no thermal pad leave this field blank Bmin, Bmax Minimum and maximum lead width cmin, cmax Minimum and maximum lead height Lmin, Lmax Minimum and maximum lead length L1min, L1max Minimum and maximum lead pullback Amax Maximum height Amin Minimum height A1max Maximum standoff height A1min Minimum standoff height PinCount Total number of pin positions (including absent pins) Pitch Pitch (e) AbsentPins Comma separated list showing absent pins. Example: 1,2,5. If blank all pins present PinOrder Comma separated list showing pin order. If blank pin order is assumed sequential from 1 to PinCount. Example: 8,7,6,5,4,3,2,1 will reverse the pin order of an 8 pin package DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) JHmin Minimum value for heel fillet. JSmin Minimum value for side fillet. JTmin Minimum value for toe fillet. DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to SON Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges C Row spacing. Distance between pad centers G Distance between pads. Measured from inside edges X Pad width Y Pad length E2t Thermal Pad width (X2) D2t Thermal Pad length (Y2) A Assembly width (E side) B Assembly length (D side) V1 Courtyard width (E side) V2 Courtyard length (D side) R1 Silkscreen width (E side) R2 Silkscreen length (D side) ViaCountE Number of thermal vias in the E direction ViaCountD Number of thermal vias in the D direction ViaPitchE Thermal Via Pitch in the E direction ViaPitchD Thermal Via Pitch in the D direction XY_Solder Peripheral Pads - Top Solder Layer. Enter expansion value for Solder Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank X2Y2_Solder Thermal Pad - Top Solder Layer. Enter expansion value for Solder Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank
22 XY_Paste Peripheral Pads - Top Paste Layer. Enter expansion value for Paste Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank. X2Y2_Paste Thermal Pad - Top Paste Layer. Enter expansion value for Paste Mask. Only enter value if following manufacturer recommendation. Otherwise leave blank. X_Paste Peripheral Pads - Fill on Top Paste Layer. Value in X direction. Y_Paste Peripheral Pads - Fill on Top Paste Layer. Value in Y direction. X2_Paste Thermal Pad- Fill on Top Paste Layer. Value in X direction. Y2_Paste Thermal Pad- Fill on Top Paste Layer. Value in Y direction. FillCountE Number of Top Paste fills placed on the thermal pad in the E direction (No Paste Mask fills placed if blank) FillCountD Number of Top Paste fills placed on the thermal pad in the D direction (No Paste Mask fills placed if blank) Fill_Gap Gap between Top Paste fills placed on the thermal pad (0.2mm if blank) SOTFL Description: Small Outline Transistor, Flat Lead Included Packages: 3-Leads, 5-Leads, 6-Leads
23 Support for SOTFL packages, added to the IPC-Compliant Footprint Wizard and IPC-Compliant Footprints Batch Generator. The following tables list the information (required and optional) when defining the SOTFL package in an Excel file for use with the IPC-Compliant Footprints Batch Generator. Similar required information will be reflected in the corresponding pages of the IPC-Compliant Footprint Wizard. Table of data related to SOTFL Package Specifications. Value Required
24 If blank, then auto-generated IPC naming will be used FootprintDescription If blank, then description is auto-generated Dmin, Dmax Minimum and maximum body length Emin, Emax Minimum and maximum lead span E1min, E1max Minimum and maximum body width PinCount 3,5 Total number of pin positions, not including tab Footprint PinOrder Comma separated list showing pin order. If blank pin order is assumed sequential from 1 to PinCount. Example: 8,7,6,5,4,3,2,1 will reverse the pin order of an 8 pin package AbsentPins Comma separated list showing absent pins. Example: 1,2,5. If blank all pins present Bmin, Bmax Minimum and maximum width of narrow leads B1min, B1max Minimum and maximum width of wide lead (3 pin packages only) cmin, cmax Minimum and maximum lead thickness L1min, L1max Minimum and maximum lead length (from body to end of lead) LPmin, LPmax Minimum and maximum lead length Pitch Pitch (e) Amin, Amax Minimum height DensityLevel L, M, N M = Most or maximum copper (density level A), N = Nominal or median copper (density level B), L = Least or minimum copper (density level C) JHmin Minimum value for heel fillet JSmin Minimum value of side fillet JTmin Minimum value for toe fillet DrawingNote If package has other features that will affect the footprint, then enter details. Table of data related to SOTFL Footprint Specifications. Value Required Z Distance between pads. Measured from outside edges C Distance between pads. Measured from pad centre G Distance between pads. Measured from inside edges X Pad width Y Pad length X1 Pad width (large pad) A Assembly width
25 B Assembly length V1 Courtyard width V2 Courtyard length R1 Silkscreen width R2 Silkscreen length
26 Source URL:
Using the PCB Component Wizard
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > PCB Component Wizard Using Altium Documentation Modified by Phil Loughhead on Jun 19, 2017 The PCB Component
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Creating the PCB Footprint Using Altium Documentation Modified by Annika Krilov on Apr 11, 2017 Concept
More informationAltium Designer Viewer - Generating Output
Altium Designer Viewer - Generating Output Old Content - visit altium.com/documentation Modified by on 6-Nov-2013 Altium Designer Viewer allows you to open, view, and generate output from, Output Job Configuration
More informationPreparing the Board for Design Transfer. Creating and Modifying the Board Shape. Modified by Phil Loughhead on 15-Aug-2016
Preparing the Board for Design Transfer Old Content - visit altium.com/documentation Modified by Phil Loughhead on 15-Aug-2016 This article describes how to prepare the new PCB file so that it is ready to
More informationPCB Layer Stack Management
PCB Layer Stack Management Old Content - visit altium.com/documentation Modified by on 29-Nov-2016 Related Videos Define New Layer Stacks Layer Stack Regions A printed circuit board, or PCB, is used to mechanically
More informationSchematic Libraries, Models and Integrated Libraries
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Главная > A Look at Creating Library Components Using Altium Documentation Modified by Jason Howie on Apr 11,
More informationFitted with modified component parameters, such as the component's value.
Variants Modified by Susan Riege on Sep 4, 2018 Parent page: Exploring CircuitStudio The ability to create variations of the same base design is a real strength of CircuitStudio, and a tremendous productivity
More informationSummary. Seeing is Believing - Read More and Watch Demos of Altium Designer 6.6
Whats New in Altium Designer 6.6 Summary Altium Designer 6.6 brings significant refinements to Variants combined with a number of smaller enhancements and improved system-wide support for existing technologies.
More informationPublished on Online Documentation for Altium Products (https://www.altium.com/documentation)
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Support for Parameters in PCB Footprints Using Altium Documentation Modified by Jason Howie on Apr 11,
More informationDefining Net Classes by Area on a Schematic. Creating a Net Class from a Blanket Directive. Modified by Admin on Sep 13, Blankets in Schematic
Defining Net Classes by Area on a Schematic Old Content - visit altium.com/documentation Modified by Admin on Sep 13, 2017 Related Video Blankets in Schematic Altium Designer already allows you to create
More informationFrom Idea to Manufacture - Driving a PCB Design through CircuitStudio
From Idea to Manufacture - Driving a PCB Design through CircuitStudio Modified by Susan Riege on 13-Sep-2018 Welcome to the world of electronic product development in Altium's world-class electronic design
More informationIDF-TO-3D User Guide
Contents: 1. Supported Platforms 2. Creating a working session 3. Loading IDF files to your working session 4. Viewing Options 5. Zooming to a section of your PCB 6. 3D PCB Library Content 7. 3D PCB Libraries
More informationReleasing a Schematic Sheet to a Vault
Releasing a Schematic Sheet to a Vault Old Content - see latest equivalent Modified by Jason Howie on 31-May-2017 Parent article: Design Content Management Being able to re-use design content is something
More informationFrom Idea to Manufacture - Driving a PCB Design through SOLIDWORKS PCB
From Idea to Manufacture - Driving a PCB Design through SOLIDWORKS PCB Modified by Jason Howie on 24-Oct-2017 Welcome to the world of electronic product development in Altium's world-class electronic design
More informationCircuit Board Guidelines for aqfn Package nan-40
Circuit Board Guidelines for aqfn Package nan-40 Application Note v1.1 4413_398 v1.1 / 2018-04-23 Contents Revision history.................................. iii 1 Introduction...................................
More informationDAC348x PCB Layout Guidelines for the Multi-Row QFN package
Texas Instruments Application Report DAC348x PCB Layout Guidelines for the Multi-Row QFN package Russell Hoppenstein Revision 1.0 Abstract This document provides additional information related to the multi-row
More informationPCB. Modified by Rob Evans on 28-May Parent page: PCB Panels
PCB Modified by Rob Evans on 28-May-2015 Parent page: PCB Panels The PCB panel gives you full acces to board objects, items and classes via a filtered browser. Summary The PCB panel allows you to browse
More informationTutorial - Getting Started with PCB Design
Tutorial - Getting Started with PCB Design Old Content - visit altium.com/documentation Modified by Phil Loughhead on 3-Aug-2016 Welcome to the world of electronic product development environment in Altium
More informationCreating a Custom Pad Shape. Standard Pad Attributes. Creating a Custom Pad Shape. Modified by on 13-Sep-2017
Creating a Custom Pad Shape Old Content - visit altium.com/documentation Modified by on 13-Sep-2017 Standard Pad Attributes Altium Designer's standard pad object can: Be set to a number of different shapes,
More informationPackage (1C) Young Won Lim 3/20/13
Copyright (c) 2011-2013 Young W. Lim. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published
More informationPackage (1C) Young Won Lim 3/13/13
Copyright (c) 2011-2013 Young W. Lim. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published
More informationReleasing a Simulation Model to a Vault
Releasing a Simulation Model to a Vault Old Content - see latest equivalent Modified by Jason Howie on May 31, 2017 Parent article: Vault-Based Domain Models From a designer's perspective, a vault-based
More informationCreating a Custom Pad Shape. Contents
Creating a Custom Pad Shape Contents Standard Pad Attributes Creating a Custom Pad Shape Strategies for Creating Custom Shapes Using Guides to Place a Region Converting an Outline to a Region Defining
More informationReleasing a PCB 2D-3D Model to a Vault
Releasing a PCB 2D-3D Model to a Vault Old Content - see latest equivalent Modified by Jason Howie on 31-May-2017 Parent article: Vault-Based Domain Models From a designer's perspective, a vault-based
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > PCB - From-To Editor Using Altium Documentation Modified by Admin on Apr 11, 2017 Parent page: PCB Panels
More informationRelease Highlights for CAM350 / DFMStream 12.1
Release Highlights for CAM350 / DFMStream 12.1 Introduction CAM350/DFMStream Release 12.1 is the latest in customer driven releases. All new features and enhancements were requested by existing customers.
More informationLab 9 PCB Design & Layout
Lab 9 PCB Design & Layout ECT 224L Department of Engineering Technology Lab 9 PCB Traces Size dependent upon electrical requirements, design constraints (routing space and clearance), and trace/space resolution
More informationE-tec Socketing solutions for BGA, LGA, CGA, CSP, MLF & Gullwing chips
E-tec Socketing solutions for BGA, LGA, CGA, CSP, MLF & Gullwing chips Available contact styles: Elastomer interposers (10 Ghz & more) Probe pin sockets (generally below 5 Ghz) Other interposer styles
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Managed Schematic Symbols Using Altium Documentation Modified by Jason Howie on Jun 22, 2018 Parent page:
More informationPublished on Online Documentation for Altium Products (https://www.altium.com/documentation)
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Defining the Layer Stack Using Altium Documentation Modified by Phil Loughhead on Apr 11, 2017 Related
More informationUsing Valor Trilogy to Generate 5DX Program Files
Using Valor Trilogy to Generate 5DX Program Files Introduction NBS > Printed Circuit Board Design > Printed Circuit Board Assembly > Printed Circuit Board Test 5DX Programming 5DX Board Testing Agenda
More informationAttaching a Datasheet to a Component Item in the Vaults Panel
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Storing Component Datasheets in an Altium Vault Using Altium Documentation Modified by Jason Howie on
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Schematic Symbol Generation Tool Using Altium Documentation Modified by Jason Howie on Apr 11, 2017 Parent
More informationComponent Management in SOLIDWORKS PCB
Component Management in SOLIDWORKS PCB Modified by Jason Howie on Oct 24, 2017 Parent page: Exploring SOLIDWORKS PCB A component is the general name given to a part that can be placed into an electronic
More informationSherlock User Guide User Data Files
Sherlock User Guide User Data Files Background Sherlock uses a collection of data files that define various properties used for data gathering and analysis. These data files are usually sufficient to handle
More informationPads are used to provide both mechanical mounting and electrical connections to the component pins.
Pad Old Content - visit altium.com/documentation Modified by Jason Howie on 19-Aug-2015 Parent page: Objects Pads are used to provide both mechanical mounting and electrical connections to the component
More informationActiveBOM - BOM Components
ActiveBOM - BOM Components Old Content - visit altium.com/documentation Modified by on 13-Sep-2017 Parent article: ActiveBOM The BOM Components tab is a constituent part of the BOM document (*.BomDoc),
More informationAltium Designer Viewer - Viewing PCB Documents
Altium Designer Viewer - Viewing PCB Documents Old Content - visit altium.com/documentation Modified by on 6-Nov-2013 In Altium Designer Viewer PCB documents are opened in the PCB Editor. The tools and
More informationAltiumLive - Content Store
AltiumLive - Content Store Frozen Content Modified by on 13-Sep-2017 Introducing the AltiumLive Content Store. The Content Store is an area in AltiumLive dedicated to content - content that is invaluable
More informationRelease Notes Version 5
Release Notes Version 5 Version 5.1 (2017-01-31) Solder Joint Fatigue Calculix Support for Column Grid Array (CGA) modeling for Solder Joint Fatigue FEA analysis and the Solder Fatigue tool has been added
More informationExercise 1. Section 2. Working in Capture
Exercise 1 Section 1. Introduction In this exercise, a simple circuit will be drawn in OrCAD Capture and a netlist file will be generated. Then the netlist file will be read into OrCAD Layout. In Layout,
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > PDN Analyzer Example Guide Using Altium Documentation Modified by Rob Evans on Dec 21, 2017 The PDN Analyzer
More informationPCB Components Library Management with Altium Designer
PCB Components Library Management with Altium Designer By Kelvyn Shaw Altium designer has the ability to connect and use information from an external database. Detailed component information can now be
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Managed Simulation Models Using Altium Documentation Modified by Jason Howie on Jun 22, 2018 Parent page:
More informationBoard Design Guidelines for Intel Programmable Device Packages
Board Design Guidelines for Intel Programmable Device Packages AN-114 2017.02.24 Subscribe Send Feedback Contents Contents 1 Board Design Guidelines for Intel Programmable Device Packages...3 1.1 Overview
More informationMoving to Altium Designer from Pads Logic and PADS Layout
Moving to Altium Designer from Pads Logic and PADS Layout Old Content - visit altium.com/documentation Modified by on 13-Sep-2017 Translating complete PADS Logic and PADS Layout designs, including PCB,
More informationDesign and Assembly Process Implementation for BGAs
ASSOCIATION CONNECTING ELECTRONICS INDUSTRIES Design and Assembly Process Implementation for BGAs Developed by the Device Manufacturers Interface Committee of IPC October 25, 2000 Users of this standard
More informationUse the Pad Designer to create padstacks for a number of typical pins, such as throughhole and surface-mount pads.
3 Lesson 3: Padstacks Learning Objectives In this lesson you will: Use the Pad Designer to create padstacks for a number of typical pins, such as throughhole and surface-mount pads. In this section you
More informationThe following self-capacitance sensor types are available for use in your PCB designs:
Support for Cypress Touch Controls Old Content - visit altium.com/documentation Modified by on 29-Nov-2016 Extending its support for the use of touch controls in designs, Altium Designer 15.1 provides
More informationReliability Study of Bottom Terminated Components
Reliability Study of Bottom Terminated Components Jennifer Nguyen, Hector Marin, David Geiger, Anwar Mohammed, and Murad Kurwa Flextronics International 847 Gibraltar Drive Milpitas, CA, USA Abstract Bottom
More informationApplication Note AN-289
BGA 256-pin Routing Application Note AN-289,QWURGXFWLRQ By Paul Snell and John Afonasiev IDT uses the 256 PBGA package for several of its products. Although creating an optimal layout with a PBGA package
More informationActiveBOM - BOM Catalog
ActiveBOM - BOM Catalog Old Content - visit altium.com/documentation Modified by Admin on Nov 29, 2016 Parent article: ActiveBOM The BOM Catalog tab is a constituent part of the BOM document (*.BomDoc),
More information2008 년안산일대디지털정보통신학과 CAD 강의용자료 PADS 2007
2008 년안산일대디지털정보통신학과 CAD 강의용자료 PADS 2007 1 Learning the PADS User Interface What you will learn: Modeless Commands Panning & Zooming Object Selection Methods Note: This tutorial will use PADS Layout to
More informationPCB. Summary. Modified by Rob Evans on 8-Oct Parent page: PCB Panels
PCB Modified by Rob Evans on 8-Oct-2016 Parent page: PCB Panels The PCB panel gives you full access to board objects and items via a filtered browser. Summary The PCB panel allows you to browse the current
More informationClass Structure in the PCB
Class Structure in the PCB Old Content - visit altium.com/documentation Modified by on 13-Sep-2017 Related Videos Structured Classes in the PCB Editor Altium Designer already provided high-quality, robust
More informationIPC-D-859. Design Standard for Thick Film Multilayer Hybrid Circuits ANSI/IPC-D-859. The Institute for. Interconnecting
The Institute for Interconnecting and Packaging Electronic Circuits Design Standard for Thick Film Multilayer Hybrid Circuits ANSI/ Original Publication December 1989 A standard developed by the Institute
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Using Version Control Using Altium Documentation Modified by Rob Evans on Apr 11, 2017 RELATED INFORMATION
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Главная > Working with the Explorer Panel - Feature How-Tos Using Altium Documentation Modified by Jason Howie
More informationConfiguring an SMTP Journal Account for Microsoft Exchange 2003
Configuring an SMTP Journal Account for Microsoft Exchange 2003 This article refers to Microsoft Exchange Server 2003. As of April 8, 2014, Microsoft no longer issues security updates for Exchange Server
More informationConstructing and Producing a Printed Circuit Board
Constructing and Producing a Printed Circuit Board Craig Zofchak Design Team 8 11/07/2008 Abstract When a circuit in its development phase is finished and working correctly, it is then necessary to take
More informationGenerating a Custom Bill of Materials
Generating a Custom Bill of Materials Old Content - visit altium.com/documentation Modified by on 6-Nov-2013 This tutorial describes how to use the Report Manager to set up a Bill of Materials (BOM) report.
More informationPDN Analyzer Example Guide
PDN Analyzer Example Guide Old Content - visit altium.com/documentation Modified by Admin on Nov 29, 2016 Related PDN Analyzer overview Overview video The PDN Analyzer application is relatively straightforward
More informationECAD Part Wizard (EPW) Help Document
ECAD Part Wizard (EPW) Help Document ECAD Part Wizard application has been developed by RS Components and SamacSys to provide a range of highly accurate ECAD models, offering schematic symbol and PCB footprint
More informationDipTrace SCHEMATICAND PCBDESIGNSOFTWARE. PaternNamesHelp
DipTrace SCHEMATICAND PCBDESIGNSOFTWARE PaternNamesHelp 70 How to use?! Pattern name carries information about pattern type and number of various parameters like pitch, width, number of pads e.t.c., divided
More informationPublished on Online Documentation for Altium Products (https://www.altium.com/documentation)
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Главная > Local Version Control Service Using Altium Documentation Modified by Jason Howie on May 8, 2018 Parent
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Главная > Working with the Vaults Panel - Feature How-Tos Using Altium Documentation Modified by Jason Howie
More informationCreating a Database Library from an Integrated Library
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Database Library Migration Tools Using Altium Documentation Modified by Jason Howie on Apr 11, 2017 Parent
More informationPCB 3D Video. Making a PCB 3D Video. Modified by Admin on Sep 13, D PCB 'flyovers'
PCB 3D Video Old Content - visit altium.com/documentation Modified by Admin on Sep 13, 2017 Related Videos 3D PCB 'flyovers' If a picture can 'tell a thousand words', it stands to reason that a series of
More informationFigure 1. Output jobs are configured as an OutJob file, giving you full control over print-based output.
PCB Printout Output Options Old Content - visit altium.com/documentation Modified by Admin on Sep 13, 2017 Print-based Output Print-based output for your PCB project in Altium Designer is available through
More informationComponent Management in CircuitMaker
Component Management in CircuitMaker Modified by Rob Evans on 14-Oct-2015 Related pages Driving a PCB Design through CircuitMaker Project Management Parent page: Exploring CircuitMaker A component is the
More informationCustomer Attributes. Creating New Customer Attributes. For more details see the Customer Attributes extension page.
For more details see the Customer Attributes extension page. Customer Attributes Customer Attributes Magento extension enables you to get extra information from your customers. Provide additional field
More informationPatented socketing system for the BGA/CSP technology
Patented socketing system for the BGA/CSP technology Features: ZIF handling & only 40 grams per contact after closing the socket Sockets adapt to all package styles (at present down to 0.40mm pitch): Ceramic
More informationPublished on Online Documentation for Altium Products (
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Home > Configuring PCB Printouts Using Altium Documentation Modified by Jason Howie on Apr 20, 2017 Print-based
More informationAlternative Components in the BOM
Alternative Components in the BOM Old Content - visit altium.com/documentation Mod ifi ed by Phi l Lou ghh ead on 9Nov -20 15 Additional Resources Alternative Components in the BOM Managing the Components
More information2 PIECE BOARD-TO-BOARD
2 PIECE BOARD-TO-BOARD 201-01-123 1. SPECIFICATION DISTRIBUTION No restrictions for issue 2. SCOPE This specification contains the application notes for the 9159 two part connectors. 3. PRODUCTS 10-9159
More informationEspecially, for Flex-Rigid design, the designer can add sub layer stack for different board regions.
Layer Stack Manager Old Content - visit altium.com/documentation Modified by Annika Krilov on 14-Jul-2015 Parent page: PCB Dialogs The Layer Stack Manager(Flex-Rigid) Dialog. Summary The Layer Stack Manager
More informationA Walk Through the Board Design Release Process
A Walk Through the Board Design Release Process Frozen Content Modified by Jason Howie on 31-May-2017 Parent article: Board Design Release Altium's Design Data Management system includes a range of technologies
More informationMoving to Altium Designer from Protel 99 SE. Contents
Moving to Altium Designer from Protel 99 SE Contents Design Database Become a Design Workspace & Projects Importing a 99 SE Design Database Creating the Altium Designer Project(s) Manually Adding and Removing
More informationUser Guide. Version /7/05
PCB Libraries IPC-7351 LP Suite User Guide Version 2.500-3/7/05 CONTENTS SECTION PAGE 1 INTRODUCTION...1-1 1.1 Basic Features...1-1 2 INSTALLATION...2-2 2.1.net Framework...2-2 2.2 Large and Small Fonts...2-3
More informationMAKE A PRINTED-CIRCUIT-BOARD (PCB) FOR YOUR ELECTRONIC DEVICE 11/10/2017 CLIFF CURRY
MAKE A PRINTED-CIRCUIT-BOARD (PCB) FOR YOUR ELECTRONIC DEVICE 11/10/2017 CLIFF CURRY PART ONE: AN INTRODUCTION TO PRINTED CIRCUIT BOARDS. WHAT ARE THEY, AND HOW DOES ONE SPECIFY THEM TO GET WHAT ONE WANTS?
More informationVersion 16 Software Update Details. Problem Fixes in Version (18-Sep-2013) Problem Fixes in Version (17-Apr-2013)
Version 16 Software Update Details Problem Fixes in Version 16.0.9 (18-Sep-2013) o Editing a package in a library containing a user-defined package that uses a Prism would cause that Prism element to become
More informationGetting Started with PCB Design
Getting Started with PCB Design Summary Tutorial TU0117 (v1.2) April 13, 2005 This introductory tutorial is designed to give you an overview of how to create a schematic, update the design information
More informationSocket Technologies
Socket Technologies Toll Free: (800) 404-0204 U.S. Only Tel: (952) 229-8200 Fax: (952) 229-8201 email: info@ironwoodelectronics.com Introduction Company Overview Over 5,000 products High Performance Adapters
More informationPCB Keyswitches Product Survey Versions Recommended Key grid Illumination Keyswitch Signal indicator Keyswitch height Contacts RACON 8 12 mm Non-illum
PCB Keyswitches Page RACON short-travel keyswitches - 5 RACON 8-6 RACON 12-10 RACON 12 V with vertical adapter - 1 RACON 12 i - 16 RACON special accessories - 20 RF short-travel keyswitches - 23 RF 15
More informationto be handled, tracked and verified, otherwise the components' designators and other design data can become out of sync.
Understanding Design Annotation Old Content - visit altium.com/documentation Modified by Admin on Nov 6, 2013 This document explores the process of annotation in Altium Designer - from understanding Schematic,
More informationAccessing the Interface
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) Главная > Browser-based Access & Management Using Altium Documentation Modified by Jason Howie on Jun 28, 2018
More informationAllegro PCB Editor with Performance Option or higher. The Reuse function can be used to create panels in PCB Editor
Title: Product: Summary: Panelization with Reuse Allegro PCB Editor with Performance Option or higher The Reuse function can be used to create panels in PCB Editor Author/Date: Beate Wilke / 07.02.2011
More informationEXCELLENT FOR MASS PRODUCTION THESE SOP IC SOCKETS RESIST VIBRATION AND SHOCK
EXCELLENT FOR MSS PRODUCTION THESE SOP IC SOCKETS RESIST VIRTION ND SHOCK SOP IC SOCKETS (600 mil contacts 1.27mm pitch) SSOP IC SOCKETS (600 mil contacts 0.8mm pitch) Compliance with RoHS Directive FETURES
More informationI N T E R C O N N E C T A P P L I C A T I O N N O T E. STEP-Z Connector Routing. Report # 26GC001-1 February 20, 2006 v1.0
I N T E R C O N N E C T A P P L I C A T I O N N O T E STEP-Z Connector Routing Report # 26GC001-1 February 20, 2006 v1.0 STEP-Z CONNECTOR FAMILY Copyright 2006 Tyco Electronics Corporation, Harrisburg,
More informationLQFP. Thermal Resistance. Body Size (mm) Pkg. 32 ld 7 x 7 5 x ld 7 x 7 5 x ld 14 x 14 8 x ld 20 x x 8.5
LQFP Low Profile Quad Flat Pack Packages (LQFP) Amkor offers a broad line of LQFP IC packages designed to provide the same great benefits as MQFP packaging with a 1.4 mm body thickness. These packages
More informationTo learn more about a command, dialog, object or panel, press F1 when the cursor is over that item.
Published on Online Documentation for Altium Products (https://www.altium.com/documentation) 主页 > 从理念到制造 通过Altium Designer推动PCB设计 Altium技术文档新纪元 Modified by Jun Chu on Apr 26, 2018 Welcome to the world
More informationThird party import problems
Third party import problems Old Content - visit altium.com/documentation Modified by Admin on Nov 6, 2013 Summary Importing to third party CAD tools can present problems when different options are used
More informationPCB Object and Layer Transparency
PCB Object and Layer Transparency Old Content - visit altium.com/documentation Modified by on 6-Nov-2013 Related Videos PCB Object and Layer Transparency Settings Offering increased control over the display
More informationPRELIMINARY APPLICATION SPECIFICATION
SEARAY BOARD TO BOARD INTERCONNECT SYSTEM 4970 / 466 SMT Plug Connector (shown with kapton pad for pick and place) 4971 / 467 SMT Receptacle Connector (shown with kapton pad for pick and place) SEARAY
More informationSolidWorks Modeler Getting Started Guide Desktop EDA
SolidWorks Modeler Getting Started Guide SolidWorks Modeler Getting Started Guide All rights reserved. No parts of this work may be reproduced in any form or by any means - graphic, electronic, or mechanical,
More informationSocket Technologies
Socket Technologies Introduction Company Overview Over 5,000 products High Performance Adapters and Sockets Many Custom Designs Engineering Electrical and Mechanical ISO9001:2008 Registration Socket Technology
More informationUniversity of Kansas EECS Circuit Board Fabrication Tutorial for 212 Lab
University of Kansas EECS Circuit Board Fabrication Tutorial for 212 Lab Preparing For Export... 1 Assigning Footprints... 1 Recommended Footprints... 2 No Connects... 3 Design Rules Check... 3 Create
More informationOver 5,000 products High Performance Adapters and Sockets Many Custom Designs Engineering Electrical and Mechanical ISO9001:2008 Registration
Overview Company Overview Over 5,000 products High Performance Adapters and Sockets Many Custom Designs Engineering Electrical and Mechanical ISO9001:2008 Registration Adapter Technology Overview Pluggable
More informationI N T E R C O N N E C T A P P L I C A T I O N N O T E. Z-PACK TinMan Connector Routing. Report # 27GC001-1 May 9 th, 2007 v1.0
I N T E R C O N N E C T A P P L I C A T I O N N O T E Z-PACK TinMan Connector Routing Report # 27GC001-1 May 9 th, 2007 v1.0 Z-PACK TinMan Connectors Copyright 2007 Tyco Electronics Corporation, Harrisburg,
More information