ECE5325 Smart Sensors and Fuel Cell Laboratory #2. Creating Automotive Electrical Load Model with Different Architectures Objectives:
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1 ECE5325 Smart Sensors and Fuel Cell Laboratory #2 Creating Automotive Electrical Load Model with Different Architectures Objectives: Learn how to create VHDL-AMS Model Library Learn how to add VHDL-AMS Models with different architectures Learn how to Edit the default symbol Learn how to simulate models with different architectures I. Creating Model Library 1. Start Model Agent from SSC : [SSC]PROGRAMS>MODEL AGENT 2. [Model Agent]FILE>NEW LIBRARY. A dialog box appears 3. Define library name (MyLibrary2) and location (MySimplorer). Click <Save> 4. Click <New> in the <<Resource Tables>> area, and select a language (English) for model text strings. Parameter names are identical for all language resources. We will our example to English language only.
2 Click <OK>. A new set of entries appears in the list. 5. Click <New> in the <<Simulation Tables>> area, and select VHDL-AMS for the model description language. Click <OK>. A new set of entries appears in the list (including SML access format table).
3 Click <OK> to create the new model library. The model library (Mylibrary2) is inserted into the model tree without a model.
4 II. Creating VHDL-AMS Model [Must be in Schematic Editor, not in Model Agent] 1. Start Schematic Editor. [SSC]PROGRAMS>SCHEMATIC. 2. Select a Library containing VHDL-AMS language tables. You can recognize such a library by the green package folder at the top of the model tree. [mylibrary] 3. Select the green package folder to insert the new macro model. 4. Right clk on the folder and select New>Macro 5. The model property dialog will open. Select VHDL-AMS (VHDLA) as modelling language. 6. Click on the <<General>> tab and enter a title ( Myload used as name in the model tree). 7. Click the <<Macro Text>> tab and check the <<Enable>> box. 8. Enter an interface name (used as model entity name) and click <OK>. A template with the specified entity name (Load) appears.
5 9. Enter the complete model interface description of your model in VHDL-AMS in the <<interface>> tab. If you want, you can add text in the info line. 10. Click on the New Entry symbol the first one of three symbols on the upper right corner of the dialog box, to create a new <<Body>> tab. The dialog to define the body name appears.
6 11. Enter a body name ( admittance used as architecture name) in the dialog. A template with the specified architecture name appears. 12. Enter the complete description of your model into the <<Body>> tab.
7 13. You can create several architectures for any entity definition. In our example, three architectures:
8 III. Editing the Default Symbol 1. Modifying the default symbol. Select the model in the model tree, right click and select <<Edit symbol >> 2. The default rectangular symbol is displayed, magnified 300%, for ease of viewing.
9 3. Delete both the black rectangle and text, only retaining the white rectangle. This is necessary to resize the white rectangle without the constraint imposed by the black rectangle and text.
10 4. The white rectangle boundary determines the pin placement. To resize it select the white rectangle by clicking it until three dots appear in the bottom right corner. Put the cursor on the dot until it becomes a double arrow, and then drag to the desired size. 5. Draw a rectangle, [SE]Draw>Poly>Rectangle. Draw the rectangle within the white box. 6. Then add text [SE]Draw>text. Type the text MyLoad and center within the box.
11 7. Then add pin, [SE]Draw>pin. Then click on the top of white rectangle to place the p pin, and similarly click on the bottom of the white rectangle to place the m pin.
12 8. Add three more pins: ctrl, p_nom, v_nom.
13 9. Delete p_nom and v_nom, only ctrl is required for external connection. Then change the property of pin ctrl to visible, by selecting ctrl pin, right click and select <<properties >>. A dialog box open, click visible. Also, add text to label the three visible pins: p, m, ctrl. NOTE p and m by default are visible.
14 IV. Simulations 1. Simulation of admittance load model. Draw the schematic shown below. Make sure the load is set-up using the admittance architecture. Set up the parameters of each component to match the given in schematic. Select the simulation parameters to achieve the waveform given below. r1 r2 e1 emf := 12 r := 3m c1 c := 10m r := 10m triang1 ampl := 1 freq := 1 off := 0 tdelay := 0 realqty_realsig1 Q=>RS p_nom := 1 v_nom := 14 t_ramp := 5m p ctrl MyLoad m load load1.v t[s] 12 load1.i t [s] triang1.val load1.ctrl_ramp t[s] 2. Simulation of the nominal load model. Draw the schematic shown below. Make sure the load is set-up using the nominal architecture. Set up the
15 parameters of each component to match the given in schematic. Select the simulation parameters to achieve the waveform given below. 3. Simulation of switch load model. Draw the schematic shown below. Make sure the load is set-up using the switch architecture. Set up the parameters of each component to match the given in schematic. Select the simulation parameters to achieve the waveform given below. r1 r2 e1 emf := 12 r := 3m c1 c := 10m r := 10m step1 t0 := 0.25 ts := 0 ampl := 1 realqty_realsig1 Q=>RS p_nom := 50 v_nom := 12 t_ramp := 5m p ctrl MyLoad m load load1.v t[s] load1.i t[s] load1.ctrl_ramp step1.val t [s] 4. Simulation of the switch load model
16 r1 r2 e1 emf := 12 r := 3m c1 c := 10m r := 10m pulse1 ampl := 0.5 freq := 5 off := 0.5 tdelay := 0 realqty_realsig1 Q=>RS p_nom := 20 v_nom := 12 t_ramp := 5m p ctrl MyLoad m load1 14 load1.v t[s] load1.i t[s] load1.ctrl_ramp pulse1.val t [s] REFERENCES 1. Simulation System SIMPLORER VHDL-AMS Tutorial, English Edition, 2003 Ansoft Corporation. 2. Simulation System SIMPLORER v.6.0 User Manual, English Edition, , Ansoft Corporation.
17 3. Simulation System SIMPLORER 6.0 Getting Started, English Edition, , Ansoft Corporation.
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