S2CBench : Synthesizable SystemC Benchmark Suite for High-Level Synthesis

Transcription

1 S2CBench : Synthesizable SystemC Benchmark Suite for High-Level Synthesis Benjamin Carrion Schafer 1, Ansuhree Mahapatra 2 The Hong Kong Polytechnic University Department of Electronic and Information Engineering b.carrionschafer@polyu.edu.hk 1, anushree.mahapatra@connect.polyu.hk

2 Outline Motivation for a Synthesizable SystemC Benchmark Suite Requirements for S2CBench A review of past HLS benchmarks S2CBench overview 12 synthesizable design 1 non synthesizable (tests floating point and trigonometric functions) Benchmark composition overview Detail benchmark characteristics Size Complexity Arithmetic operations How to download Conclusions 2

3 Motivation for S2CBench HLS tool evaluation times Not evaluation standards Not enough HLS models for RTL designs to compare QoR HLS tool input languages Different HLS tools support different input languages One common language supported by all HLS tools: SystemC Vendor Tool Name Supported Languages Cadence (Forte) Cynthesizer SystemC Cadence C-to-Silicon C, C++, SystemC Calypto CatapultC C++, SystemC NEC CyberWorkBench C, SystemC Xilinx Vivado HLS C, C++, SystemC 3

4 Requirements for a HLS Benchmark Must cover different domains of applications S2CBench enables the direct comparison of commercial HLS tools Test specific optimization techniques of HLS tools Avoid re-writing descriptions for tool evaluations 4

5 HLS Benchmarks: A Review CHStone HLS92,95 MiBench, MediaBench HLS benchmark based on ANSI-C Written in behavioral VHDL Written in C ANSI-C not supported by all HLS tools C does not support fixedpoint operations Targets various optimization options Currently not supported by any HLS tool Do not support fixed point operations Do not test specific HLS features 5

6 S2CBench: An Overview 12+1 SystemC Benchmarks which comply with latest SystemC synthesizable subset draft 12 Synthesizable 1 non synthesizable Covers different domains: Automotive Security Telecommunication Consumer Contains Control dominant and Data dominant designs Contains trigonometric & floating-point operations Helps check the ability of tools to support them 6

7 S2CBench: Features HLS optimizations Synthesis optimizations(e.g. loop unrolling, pipelining, function inlining, array synthesis) Synthesizer language support Tool language support(e.g. templates, structures, fixed point data types) Synthesizer performance Tool performance(e.g. synthesis run-time, accuracy of synthesis report) Every application features a testbench along with associated test vectors 7

8 S2CBench model Testbench functions: TB sends stimuli data stored in files (test vectors) to UUT TB receives the data and compares it against golden output (stored in file) TB reports if results match or not Option to dump VCD file Test vectors are modifiable 8

9 S2CBench : 12+1 designs Design Type Domain Optimizations Tested qsort dd Auto/Ind Loops, arrays, functions pointers sobel dd Auto/Ind Loops, functions, IO array expansion, multi-dimensional arrays expansion, fixed arrays (ROM, logic) aes cipher dd Security IO array expansion, multi-dimensional arrays expansion, large fixed arrays kasumi dd Security Multi-processes, delay report accuracy md5c dd Security #define macros, delay report accuracy snow3g dd Security Templates, delay report accuracy, function synthesis adpcm cd Telecom Structure synthesis FFT dd Telecom Floating point, trigonometric functions FIR dd Consumer IO array expansion, arrays, loops, functions, sum of products Decimation dd Consumer Resource sharing across loops, fixed point data types Interp dd Consumer Polynomial decomposition, fixed point data types, sum or products IDCT dd Consumer #include statement to initialize arrays, loops, functions, Disparity cd/dd Consumer Hierarchical design, multi-dimensional array expansion, synthesis running time 9

10 Detail Benchmark Contents for each Design SystemC files Top module including UUT and TB(Main.cpp) Design description( <benchmark>.cpp/.h) Testbench module(tb_<benchmark>.cpp/.h) Stimuli data Test vector( input.txt) Golden output(outputs_golden.txt) Image files(some applications) Makefile Allows different make options Make: generates executable binary(default) Make wave : binary having VCD file Make debug : binary with debug version 10

11 Quick Quick Sort Description sort design sorts data in ascending order using the well-known quick sort algorithm Optimization options to be tested loop unrolling array synthesis (register or memory) function synthesis with pointer argument support 11

12 Sobel Description edge-detection algorithm that takes a bitmap image directly as the input and returns a new bitmap image solely consisting of the edges of the original image. Optimization options to be tested nested loop unrolling and pipelining optimizations I/O ports expansion (expand inputs specified as arrays to individual ports) multi-dimensional arrays expansion fixed arrays synthesized as logic or ROMs pointer arguments to functions 12

13 AES - Advanced Encryption Standard Cipher Description Advanced Encryption Standard Cipher encryption algorithm performs AES encryption Optimization options to be tested Contains a large number of small for loops having inter-loop data dependencies. Input port expansion Array synthesis (memory or registers) Function synthesis (inline, goto) Large fixed arrays synthesized as logic or ROMs. 13

14 Kasumi Description block cipher algorithm used in mobile communication systems Composed of two sc_threads and multiple functions Optimization options to be tested Ability to synthesize large logic operations Accuracy of estimating the critical path Multi-process systems verification 14

15 MD5C - Message Digest Algorithm Description generates hash functions and check data integrity. Optimization options to be tested functions synthesis arrays of different bit widths different levels of loop nesting extensive use of define macros (language support) 15

16 Snow3G Description stream cipher that produces a key stream that consists of 32-bit blocks using a 128-bit key Contains a variable length multiplication operation Optimization options to be tested Support of templates. Loops, functions and array synthesis 16

17 ADPCM -Adaptive Differential Pulse- Code modulation (encoder part only) Description accepts 16-bit Pulse Code Modulation (PCM) samples as input and converts them into 4-bit samples Optimization options to be tested loop unrolling, function synthesis, array synthesis support for structures synthesis 17

18 FFT Fast Fourier Transform Description Converts time/space to frequency and vice versa Not synthesizable as per latest synthesis draft Optimization options to be tested Support for floating point operations and trigonometric functions Why is it included Most HLS vendors do support floating-point, trigonometric operations Helps evaluation engineers analyze the extent of support of these operations 18

19 FIR Finite Impulse Response Filter Description 10- tap FIR filter algorithm designed for 8- bit integer operations. Optimization options to be tested loop unrolling and pipelining automatic array expansion of the I/O ports pointers to functions 19

20 Decimation Filter Description 5-stage decimation filter. Consists of 5 FIR filters cascaded together where the output of one stage is the input to the next stage. Optimization options to be tested resource sharing of the Multiply Accumulate (MAC) operations across loops fixed-point data types and its different rounding and saturation modes. Ability to preserve the SoP constructs 20

21 Interpolation Filter Description 4-stage interpolation filter Optimization options to be tested automatic polynomial decompositions (Mathematical optimization of HLS tool) fixed- point data types and its different rounding and saturation modes 21

22 IDCT - Inverse Discrete Cosine Transform Description Describes a finite sequence of data points as a sum of cosine functions of different frequencies Optimization options to be tested initialization of an array using #include statement loops, functions, array synthesis 22

23 Disparity Stereoscopic Disparity Estimator Description estimates the disparity in a stereoscopic image. It is the largest of all the designs and consists of 4 processes executed in parallel Optimization options to be tested Synthesis running time of the HLS tool Verification of Multi-process (threads) systems 23

24 Detailed Benchmark Characteristics Variety of operations 24

25 Distribution of Number of Program Lines Note: Only lines of code of synthesizable description (not including testbench) 25

26 NUMBER Complexity distribution of designs Processes Function No. of arrays if statement for loop while loop 0 qsort sobel aes cipher kasumi md5c snow3g adpcm fft fir decim interp idct disparity APPLICATIONS 26

27 Publicly Available for download

28 More Information B. Carrion Schafer and A.Mahapatra, "S2CBench:Synthesizable SystemC Benchmark Suite for High-Level Synthesis IEEE Embedded Systems Letters, Accepted for publication YouTube Channel: DARClabify 28

29 Summary and Conclusions A benchmark suite in a common language supported by all major HLS vendors Each benchmark tests unique HLS features 1. Tool language support 2. Synthesis optimizations 3. Tool performance Benchmarks include testbench with inputs, golden outputs and option to generate VCD file Publicly available at or sourceforge.net 29