Lecture (07) x86 programming 6

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1 Lecture (07) x86 programming 6 By: Dr. Ahmed ElShafee 1 The Flag Register ID VIP VIF AC VM RF NT IOP 1 IOP 0 O D I T S Z A P C 8088/ Pentium A (Auxiliary) C (carry): O (overflow): P (Parity) S (sign): Z (zero):

2 Carry Flag 1. The carry flag is set if the addition of two numbers causes a carry out of the most significant (leftmost) bits added = 0000 (carry flag is turned on) 2. The carry (borrow) flag is also set if the subtraction of two numbers requires a borrow into the most significant (leftmost) bits subtracted = 1111 (carry flag is turned on) Otherwise, the carry flag is turned off (zero). 3 Overflow Flag 1. If the sum of two numbers with the sign bits off yields a result number with the sign bit on, the "overflow" flag is turned on = 1000 (overflow flag is turned on) 2. If the sum of two numbers with the sign bits on yields a result number with the sign bit off, the "overflow" flag is turned on = 0000 (overflow flag is turned on) Otherwise, the overflow flag is turned off. 4

3 5 Arithmetic and Logic Instructions Addition: (Flags affected: A,C,O,P,S,Z) ADD AL,BL ; AL AL + BL, BL unchanged Register addressing mode ADD CX,DI ; CX CX + DI, DI unchanged Register addressing mode ADD AH,45H ; AH AH + 45H Immediate addressing mode ADD [BX],AL ; [BX] [BX] + AL Register indirect addressing mode ADD CX,[BX] ; CX CX + [BX] ADD AL,CX ; INVALID 6

4 Add with Carry: (Flags affected: A,C,O,P,S,Z) ADC AH,BH ; AH AH + BH + Carry Register addressing mode ADC AX,CX ; AX AX + CX + Carry Register addressing mode ADC AL,[BX+SI] ; AL AL + [BX+SI] + Carry Register indirect addressing mode 7 Subtraction: (Flags affected: A,C,O,P,S,Z) SUB AL,BL ; AL AL - BL ;BL unchanged Register addressing mode SUB CX,DI ; CX CX - DI ;DI unchanged Register addressing mode SUB AH,45H ; AH AH - 45H Immediate addressing mode SUB BL,ARRAY ; BL BL - [ARRAY] Direct Addressing mode SUB [BX],AL ; [BX] [BX] AL Register indirect addressing mode 8 SUB AL,CX ; INVALID

5 Subtract with Borrow: (Flags affected: A,C,O,P,S,Z) SBB AH,BH ; AH AH - BH Carry Register addressing mode SBB AX,CX ; AX AX - CX Carry Register addressing mode SBB AL,[BX+SI] ; AL AL - [BX+SI] Carry Register indirect addressing mode 9 Increment: (Flags affected: A,O,P,S,Z) INC AL ; AL AL + 1 INC SP ; SP SP + 1 INC COUNT1 ; [COUNT1] [COUNT1] + 1 INC BYTE PTR[BX] ; [BX] [BX] + 1 INC WORD PTR[BX] ; [BX] [BX]

6 Example 01 org 100h jmp start db 0feh,00h start: mov INC INC ret bx,0102h BYTE PTR[BX] BYTE PTR[BX] org 100h jmp start db 0feh,00h start: mov bx,0102h INC BYTE PTR[BX] INC WORD PTR[BX] ret 11 12

7 13 Decrement: (Flags affected: A,O,P,S,Z) DEC AL ; AL AL - 1 DEC SP ; SP SP - 1 DEC COUNT1 ; [COUNT1] [COUNT1] - 1 DEC BYTE PTR[BX] ; [BX] [BX] - 1 DEC WORD PTR[BX] ; [BX] [BX]

8 Example 02 org 100h jmp start db 001h,00h start: mov dec dec ret bx,0102h BYTE PTR[BX] BYTE PTR[BX] org 100h jmp start db 01h,00h start: mov bx,0102h dec BYTE PTR[BX] dec WORD PTR[BX] ret 15 16

9 17 Example 03 What will be the values of the carry, overflow, sign and zero flags after the execution of each of the following instructions: MOV DX,0 DEC DX MOV AX,720H SUB AX, 0E6H MOV DX,0 DEC DX 18

Instruction AX DX Flags H L H L C Z S O MOV DX,0 00 00 0 0 0 0 DEC DX FF FF 0 0 1 0 MOV AX,720H 07 20 SUB AX, 0E6H 06 3A 0 0 0 0 19 Example 04 MOV AX,847AH SUB CX,CX MOV

10 Instruction AX DX Flags H L H L C Z S O MOV DX, DEC DX FF FF MOV AX,720H SUB AX, 0E6H 06 3A Example 04 MOV AX,847AH SUB CX,CX MOV BX,5CE8H ADD AL,BH ADC AH,BL MOV CL,AL ADD CH,BL MOV SI,0108H SUB BL,[SI] SBB BH,[SI+4] ADD AL,[010CH] MOV AX,[0106H] INC AL DEC BX ADD CX,[SI+4] Fill up the trace table given below. 20

11 Instruction MOV AX,847AH SUB CX,CX MOV BX,5CE8H ADD AL,BH ADC AH,BL MOV CL,AL ADD CH,BL MOV SI,0108H SUB BL,[SI] SBB BH,[SI+4] ADD AL,[010CH] MOV AX,[0106H] INC AL DEC BX ADD CX,[SI+4] 21 AX BX CX SI Flags H L H L H L C Z S O Instruction AX BX CX SI Flags H L H L H L C Z S O MOV AX,847AH 84 7A SUB CX,CX MOV BX,5CE8H 5C E8 ADD AL,BH D ADC AH,BL 6C MOV CL,AL D6 ADD CH,BL E MOV SI,0108H 0108 SUB BL,[SI] E SBB BH,[SI+4] (8A) D ADD AL,[010CH] (8A) MOV AX,[0106H] 5C E8 (5CE8) INC AL E DEC BX D2 E ADD CX,[SI+4] (5C8A) B

12 23 G. Multiplication: (Flags affected: C,O, (A,P,S,Z are undefined)) Unsigned multiplication: MUL CL ; AX AL * CL MUL CX ; DX,AX AX * CX MUL BYTE PTR [BX] ; AX AL * [BX] MUL WORD PTR [SI] ; DX,AX AX * [SI] 24

13 Signed multiplication (2's complement): IMUL BL ; AX AL * BL IMUL BX ; DX,AX AX * BX IMUL BYTE PTR [BX] ; AX AL * [BX] IMUL WORD PTR [SI] ; DX,AX AX * [SI] 25 Example 05 org 100h jmp start start: mov al,15h mov cl,15h mul cl mov al,00h mul cl ret 26

14 27 28

15 Division: (Flags affected: A,C,O,P,S,Z (all undefined)) Unsigned Division: DIV CL ; AL Quotient of AX/CL ; AH Remainder of AX/CL DIV CX ; AX Quotient of DX,AX/CX ; DX Remainder of DX,AX/CX 29 Signed Division: IDIV CL ; AL Quotient of AX/CL ; AH Remainder of AX/CL IDIV CX ; AX Quotient of DX,AX/CX ; DX Remainder of DX,AX/CX 30

16 Example 06 org 100h jmp start start: mov ax,1234h mov cl,15h div cl mov ax,0000h div cl ret 31 32

17 33 Example 07 org 100h MOV AX,42C1H SUB DX,DX MOV BX,2456H MUL BL MUL BX MOV AX,0A42H MOV CH,32H DIV CH MOV SI,0103H MUL BYTE PTR [SI] MOV AX,[0109H] MUL AH MOV BL,0F0 DIV BL ret 34 Fill up the trace table given below.

18 Instruction MOV AX,42C1H SUB DX,DX MOV BX,2456H MUL BL MUL BX MOV AX,0A42H MOV CH,32H DIV CH MOV SI,0103H MUL BYTE PTR [SI] (2B) MOV AX,[0109H] (F7E3) MUL AH MOV BL,0F0H DIV BL 35 AX BX CX DX Flags SI H L H L H L H L C Z S O AX BX CX DX Flags Instruction SI H L H L H L H L C Z S O MOV AX,42C1H 42 C1 SUB DX,DX MOV BX,2456H MUL BL 40 D6 1 1 MUL BX F3 E4 93 3D 1 1 MOV 36 0A 42 AX,0A42H MOV CH,32H 32 DIV CH 1A 34 MOV SI,0103H 103 MUL BYTE PTR [SI] (2B) MOV AX,[0109H] (F7E3) 08 BC 1 1 F7 E3 MUL AH DB MOV BL,0F0H F0 DIV BL 95 E9

19 BCD and ASCII Arithmetic: DAA ; Decimal Adjust for Addition DAS ; Decimal Adjust for Subtraction AAA ; ASCII Adjust for Addition AAS ; ASCII Adjust for Subtraction AAM ; ASCII Adjust for Multiplication AAD ; ASCII Adjust for Division 37 Example 08 org 100h mov al,08 mov bl,07 add al,bl daa mov al,08 mov bl,07 add al,bl aaa ret 38

39 Logic Instructions: AND AL,BL ; AL AL AND BL

AL,CL ; AL AL EX-OR CL XOR BH,0FH ; BH BH EX-OR

20 39 Logic Instructions: AND AL,BL ; AL AL AND BL (Always clears C and O flags) AND CL,33H ; CL CL AND 33H AND AX,[DI] ; AX AX AND [DI] OR AL,BL ; AL AL OR BL OR AX,1234H ; AX AX OR 1234H XOR AL,CL ; AL AL EX-OR CL XOR BH,0FH ; BH BH EX-OR 0FH NOT CH ; CH 1's complement of CH (No flags affected) 40

21 NOT AX ; AX 1's complement of AX NEG CH ; CH 2's complement of CH (ALWAYS SETS CF) NEG BX ; BX 2's complement of BX TEST AL,30H ;Perform AL AND30H and set the flags. AL is unchanged. CMP AL,30H ;Perform AL-30H and set the flags. AL is unchanged. 41 Example 09 MOV AX,847AH XOR BX,BX MOV CX,5CE8H AND AL,BH AND AH,92H OR CL,AL XOR CH,BL MOV SI,0108H OR BL,[SI] AND BH,[SI+2] XOR AL,[010CH] NOT AX NEG BL TEST BL, 14H TEST AL,3FH 42 Fill up the trace table given below.

22 Instruction MOV AX,847AH XOR BX,BX MOV CX,5CE8H AND AL,BH AND AH,92H OR CL,AL XOR CH,BL MOV SI,0108H OR BL,[SI] (22) AND BH,[SI+2] (80) XOR AL,[010CH] (92) NOT AX NEG BL TEST BL, 14H TEST AL,3FH 43 AX BX CX DX Flags SI H L H L H L H L C Z S O AX BX CX DX Flags Instruction SI H L H L H L H L C Z S O MOV 84 7A AX,847AH XOR BX,BX MOV CX,5CE8H 5C E8 AND AL,BH AND AH,92H OR CL,AL E XOR CH,BL 5C MOV SI,0108H 108 OR BL,[SI] (22) AND BH,[SI+2] (80) XOR AL,[010CH] (92) NOT AX 7F 6D NEG BL DE TEST BL, 14H TEST AL,3FH

23 Unconditional jump (JMP): The JMP instruction specifies the address of the next instruction to be executed. There are three types of unconditional jump instructions: the SHORT, the NEAR, and the FAR. A SHORT jump is specified with only one byte which represents the displacement between the current instruction to the next instruction. The next instruction can be located at a distance from +127 to memory locations away from the current instruction. 45 A NEAR jump specifies the address of the next instruction within the current Code Segment. A FAR jump specifies the exact address of the next instruction by specifying the values of the CS and IP registers. Examples: JMP NEXT JMP SHORT AGAIN JMP NEAR AGAIN JMP FAR AGAIN 46

24 Example 10 org 100h jmp start db 100h DUP (?) start: nop jmp SHORT part1 db 20h DUP (?) part1: nop jmp NEAR part2 db 00ffh DUP (?) part2: nop jmp FAR 1B31h:000bh 47 part3: nop ret 48

25 49 50

26 51 Thanks,.. 52

Arithmetic Instructions

Segment 3C Arithmetic Instructions This topic covers the following instructions: Addition (ADD, INC, ADC) Subtraction (SUB, DEC, SBB,CMP) Multiplication (MUL, IMUL) Division (DIV, IDIV) BCD Arithmetic