8086 Programming ADD BX,245FH BX BX + 245FH ADD [BX],AL [DS:BX] [DS:BX] + AL ADD CL,[BP] CL CL + [SS:BP] ADD BX,[SI + 2] BX BX + [DS:(SI + 3:SI + 2)]

Transcription

1 Addition Instruction 8086 Programming The table illustrates the addressing modes available to the ADD instruction. These addressing modes include almost all addressing modes. The only types of addition not allowed are memory-to-memory and segment register. The segment registers can only be moved, pushed, or popped. ADD AL,BL AL AL + BL ADD CX,DI CX CX + Dl ADD CL,44H CL CL + 44H ADD BX,245FH BX BX + 245FH ADD [BX],AL [DS:BX] [DS:BX] + AL ADD CL,[BP] CL CL + [SS:BP] ADD BX,[SI + 2] BX BX + [DS:(SI + 3:SI + 2)] ADD CL,TEMP CL CL + [DS:TEMP] ADD BX, TEMP[DI] BX BX +[DS:(TEMP+DI + 1: TEMP+DI)] ADD [BX + DI],DL [BX + DI] [BX + DI] + DL ADD BYTE PTR [DI],3 [DI] [DI] + 3 1

2 Increment Instruction Increment instruction (INC) adds 1 to a register or a memory location. The INC can add 1 to any register or memory location, except a segment register. With indirect memory increments, the size of the data must be described by using the BYTE PTR or WORD PTR directives. The reason is that the assembler program cannot determine if, for example, the INC [DI] instruction is a byte-, or word -sized increment. The INC BYTE PTR [DI] instruction clearly indicates byte-sized memory data; the INC WORD PTR [DI] instruction indicates a word-sized memory data INC BL BL BL + 1 INC SP SP SP + 1 INC BYTE PTR [BX] [DS:BX] [DS:BX] + 1 INC WORD PTR [SI] [DS:SI+1:SI] [DS:SI+1:SI] + 1 INC DATA1 [DS:DATA1] [DS:DATA1] + 1 Increment instructions affect the flag bits except the carry flag bit. Carry doesn't change because we often use increments in programs that depend upon the contents of the carry flag. Note that increment is used to point to the next memory element in a byte-sized array of data only. If word-sized data are addressed. it is better to use an ADD DI,2 instruction to modify the DI pointer in place of two INC DI instructions. In some cases, the carry flag must be preserved which may mean that two INC instructions might appear in a program to modify a pointer. 2

3 Addition-with-Carry An addition-with-carry instruction (ADC) adds the bit in the carry flag (C) to the operand data. This instruction mainly appears in software that adds numbers that are wider than 16 bits in the ADC AL,AH AL AL + AH + carry ADC CX,BX CX CX + BX + carry ADC DH,[BX] DH DH + [DS:BX] + carry ADC BX,[BP + 2] BX BX + [SS:(BP + 3:BP + 2) + carry 3

4 Subtraction Many forms of subtraction (SUB) appear in the instruction set. The only types of subtraction not allowed are memory-to-memory and segment register subtractions. Like other arithmetic instructions, the subtract instruction affects the flag bits. SUB dest,source dest dest-source SUB AX,SP SUB CH,6FH SUB AX,OCCCCH SUB [DI],CH SUB CH,[BP] SUB AH, TEMP Decrement Instruction (DEC) DEC instructionsubtracts a 1 from a register or the contents of a memory location. The decrement indirect memory data instructions require BYTE PTR, or WORD PTR. DEC dest dest dest - 1 DEC CX DEC BYTE PTR [DI] DEC WORD PTR[BP] Subtract-with-Borrow A subtraction-with-borrow (SBB) instruction functions as a regular subtraction, except that the carry flag (C), which holds the borrow, also subtracts from the difference. The most common use for this instruction is for subtractions that are wider than 16 bits in the Wide subtractions require that borrows propagate through the subtraction, just as wide additions propagate the carry. Like the SUB instruction, SBB affects the flags. Notice that the immediate subtract from memory instruction in 4

5 this table requires a BYTE PTR, or WORD PTR directive. SBB dest,source dest dest source - carry SBB CL,2 CL CL 2 - carry SBB BYTE PTR[DI],3 SBB [DI],AL SBB DI,[BP + 2] 5

6 Comparison The comparison instruction (CMP) is a subtraction that changes only the flag bits; the destination operand never changes. A comparison is useful for checking the entire contents of a register or a memory location against another value. A CMP is normally followed by a conditional jump instruction, which tests the condition of the flag bits. The only disallowed forms of compare are memory-to-memory and segment register compares. CMP dest,source CMP CL,BL CMP AX,SP CMP AX,2000H CMP [DI],CH CMP CL,[BP] dest sourse; update flags EXAMPLE CMP AL,10H ;compare with 10H JAE SUBER ;if 10H or above 6

7 mazidi unsigned addition and subtraction p mazidi signed number arithmeticoperations p