The TLM-2.0 Standard. John Aynsley, Doulos

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1 The TLM-2.0 Standard John Aynsley, Doulos

2 The TLM-2.0 Standard CONTENTS Review of SystemC and TLM Review of TLM-2.0 Frequently Asked Questions

3 What is SystemC? System-level modeling language Network of communicating processes (c.f. HDL) Modeling hardware and software together New: SystemC-AMS (mixed signal) C++ class library Communicating processes Industry standard IEEE 1666 Owned and driven by OSCI (Open SystemC Initiative) Open source implementation Mature, robust, easy-to-integrate and free 3

4 Transaction Level Modeling RTL Behavioral Model Pin Accurate Function Call write(address,data) RTL Behavioral Model Simulate every event! ,000 X faster simulation! 4

5 Reasons for using TLM Accelerates product release schedule Firmware / software Software development Fast TLM Ready before RTL Architectural exploration RTL Hardware verification Test bench TLM = golden model 5

6 TLM is Communication-Oriented Concurrent simulation environment Transaction + timing Simple functional models, e.g. C programs Could be synthesized by an ESL synthesis tool? 6

7 TLM and Synthesis ESL Synthesis Compare ESL Synthesis Pin-level Compare 7

8 The TLM-2.0 Standard CONTENTS Review of SystemC and TLM Review of TLM-2.0 Frequently Asked Questions

0 Pass-by-reference Unified interfaces Generic payload

9 OSCI TLM Timeline Apr 2005 Jun 2008 July 2009 TLM-1.0 put, get and transport Request-response model TLM-2.0 Pass-by-reference Unified interfaces Generic payload TLM LRM TLM-2.0 focusses on memory-mapped bus modeling 9

10 Typical Use Case: Virtual Platform Multiple software stacks Software Software CPU ROM RAM DMA DSP ROM RAM Bridge Interrupt Timer I/O Bridge Interrupt Timer A/D Multiple buses and bridges TLM-2.0 I/O Memory interface RAM DMA Custom peripheral D/A Digital and analog hardware IP blocks 10

11 Virtual Platform Characteristics Instruction Set Simulator or software stubs Transaction-Level Model RTL Available early Available early Much later Fast enough to run applications Fast enough to run applications Too slow to run applications Little or no hardware detail Register-accurate Register-accurate and pin-accurate No timing information Some timing information Cycle-accurate timing 11

12 Coding Styles and Mechanisms Use cases Software development Software performance Architectural analysis Hardware verification TLM-2 Coding styles (just guidelines) Loosely-timed Approximately-timed Mechanisms (definitive API for TLM-2.0 enabling interoperability) Blocking transport DMI Quantum Sockets Generic payload Phases Non-blocking transport 12

13 Interoperability Layer 1. Core interfaces and sockets Initiator The first function call Target 2. Generic payload 3. Base protocol Command Address Data Byte enables Streaming Response status Extensions BEGIN_REQ END_REQ BEGIN_RESP END_RESP Either write bytes or read bytes 13

Interoperability layer Utilities Initiator Target Coding Style Loosely- or Approximately-timed Core interfaces Sockets Generic payload Base protocol Utilities

14 Interoperability layer Utilities Initiator Target Coding Style Loosely- or Approximately-timed Core interfaces Sockets Generic payload Base protocol Utilities Convenience sockets Quantum keeper (LT) Payload event queues (AT) Instance-specific extensions (GP) Productivity Shortened learning curve Consistent coding style 14

15 The TLM-2.0 Standard CONTENTS Review of SystemC and TLM Review of TLM-2.0 Frequently Asked Questions

16 FAQ #1 "Do I want LT or AT or CA?" 16

17 Loosely-Timed Executing software The End! Initiator Initiator Initiator Resources: Bus Memory Peripherals Goal: execute software at full speed of host processor Target models do not consume any time, initiators run ahead Need the initiators to take turns Either have explicit synchronization points (can be untimed) or initiators must use a time quantum 17

18 Loosely-Timed Executing software Sync Initiator Initiator Initiator Resources: Bus Memory Peripherals Goal: execute software at full speed of host processor Target models do not consume any time, initiators run ahead Need the initiators to take turns Either have explicit synchronization points (can be untimed) or initiators must use a time quantum 18

19 Loosely-Timed Executing software Initiator Resources: Initiator Bus Memory Peripherals Initiator Quantum Goal: execute software at full speed of host processor Target models do not consume any time, initiators run ahead Need the initiators to take turns Either have explicit synchronization points (can be untimed) or initiators must use a time quantum 19

20 AT and CA No running ahead of simulation time; everything stays in sync AT CA BEGIN_REQ END_REQ BEGIN_RESP END_RESP Wake up at significant timing points Wake up every cycle 20

21 FAQ #2 "How do I model such-and-such a feature using TLM-2?" "What does it take to make a model TLM-2-compliant?" "How much of this 194-page LRM do I really need to understand?" "How can TLM-2 make models of different protocols interoperable?" 21

22 First Kind of Interoperability Use the full interoperability layer Use the generic payload + ignorable extensions Obey all the rules of the base protocol. The LRM is your rule book tlm_initiator_socket<32, tlm_base_protocol_types> my_socket; Initiator Interconnect Target Functional incompatibilities are still possible (e.g. writing to a ROM) 22

23 Second Kind of Interoperability Create a new protocol traits class Create user-defined generic payload extensions and phases as needed Make your own rules! tlm_initiator_socket<32, my_protocol> my_socket; Initiator Adapter Target One rule enforced: cannot bind sockets of differing protocol types Recommendation: keep close to the base protocol. The LRM is your guidebook The clever stuff in TLM-2.0 makes the adapter fast 23

24 FAQ #2 Q. "How do I model such-and-such a feature using TLM-2?" A. Either make do with the generic payload, or create extensions Q. "What does it take to make a model TLM-2-compliant?" A. Either obey the base protocol or make your own rules Q. "How much of this 194-page LRM do I really need to understand?" A. For the base protocol, everything except Utilities and TLM-1 Q. "How can TLM-2 make models of different protocols interoperable?" A. Either map onto the base protocol, or write adapters 24

25 FAQ #3 Q. "How do I model my algorithm using TLM-2.0" A1. Not applicable. TLM is communication-centric A2. Use the LT/AT coding styles as guidelines A3. Use the utilities at least as examples 25

26 FAQ #4 Q. "How do I use extensions? It's not really explained anywhere." 26

27 Create an Extension Class struct my_extension: tlm::tlm_extension<my_extension> { my_extension() { m_attribute1 =...; } virtual tlm_extension_base* clone() const { my_extension* ext = new my_extension; ext->m_attribute1 = this->m_attribute1; ext->m_attribute2 = this->m_attribute2; return ext; } Standard code to clone/copy virtual void copy_from( tlm_extension_base const& ext ) { m_attribute1 = static_cast<my_extension const &>(ext).m_attribute1; m_attribute2 = static_cast<my_extension const &>(ext).m_attribute2; } int m_attribute1; string m_attribute2; }; Any number of attributes 27

28 Setting and Getting Extensions Initiator tlm_generic_payload* trans;... my_extension* ext = new my_extension; ext->m_attribute1 = 1; ext->m_attribute2 = "foo"; trans->set_auto_extension( ext ); socket->b_transport( *trans, delay ); Target virtual void b_transport(... ) { my_extension* ext; trans.get_extension(ext); if (ext) {... = ext->m_attribute1;... = ext->m_attribute2;... } Have the initiator add the extension Target can test for an extension 28

29 FAQ #5 Q. "Okay, but you've not shown me how to create ignorable extensions. How do I do that?" A. Being ignorable is not an explicit property of an extension, but about how you use it 29

30 Ignorable Extensions An ignorable extension is able to be ignored Timestamp when the transaction was created An initiator ID or transaction ID Extensions that might not be ignorable An extended address (initiator might rely on extended address space) A priority (initiator might rely on high priority transaction executing first) A flag to lock the interconnect (initiator might rely on have exclusive access) 30

31 FAQ #6 Q. "How do I dispose of the extension object? Can I re-use it?" A. Use a memory manager 31

32 Using a Memory Manager Initiator Interconnect Target Allocate transaction object # refs 0123 acquire() Call nb_transport_fw acquire() nb_transport_fw acquire() nb_transport_fw Return nb_transport_fw Return nb_transport_bw Call nb_transport_bw Call release() Return nb_transport_bw release() Return nb_transport_bw release() free() 32

33 Memory Management Methods class tlm_generic_payload { public: tlm_generic_payload () ; tlm_generic_payload(tlm_mm_interface* mm) ; virtual ~tlm_generic_payload (); void set_mm(tlm_mm_interface* mm); bool has_mm(); void acquire(); void release(); int get_ref_count(); }; void deep_copy_from( const tlm_generic_payload& ) ; void update_original_from( const tlm_generic_payload& ); void free_all_extensions(); void reset();... Frees all auto-extensions 33

34 A User-Defined Memory Manager #include "tlm.h" class gp_mm: public tlm::tlm_mm_interface { typedef tlm::tlm_generic_payload gp_t; public: gp_mm(); virtual ~gp_mm(); gp_t* allocate() {... ptr = new gp_t( this );... } void free(gp_t* trans) { trans->reset();... }... Pass mm as constructor arg Called when ref count == 0 Free auto-extensions 34

35 Typical Coding Idiom my_module(sc_module_name _n, gp_mm* mm) : m_mm(mm) {...} Pass mm as constructor arg tlm_generic_payload* trans; trans = m_mm.allocate(); trans->acquire(); Get transaction object from mm Increment reference count my_extension* ext = new my_extension; ext->m_attribute1 = 1; ext->m_attribute2 = "foo"; trans->set_auto_extension( ext ); Allocate extension on heap Set for auto-deletion socket->b_transport( *trans, delay ); Not just for nb_transport trans->release(); Decrement reference count 35

36 FAQ #7 Q. "How do I connect multiple components together?" Q. "How do I model a bus with multiple masters/slaves?" Q. "How many sockets do I need for two-way communication?" Q. "How many transactions do I use?" 36

37 Example Topology Control Memory manager Initiator Data Target Target Initiator Multi-sockets Target Initiator Bus Interconnect Target Thread Target Initiator Controller Thread Target 37

38 Bridges tlm_*_socket< 32, protocol_a > tlm_*_socket< 32, protocol_b > Initiator Bridge Target deep_copy_from() update_original_from() Generic Payload Generic Payload Generic Payload Generic Payload Extension Extension Extension Extension Extension Extension Extension Extension Extension Extension Extension Extension Could pass the same transaction if their lifetimes allow 38

39 Copying the Data Array Deep-copy the data array in the bridge new_trans->set_data_ptr( &data_buffer ); new_trans->deep_copy_from ( original_trans ); new_trans->b_transport(...); original_trans->update_original_from( new_trans ); Copies back data array on read Shallow-copy the data array in the bridge new_trans->set_data_ptr( 0 ); new_trans->deep_copy_from ( original_trans ); new_trans->set_data_ptr( original_trans->get_data_ptr() ); new_trans->b_transport(...); original_trans->update_original_from( new_trans ); Does not touch data array 39

40 FAQ #7 Q. "How do I connect multiple components together?" A. By having one or more components act as a hub Q. "How do I model a bus with multiple masters/slaves?" A. The "hub" can do arbitration and routing. Use multi-sockets for convenience Q. "How many sockets do I need for two-way communication?" A. Each initiator needs an initiator socket, each target a target socket Q. "How many transactions do I use?" A. As few as possible 40

41 FAQ #8 Q. "How do I model something like a SPI port?" A. If you can abstract the functionality, use the base protocol Q. "How do I model something like a SPI port with accurate timing?" A. You can model precise timing with the AT coding style, but why not use RTL? Q. "How do I model something like AMBA, PCI, or USB?" A. Buy a model (or get one through a university/research program) 41

For More FREE Information IEEE 1666 standards.ieee.org/getieee/1666/index.html OSCI SystemC 2.2 and TLM-2.0 www.systemc.

42 For More FREE Information IEEE 1666 standards.ieee.org/getieee/1666/index.html OSCI SystemC 2.2 and TLM and examples and videos Tutorial introduction to TLM-2.0 and Free TLM-2.0 Protocol Checker 42

Introduction to Accellera TLM 2.0

Introduction to Accellera TLM 2.0 Aravinda Thimmapuram 10 th Sept 2015 Accellera Systems Initiative 1 Agenda Introduction to TLM and TLM 2.0 standard Case study of modelling a bus protocol using TLM 2.0