VHDL Symbolic simulator in OCaml
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1 VHDL Symbolic simulator in OCaml OCaml Meeting 2009 Grenoble France 04/02/2009 Florent Ouchet TIMA Labs GINP UJF CNRS VDS group
2 Outline VSYML Vhdl Symbolic Simulator in ocaml: Symbolic simulation goals Why OCaml? Application structure and limitations of OCaml in this context Perspectives Conclusion 2
3 Symbolic simulation goals Model is needed for: Model checking: equivalence of IC implementation and specification; Other formal methods based on the model: (ANR project FME 3 ) analysis of error consequences using formal methods. 3
4 Symbolic simulation goals Integrated circuit synthesis flow: Explicit time,behavioral FSM, complex types Boolean type Drawing of transistors and wires Modeling level Register Transfert Level Gate Level Layout Chips Manual refinements Automatic synthesis Placing and routing Manufacturing 4
5 Symbolic simulation goals Existing symbolic simulators: Explicit time,behavioral FSM, complex types Boolean type Drawing of transistors and wires Modeling level Register Transfert Level Gate Level Layout Chips VOSS/Forte (Intel CAD Labs) 5
6 Symbolic simulation goals Existing symbolic simulators: Explicit time,behavioral FSM, complex types Modeling level Register Transfert Level VSYML Boolean type Drawing of transistors and wires Gate Level Layout Chips 6
7 Symbolic simulation goals X t=0 ns X t=1 ns Y t=0 ns Y t=1 ns Integrated Circuit Description Design Under Test (DUT) X t=0 + Y t=1? Description written in VHDL (IEEE Std TM 2007) Symbolic values depend on the time. 7
8 Why OCaml? Expression patterns: 1 unary_operator X (not abs) X assoc_operator Y (+ * and or xor xnor) X binary_operator Y (nand nor ^ = /= < > <= >=) X other_operator Y (mod rem / -) (total of 28 patterns) 8
9 Why OCaml? type formula = FormulaSymbol of symbol FormulaImmediateInt of big_int FormulaUnaryOperator of (unary_operator*formula) FormulaAssociativeOperator of (assoc_operator*formula list) FormulaBinaryOperator of (binary_operator*formula*formula) FormulaOtherOperator of (other_operator*formula*formula list) 9
10 Why OCaml? Known expression patterns are rewritten (numeric evaluation); As in the standard, the simulation algorithm is intrinsically free of side effects. 10
11 Why OCaml? A DUT C B The next value of each signal is computed from current values. 11
12 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 12
13 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 13
14 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 14
15 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 15
16 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 16
17 Why OCaml? A DUT C B The processes are executed until the design is stabilized. 17
18 Why OCaml? Strong type checking (compared to C, Pascal ): confidence in computations; Lexer/parser generator; «Free» software, its ancestor was written in Mathematica; Lightweight and easy to redist (Java, C#, F#). 18
19 Application structure VHDL source files VSYML Design model parameters Standalone and automated application. 19
20 Application structure Some facts: Over lines of code 24 dedicated modules (types, basics, lexer, parser, resources, evaluators, converters, volume extrusion, top-level ) 20
21 Application structure VHDL source files (thousands lines) Straightforward conversion from BNF rules (language spec) Lexer (59 states, 1058 transitions) Parser (695 grammar rules,1318 states) Abstract syntax tree No syntax for optional tokens Debugging conflicts is a nightmare 21
22 Application structure Some basic functions are missing in OCaml standard libraries Abstract syntax tree Issue 4662 closed as «won t fix» Design elaboration Simulation structure tree 22
23 Application structure A function to map a list of functions to the same parameter: ( a -> b) list -> a -> b list A function to remove the n first list elements: a list -> int -> a list 23
24 Application structure Unbounded integers in VHDL (32 bits at least - "Time" requires 64 bits) Abstract syntax tree Simulation of design on n bits Design elaboration Big_int Simulation structure tree 24
25 Application structure Big_int is an abstract type Abstract syntax tree (=) (<) (>) on Big_int raise runtime exceptions Design elaboration Associative list functions based on (=) Simulation structure tree 25
26 Application structure Simulation structure tree Many executions of the functional structure with different evaluation contexts Simulation algorithm Simulation results 26
27 Application structure Signature of process simulation function: process -> structure_context -> evaluation_context -> changed_object list 27
28 Application structure Prototype of process simulation function: process -> structure_context -> evaluation_context -> changed_object list Functors for efficiency (+50%) 28
29 Application structure Prototype of process simulation function: process -> structure_context -> evaluation_context -> changed_signal list evaluation_context = { simulation_time: Big_int; currentvalues: (signal*formula) list; } Test with array, hashtbl and references 29
30 Application structure Some timings: FIR filter simulation, 1000 clock cycles. Parsing Simulation Output GC bytes + elab. memory assoc 40 ms 9.60 s 1.20 s 2.4 Mo 1189 Mo array 40 ms 1.82 s 1.20 s 2.4 Mo 910 Mo hashtbl 40 ms 2.00 s 1.17 s 2.3 Mo 921 Mo ref 40 ms 1.76 s 1.25 s 2.3 Mo 899 Mo 30
31 Application structure A DUT C B Load averaging for a multi-thread simulation. Communication efficiency for a distributed simulation. 31
32 Perspectives Spread the simulation over cores and computers: an integrated circuit is a fixed finite set of concurrent process concurrent simulation but: lots of rendez-vous and communications Irregular load Mathematics: loop invariants 32
33 Conclusion Development for project FME 3 is now finished. Research prototype for parallel computations? Release to the public? CeCill Licence? 33
34 Questions? Thanks for your attention 34
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