INTRODUCTION)TO)ARM) MICROPROCESSOR/MICROCONTROLLER

Size: px
Start display at page:

Download "INTRODUCTION)TO)ARM) MICROPROCESSOR/MICROCONTROLLER"

Transcription

1 ผศ.ดร.ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม ภาคว ชาว ศวกรรมคอมพ วเตอร คณะว ศวกรรมศาสตร สถาบ นเทคโนโลย พระจอมเกล าเจ าค ณทหาร ลาดกระบ ง INTRODUCTION)TO)ARM) MICROPROCESSOR/MICROCONTROLLER 1 CONTENTS! What%is%ARM?! Why%ARM?%! Why%Cortex%M3?! STM32F10x%Series%Block%Diagram! C%Programming! CMSIS%Library 2-2

2 What)is)ARM(Advanced)Risc)Machines)?! ARM%is%an%UK%company%that%designs% innovative%32jbit%microprocessors! ARM%leads%the%world%of%RISC% microprocessor%cores! ARM%develops%directly%and%through% partnership%the%tools,%systems%and% services%to%support%its%architecture. 2-3 Why)use)an)ARMAbased)processor?! Most%popular%32Jbit%core! Becoming%an%industrial%standard%like%the%C51! Compatible%leading%edge%core%roadmap! ARM7%J>%ARM9%/10J>CortexM3,%M4,! Large%number%of%product%choices! Multiple%vendors%means%a%large%choice 4

3 Why)Cortex)M3? More%Than%28%company ST,%NXP,%Atmel,%Samsung CortexAA)Series,%applications%processors%for%complex%OS%and%user%applications. CortexAR)Series,%realJtime%systems%profile. CortexAM)Series,%microcontroller%profile%optimized%for%costJsensitive%applications.. The)number)at)the)end)of)the)Cortex)name)refers)to)the)relative)performance) level,)with)1)the)lowest)and)8)the)highest. 5 STM32F10x)Packages:)LQFP100)vs.)LQFP64)! 100%pins%vs.%64%pins! More%pins,%Higher%Cost,%Easier%to%Use 2-6

4 STM32F10x)Series)Block)Diagram CORTEX TM AM3)))))) CPU 24)MHz Flash)I/F 256KBA512kB Flash)Memory Power)Supply Reg%1.8V POR/PDR/PVD JTAG/SW)Debug Nested)vect)IT)Ctrl 1)x)Systick)Timer DMA up%to%12%channels ARM) Lite)HiASpeed)36us Matrix)/)Arbiter)(max)24MHz) 24KBA32kB)SRAM 84B)Backup)Data FSMC SRAM/)NOR/)LCD)parallel) interface Clock)Control XTAL)oscillators 32KHz%+%4~25MHz Int.)RC)oscillators 40KHz%+%8MHz PLL RTC)/)AWU Bridge ARM Peripheral)Bus (max%24mhz) Bridge 1)x)16Abit)PWM) Synchronized%AC%Timer Up)to)16)Ext.)ITs 51/80/112)I/Os 1)x)SPI 1)x)USART/LIN Smartcard/IrDa Modem%Control ARM Peripheral)Bus (max%24mhz) 10)x)16Abit)Timer 2)x)Watchdog (independent%&%window) 2Achannel)12Abit)DAC 1)x)12Abit)ADC up%to%16%channels Temperature)Sensor 1)x)CEC 4)x)USART/LIN Smartcard%/%IrDa Modem%Control 2)x)SPI 2)x)I 2 C 2-7 CortexAM3)Processor(1/2)! Hierarchical%processor%integrating%core%and% advanced%system%peripherals! CortexJM3%Processor! CortexJM3%core! Configurable%interrupt%controller%! Bus%matrix! Advanced%debug%components(ETM )%! Optional%MPU(Not%available%in%STM32F10x)! CortexJM3%core! Harvard%architecture! 3Jstage%pipeline%prediction! Thumb J2! ALU%w.%H/W%divide%and%single%cycle%multiply 8

5 CortexAM3)Processor(2/2) Non Maskable Interrupt 3-Stage Pipeline, Harvard Architecture, Thumb-2 ISA (or Thumb) 30K* Gates Configurable Interrupts with Configurable Priority Levels SWD or JTAG Breakpoints Data Watchpoints & Trace * Preliminary gate counts & power consumption based on initial implementation Gate Counts are based on TSMC 0.18 at 50MHz Optional ETM & MPU gate counts not included Cortex M3 Total 60k* Gates 2-9 System)Architecture! Multiply)possibilities)of)bus)accesses)to)SRAM,)Flash,)Peripherals,)DMA! BusMatrix%added%to%Harvard%architecture%allows%parallel%access%! Efficient)DMA)and)Rapid)data)flow! Direct%path%to%SRAM%through%arbiter,%guarantees%alternating%access! Harvard%architecture%+%BusMatrix%allows%Flash%execution%in%parallel%with%DMA%transfer CORTEX-M3 Master 1 DAbus IAbus Flash I/F FLASH BusMatrix SRAM Slave APB2 Peripheral)Bus)APB2 GP-DMA Master 2 Arbiter AHB AHB-APB2 AHB-APB1 Bridges APB1 Peripheral Bus APB1 Buses are not overloaded with data movement tasks 2-10

6 STM32F10x) Block)Diagram 11 CortexAM3)Processor)Main)Features! ARM%v7M%Architecture! ThumbJ2%Instruction%Set%Architecture%! Mix%of%16%and%32%bit%instructions%for%very%high%code%density! Harvard%architecture! Separate%I%&%D%buses%allow%parallel%instruction%fetching%&%data%storage! Integrated%Nested%Vectored%Interrupt%Controller%(NVIC)%Vector%Table%is% addresses.! Integrated%Bus%Matrix! Data%memory%management! 3%Stage%Pipeline! Integrated%System%Timer%(SysTick)%for%Real%Time%OS 12

7 CortexAM3)Memory)Map 2-13 Memory)Mapping)and)Boot)Modes! Addressable)memory)space)of)4)GBytes! RAM):)up)to)32)kBytes! FLASH):)up)to)512)kBytes 0xFFFF FFFF 0xE xE00F FFFF 0xE Reserved CortexAM3) internal) peripherals! Boot)modes: Depending%on%the%Boot%configuration J Embedded%%Flash%Memory J System%Memory% J Embedded%%SRAM%Memory%% is%aliased%at%@0x00 Reserved Reserved Option)Bytes SystemMemory 0x1FFF F80F 0x1FFF F800 0x1FFF F7FF 0x1FFF F000 BOOT)Mode) Selection)Pins Boot)Mode Aliasing BOOT1 BOOT0 x 0 User)Flash User%Flash%is%selected%as% boot%space Reserved 0 1 SystemMemory SystemMemory%is% selected%as%boot%space Peripherals 0x Reserved SRAM 0x Reserved CODE 0x Flash 0x0801 FFFF 0x Embedded) SRAM Embedded%SRAM%is% selected%as%boot%space! SystemMemory: contains%the%bootloader used%to%%rejprogram%the%flash%through%usart

8 C)programming)for)embedded) microcontroller)systems. Assumes&experience&with& assembly&language&programming. V.)P.)Nelson 2J15 #include <hidef.h> #include <MC9S12C32.h> Basic C)programstructure /* commondefines and)macros */ /* I/O port/register names/addresses forthe MC9S12C32 microcontroller */ /*)Global)variables) accessible)by)all)functions)*/ int)count,)bob; //global)(static))variables) placed)in)ram /*)Function)definitions*/) int)function1(char)x)){)int) //parameter)x)passed)to)the)function,)function)returns)an)integer)value i,j; //local)(automatic))variables) allocated)to)stack)or)registers YY instructions)to)implement)the)function } /*)Main)program)*/)void)main(void)){ unsigned)char)sw1;) //local (automatic) variable (stack orregisters) int)k; //local (automatic) variable (stack orregisters) /* Initialization section */ YY instructions to initialize) variables, I/O ports, devices, function)registers /* Endless loop */ while (1) { //Can)also use:) for(;;) { YY instructions to be repeated } /* repeat forever */ } Declare local variables Initialize variables/devices Body of the program 16

9 Address 0x0000 0x0400 0x0800 0x1000 0x4000 0x8000 I/O)Registers Vacant 2KB RAM Vacant 16KB)Flash) Memory Vacant MC9S12C32 memory map Control registers for I/O [0x x03FF] 2K byte RAM [0x x0FFF] for variable & stack storage 16K byte Flash)EEPROM [0x x7FFF] for program code & constant data)storage 16KB Vacant: [0x xBFFF] (Available in larger devices)y MC9S12C64/96/128) 0xC000 0xFF00 16KB)Flash) Memory 16K)byte)Flash)EEPROM)[0x x7FFF] for)program)code)&)constant))data)storage Interrupt)vectors:)[0xFF00..0xFFFF])(Last) 256)bytes)of)Flash)EEPROM) 17 Microcontroller) include)file CodeWarrior provides a derivative;specific include file for each microcontroller, which defines memory addresses and symbolic labelsfor CPUand peripheralfunctionregisters. #include <hidef.h> /* common defines and&macros */ #include <MC9S12C32.h> /* derivative information */ #pragma&link_info&derivative&"mc9s12c32" //&DDRA&and&PORTA&addresses&are&defined&in&MC9S12C32.h& void&main(void)&{ DDRA)=)0xff;) // Set direction of Port A as output PORTA)=)0x55; // Set bits of Port A to) for(;;)&{} /* execute forever */ } 18

10 CodeWarrior C)data types Always)match)data)type)to)data)characteristics Variable)type)indicates)how)data)is)represented #bits)determines)range)of)numeric)values signed/unsigned)determines)which) arithmetic/relational)operators)are)to)be)used)by)the) compiler nonynumeric)data)should)be) unsigned Data$type$declaration$* Number$of$bits Range$of$values char$k;$$signed$char$k; 8 < unsigned$char$k; int$k;$$signed$int$k;$short$ 16 < k; signed$short$k; unsigned$int$k;$unsigned$ short$k; * First (black) form is preferred 19 Data type examples Read)bits)from)PORTA)(8)bits,)nonYnumeric) unsigned&char&n; n&=&porta; Read)TCNT)timer)value)(16Ybit)unsigned) unsigned&int&t; t&=&tcnt; Read)10Ybit)value)from)ADC)(unsigned) unsigned&int&a; a&=&adc; System)control)value)range)[Y ] int&ctrl; ctrl =&(x +&y)*z; Loop counter for 100 program loops (unsigned) unsigned&char&cnt; for (cnt =&0;&cnt <&20;&cnt++) { 20

11 Static variables Retained for use throughout the program in RAM locations that are not reallocated during program execution. Declare)either)within)or)outside)of)a)function If)declared)outside)a)function,)the)variable)is)global&in)scope, i.e.)known)to)all)functions)of)the)program Use) normal declarations.)example: int count; If)declared)within)a)function,)insert)key)word)static&before) the)variable)definition.)the)variable)is)local&in)scope,)i.e.) known)only)within)this)function. static&unsigned&char&bob;&static&int&pressure[10]; 2J21 Static variable example unsigned$char$count;$$//global)variable)is)static) allocated)a)fixed)ram)location //count)can)be)referenced)by)any)function void)math_op)()){ } int)i; static$int$j; if)(count)==)0)) j)=)0; i)=)count;)j)=)j) +)i; //automatic)variable) allocated)space)on)stack)when)function)entered //static)variable) allocated)a)fixed)ram)location)to)maintain)the)value //test)value)of)global)variable)count //initialize)static)variable)j)first)time)math_op())entered //initialize)automatic)variable)i)each)time)math_op())entered //change)static)variable)j) value)kept)for)next)function)call //return)&)deallocate)space)used)by)automatic)variable)i void)main(void)){) count)=)0; while)(1)){) math_op();) count++; } //initialize global)variable count //increment global variable count 2J22

12 Volatile variables Value)can)be)changed&by&outside&influences,)i.e.)by) factors)other)than)program)instructions values)applied)to)the)pins)of)an)input)port bits)within)a)timer)register result)of)an)analog)to)digital)conversion Used)to)access)µC)I/O)ports)and)function)registers Define)variable)name)as)a)pointer)to)the)port/register) address Then)use)as)any)other)variable #define&porta& PORTA&=&0x55; 8Ybit port (*((volatile unsigned char*)(0x0000))) /* write value 0x55to PORTA */ pointer address J23 Volatile variable example µc)i/o)ports)and)function)registers)are)defined)as) voltatile)variables DerivativeYspecific)include)file)defines)these)for)each)µC #define PORTA #define PORTB (*((volatile&unsigned&char*)(0x0000)))& (*((volatile&unsigned&char*)(0x0001))) From) include) file char&c; c&=&portb;& PORTA&=&c; /* read value from PORTB into variable c&*/ /* write value to PORTA from variable c&*/ Note: value at PORTB)determined by external sources 2J24

13 BitYparallel logical operators Bit-parallel (bitwise) logical operators produce n-bit results of the corresponding logical operation: & (AND) (OR) ^ (XOR) ~ (Complement) C = A & B; (AND) C = A B; (OR) C = A ^ B; (XOR) A B C A B C A B C B = ~A; A (COMPLEMENT) B J25 Bit)set/reset/complement/test Use a mask to select bit(s) to be altered C = A & 0xFE; A a b c d e f g h 0xFE C a b c d e f g 0 Clear)selected)bit)of)A C = A & 0x01; A 0xFE C a b c d e f g h h C = A 0x01; A a b c d e f g h 0x C a b c d e f g 1 C = A ^ 0x01; A a b c d e f g h 0x C a b c d e f g h Clear all but the selected bit of A Set selected bit of A Complement selected bit of A 2J26

14 Bit)examples for input/output Create)a) pulse on)bit)0)of)porta)(assume)bit) is)initially)0) PORTA&=&PORTA& &0x01; //Force&bit&0&to&1&PORTA&=&PORTA& &&0xFE; //Force&bit&0&to&0 Examples: if&(&(porta&&&0x80)&!=&0&)&&//or:&((porta&&&0x80)&==&0x80) bob(); c&=&portb&&&0x04; if&((porta&&&0x01)& ==&0)&PORTA&=&c& & 0x01; // call bob() if bit 7 of PORTA is&1 // mask&all but&bit 2 of PORTB value // test bit 0 of PORTA //&write c&to PORTA with bit&0 set to 1 2J27 /***)PTT)Y Port)T)I/O)Register;)0x )***/) typedef)union){ byte)byte;)struct){ byte PTT0 :1; /* Port T Bit 0 */ byte PTT1 :1; /*)Port T)Bit)1 */ byte PTT2 :1; /*)Port T)Bit)2 */ byte PTT3 :1; /* Port T)Bit)3 */ byte PTT4 :1; /* Port T)Bit)4 */ byte PTT5 :1; /* Port T)Bit)5 */ byte PTT6 :1; /* Port T)Bit)6 */ byte PTT7 :1; /* Port T)Bit)7 */ })Bits; })PTTSTR; extern)volatile)pttstr)_ptt)@(reg_base)+)0x ul); #define PTT #define PTT_PTT0 #define PTT_PTT1 #define PTT_PTT2 #define PTT_PTT3 #define PTT_PTT4 #define PTT_PTT5 #define PTT_PTT6 #define PTT_PTT7 _PTT.Byte _PTT.Bits.PTT0 _PTT.Bits.PTT1 _PTT.Bits.PTT2 _PTT.Bits.PTT3 _PTT.Bits.PTT4 _PTT.Bits.PTT5 _PTT.Bits.PTT6 _PTT.Bits.PTT7fine TFLG1 CodeWarrior)include)file) defines)µc)registers as)structures)of)bits,) allowing)access)to individual)register)bits.)(read) file)to)view)names.) byte is)defined)as) unsigned)char Equivalent&C&statements: PTT&=&PTT& &0x01;& PTT_PTT0&=&1; if&((ptt&&&0x04)&==&0x04)& If&(PTT_PTT2&==&1) _TFLG1.Byte 2J28

15 Example:)I/O port)bits PORTB h g f e d c b a unsigned)char)sw;) sw)=)portb; sw)=)portb)&)0x10; if (sw == 0x01) if (sw == 0x10) if (sw == 0) if)(sw)!=)0))portb)=) 0x5a;)PORTB_BIT4)=) 0; if)(portb_bit4)==)1)) if)(portb_bit4)==)sw) Switch)connected)to)bit)4)of)PORTB //8Ybit)unsigned)variable //)sw)=)hgfedcba //)sw)=)000e0000))(mask)all)but)bit)4) //)Result)is)sw)=) )or) //)NEVER)TRUE)for)above)sw,)which)is)000e0000 //)TRUE)if)e=1)(bit)4)in)result)of)PORTB)&)0x10) //)TRUE)if)e=0)in)PORTB)&)0x10)(sw= ) //)TRUE)if)e=1)in)PORTB)&)0x10)(sw= ) //)Write)to)8)bits)of)PORTB;)result)is) //)Sets)only)bit)e=0)in)PORTB))(PORTB)now)hgf0dcba) //)TRUE)if)e=1)(bit)4)of)PORTB) //)Mismatch:)comparing)bit)to)byte 2J29 Shift)operators Shift operators: x >> y (right shift operand x by y bit positions) x << y (left shift operand x by y bit positions) Vacated bits are filled with 0 s. Shift right/left fast way to multiply/divide by power of 2 B = A << 3; A (Left shift 3 bits) B B = A >> 2; A (Right shift 2 bits) B B = 1 ; B = (ASCII 0x31) C = 5 ; C = (ASCII 0x35) D = (B << 4) (C & 0x0F); (B << 4) = (C & 0x0F) = D = (Packed BCD 0x15) 2J30

16 WHILE loop structure Repeat)a)set)of)statements)(a) loop ))as)long) as)some)condition)is)met while&(a&<&b) { statement&s1;& statement&s2;. } a)< b? No Yes S1; S2; loop through)these) statements)while)a)<)b Somethingmust)eventually cause a >=)b, to)exit theloop 31 WHILE example PORTA bit0 0 1 Read) PORTB No) operation Wait)for)a)1)to)be)applied) to)bit)0)of)porta and)then)read)portb while ( (PORTA & 0x01) ==&0) {} c =&PORTB; // test bit 0 of PORTA // do&nothing&&&repeat if bit is&0 // read&portb after&above bit=&1 32

17 Keil%Development%Tools%for%ARM Includes%ARM%macro%assembler,%compilers%(ARM%RealView%C/C++%Compiler,% Keil%CARM%Compiler,%or%GNU%compiler),%ARM%linker,%Keil%uVision%Debugger% and%keil%uvision%ide Keil%uVision%Debugger%accurately%simulates%onJchip%peripherals%(I 2 C,%CAN,% UART,%SPI,%Interrupts,%I/O%Ports,%A/D%and%D/A%converters,%PWM,%etc.) Evaluation%Limitations 16K%byte%object%code%+%16K%data%limitation Some%linker%restrictions%such%as%base%addresses%for%code/constants GNU%tools%provided%are%not%restricted%in%any%way 33 Keil%Development%Tools%for%ARM 34

18 Definition: What%is%CMSIS? The%CortexJM3 %Microcontroller%Software%Interface%Standard%(CMSIS)%is%defined%in% close%cooperation%with%various%silicon%and%software%vendors%and%provides%a%common% approach%to%interface%to%peripherals,%realjtime%operating%systems%and%middleware% components.%for%more%details,%please%refer%to% CMSIS)layer)structure 35 Package%organization 36

19 STM32%Firmware%Library%User% Manual Main%page 37 STM32%Firmware%Library%User%Manual 38

20 STM32F10xxx%standard%peripheral%library%architecture J STM32%interrupt%IRQ%list/%Specific% options%for%the%cortexjm3%core J STM32%peripheral%memory%mapping% and%physical%register%address%definition J Configuration%options User%application CortexJM3%exceptions Peripheral%header%file Include%NVIC%and% SysTick%%drivers LowJlevel%&%API%functions%to% Perform%basic%operations% offered%by%the%%peripheral 39 Coding%conventions All%firmware%is%coded%in%ANSIJC Strict%ANSIJC%for%all%library%peripheral%files Relaxed%ANSIJC%for%projects%&%Examples%files. PPP is used to reference any peripheral acronym, e.g. TIM for Timer. Registers & Structures FW library registers have the same names as in STM32F10x Datasheet & reference manual. All registers hardware accesses are performed through a C structures : Improve code rejuse : e.g. the same structure to handle and initialize 3 USARTs. 40

21 Using%the%Library%(1/4) 1) Before%configuring%a%peripheral,%you%have%to%enable%its%clock%by%calling%one%of%the% following%functions: RCC_AHBPeriphClockCmd(RCC_AHBPeriph_PPPx%,%ENABLE)o RCC_APB2PeriphClockCmd(RCC_APB2Periph_PPPx%,%ENABLE)o RCC_APB1PeriphClockCmd(RCC_APB1Periph_PPPx%,%ENABLE)o 2),PPP_DeInit(..) function%can%be%used%to%set%all%ppp s%peripheral%registers%to%their% reset%values: PPP_DeInit(PPPx)o 3)%If%after%peripheral%configuration,%the%user%wants%to%modify%one%or%more%peripheral% settings%he%should%proceed%as%following:% PPP_InitStucture.memberX%=%valXo PPP_InitStructure.memberY%=%valYo PPP_Init(PPPx,%&PPP_InitStructure)o 41 Using%the%Library%(2/4) At%this%stage%the%PPP%peripheral%is%initialized%and%can%be%enabled%by%making%a% call%to%ppp_cmd(..)%function:%ppp_cmd(pppx,%enable)o% Note:%This%function%is%used%only%for%communication%peripherals%like%UART,%% SPI,% To%access%the%functionality%of%the%PPP%peripheral,%the%user%can%use%a%set%of% dedicated%functions.%these%functions%are%specific%to%the%peripheral%and%for% more%details%refer%to%stm32f10x%firmware%library%user%manual. Example%of%GPIO Functions%available% 42

22 Using%the%Library%(3/4) UART1)configuration)example : /*)Enable)USART1)Clock)*/ RCC_APB2PeriphClockCmd()USART1,)ENABLE )d) /*)set)all)uart1 s)peripheral)registers)to)their)reset)values)*/ USART_DeInit()USART1 ))d /*)USART1)configuration)AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA*/ /*)USART1)configured)as)follow: A BaudRate)=)19200)baud)) A Word)Length)=)8)Bits A One)Stop)Bit A Even)parity A Hardware)flow)control)disabled)(RTS)and)CTS)signals) A Receive)and)transmit)enabled */ USART_InitStructure.USART_BaudRate)=)9600d USART_InitStructure.USART_WordLength)=)USART_WordLength_8bd USART_InitStructure.USART_StopBits)=)USART_StopBits_1d USART_InitStructure.USART_Parity)=)USART_Parity_Evend USART_InitStructure.USART_HardwareFlowControl)=)USART_HardwareFlowControl_Noned USART_InitStructure.USART_Mode)=)USART_Mode_Rx )USART_Mode_Txd /*)Configure)USART1)*/ USART_Init()USART1,)&USART_InitStructure)d /*)Enable)USART1)*/ USART_Cmd()USART1,)ENABLE )d USART)1)is)ready)now) 43 Using%the%Library%(4/4) Files)to)be)modified)by)the)user:! stm32f10x_conf.h /*%Includes%JJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJ */ /*%Uncomment%the%line%below%to%enable%peripheral%header%file% inclusion%*/ /*%#include%"stm32f10x_adc.h"%*/ /*%#include%"stm32f10x_bkp.h"%*/ /*%#include%"stm32f10x_can.h"%*/! stm32f10x.h /*%Uncomment%the%line%below%according%to%the%target%STM32% device%used%in%your%%application%%%*/ #if%!defined%(stm32f10x_ld)%&&%!defined% (STM32F10X_MD)%&&%!defined%(STM32F10X_HD) /*%#define%stm32f10x_ld%*/%%%/*!<%stm32%low%density% devices%*/ #endif /*%STM32F10x%Interrupt%Number%Definition*/ EXTI0_IRQn%%%%%%%%%%%%%%%%%%%%%=%6,%%/*!<%EXTI%Line0%Interrupt%*/%%%%%%%%%%%%%%%%%%%%%%%%%%% EXTI1_IRQn%%%%%%%%%%%%%%%%%%%=%7,%%%/*!<%EXTI%Line1%Interrupt%*/%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% DMA1_Channel1_IRQn%%=%11,%/*!<%DMA1%Channel%1%global%Interrupt%*/! main.c #include%"stm32f10x.h int%main(void) {... GPIO_WriteBit(GPIOD,%GPIO_Pin_1,%Bit_SET)o }! stm32f10x_it.h /*%Exported%functions%JJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJJ */ void%nmi_handler(void)o void%hardfault_handler(void)o! stm32f10x_it.c #include%"stm32f10x_it.h" void%exti1_irqhandler(void) { GPIO_WriteBit(GPIOD,%GPIO_Pin_1,%Bit_SET)o } 44

C programming for embedded microcontroller systems.

C programming for embedded microcontroller systems. C programming for embedded microcontroller systems. Assumes experience with assembly language programming. Outline Program organization and microcontroller memory Data types, constants, variables Microcontroller

More information

ARM Cortex M3 & General Purpose Input/Output (GPIO)

ARM Cortex M3 & General Purpose Input/Output (GPIO) ARM Cortex M3 & General Purpose Input/Output (GPIO) ผศ.ดร.ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม ภาคว ชาว ศวกรรมคอมพ วเตอร คณะว ศวกรรมศาสตร สถาบ นเทคโนโลย พระจอมเกล าเจ าค ณทหารลาดกระบ ง STM32F10x &

More information

Introduction. Serial Peripheral Interface (SPI) SPI Basics. Capabilities of SPI

Introduction. Serial Peripheral Interface (SPI) SPI Basics. Capabilities of SPI Introduction Serial Peripheral Interface http://upload.wikimedia.org/wikipedia/commons/thumb/e/ed/ SPI_single_slave.svg/35px-SPI_single_slave.svg.png Serial Peripheral Interface (SPI)! What is it?! Basic

More information

Introduction. ! Exception*are*events*! They*occur*during*the*execution*of*the*program! Type*of*ARM*exceptions*! Exceptions*that*result*by*a*command

Introduction. ! Exception*are*events*! They*occur*during*the*execution*of*the*program! Type*of*ARM*exceptions*! Exceptions*that*result*by*a*command Exceptions and Interrupts ARM Cortex M3 ผศ.ดร. ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม ภาคว ชาว ศวกรรมคอมพ วเตอร คณะว ศวกรรมศาสตร สถาบ นเทคโนโลย พระจอมเกล าเจ าค ณทหารลาดกระบ ง Introduction! Exception*are*events*!

More information

Interconnects, Memory, GPIO

Interconnects, Memory, GPIO Interconnects, Memory, GPIO Dr. Francesco Conti f.conti@unibo.it Slide contributions adapted from STMicroelectronics and from Dr. Michele Magno, others Processor vs. MCU Pipeline Harvard architecture Separate

More information

Ethernet'Basics' Topics' Typical'of5ice'wiring' What'is'Ethernet'?'

Ethernet'Basics' Topics' Typical'of5ice'wiring' What'is'Ethernet'?' Topics' Ethernet'Basics' ผศ.ดร. ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม ภาคว ชาว ศวกรรมคอมพ วเตอร คณะว ศวกรรมศาสตร สถาบ นเทคโนโลย พระจอมเกล าเจ าค ณทหารลาดกระบ ง History,"Standards,"Terminologies" Transmission"media"

More information

Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller

Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller ELCE 3040/3050 Lab Session 2 (write-up on course web page) Important References (on course web page): Tutorial: C programming

More information

ELEC 3040/3050 Lab Manual Lab 2 Revised 8/20/14. LAB 2: Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller

ELEC 3040/3050 Lab Manual Lab 2 Revised 8/20/14. LAB 2: Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller LAB 2: Developing and Debugging C Programs in MDK-ARM for the STM32L100RC Microcontroller The objective of this laboratory session is to become more familiar with the process for creating, executing and

More information

to ARM Cortex TM -M3 October 17, 2007 MCD Application Team

to ARM Cortex TM -M3 October 17, 2007 MCD Application Team Introduction to ARM Cortex TM -M3 October 17, 2007 MCD Application Team CONTENTS Introduction to the Cortex-M3 Architecture Overview Comparison to ARM7 Bit Banding and Unaligned data access Interrupt and

More information

ARM Processors for Embedded Applications

ARM Processors for Embedded Applications ARM Processors for Embedded Applications Roadmap for ARM Processors ARM Architecture Basics ARM Families AMBA Architecture 1 Current ARM Core Families ARM7: Hard cores and Soft cores Cache with MPU or

More information

MICROPROCESSOR BASED SYSTEM DESIGN

MICROPROCESSOR BASED SYSTEM DESIGN MICROPROCESSOR BASED SYSTEM DESIGN Lecture 5 Xmega 128 B1: Architecture MUHAMMAD AMIR YOUSAF VON NEUMAN ARCHITECTURE CPU Memory Execution unit ALU Registers Both data and instructions at the same system

More information

LPC4370FET256. Features and benefits

LPC4370FET256. Features and benefits Page 1 of 5 LPC4370FET256 32-bit ARM Cortex-M4 + 2 x M0 MCU; 282 kb SRAM; Ethernet;two HS USBs; 80 Msps 12-bit ADC; configurable peripherals The LPC4370 are ARM Cortex-M4 based microcontrollers for embedded

More information

AVR Microcontrollers Architecture

AVR Microcontrollers Architecture ก ก There are two fundamental architectures to access memory 1. Von Neumann Architecture 2. Harvard Architecture 2 1 Harvard Architecture The term originated from the Harvard Mark 1 relay-based computer,

More information

AN Migrating to the LPC1700 series

AN Migrating to the LPC1700 series Rev. 01 6 October 2009 Application note Document information Info Keywords Abstract Content LPC1700, Migration, LPC2300/2400, ARM7, Cortex-M3 This application note introduces the important features of

More information

L2 - C language for Embedded MCUs

L2 - C language for Embedded MCUs Formation C language for Embedded MCUs: Learning how to program a Microcontroller (especially the Cortex-M based ones) - Programmation: Langages L2 - C language for Embedded MCUs Learning how to program

More information

Introduction to the MC9S12 Hardware Subsystems

Introduction to the MC9S12 Hardware Subsystems Setting and clearing bits in C Using pointers in C o Program to count the number of negative numbers in an area of memory Introduction to the MC9S12 Hardware Subsystems o The MC9S12 timer subsystem Operators

More information

ECE254 Lab3 Tutorial. Introduction to MCB1700 Hardware Programming. Irene Huang

ECE254 Lab3 Tutorial. Introduction to MCB1700 Hardware Programming. Irene Huang ECE254 Lab3 Tutorial Introduction to MCB1700 Hardware Programming Irene Huang Lab3 Requirements : API Dynamic Memory Management: void * os_mem_alloc (int size, unsigned char flag) Flag takes two values:

More information

Exceptions and Interrupts ARM Cortex M3

Exceptions and Interrupts ARM Cortex M3 Exceptions and Interrupts ARM Cortex M3 ผศ.ดร. ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม 1 Introduction! Exception are events! They occur during the execution of the program! ARM exceptions! Exceptions

More information

RM3 - Cortex-M4 / Cortex-M4F implementation

RM3 - Cortex-M4 / Cortex-M4F implementation Formation Cortex-M4 / Cortex-M4F implementation: This course covers both Cortex-M4 and Cortex-M4F (with FPU) ARM core - Processeurs ARM: ARM Cores RM3 - Cortex-M4 / Cortex-M4F implementation This course

More information

ARM Cortex-M4 Architecture and Instruction Set 1: Architecture Overview

ARM Cortex-M4 Architecture and Instruction Set 1: Architecture Overview ARM Cortex-M4 Architecture and Instruction Set 1: Architecture Overview M J Brockway January 25, 2016 UM10562 All information provided in this document is subject to legal disclaimers. NXP B.V. 2014. All

More information

EE 308 Spring A software delay. To enter a software delay, put in a nested loop, just like in assembly.

EE 308 Spring A software delay. To enter a software delay, put in a nested loop, just like in assembly. More on Programming the 9S12 in C Huang Sections 5.2 through 5.4 Introduction to the MC9S12 Hardware Subsystems Huang Sections 8.2-8.6 ECT_16B8C Block User Guide A summary of MC9S12 hardware subsystems

More information

STM32 F-2 series High-performance Cortex-M3 MCUs

STM32 F-2 series High-performance Cortex-M3 MCUs STM32 F-2 series High-performance Cortex-M3 MCUs STMicroelectronics 32 bit microcontrollers, 120 MHz/150 DMIPS with ART Accelerator TM and advanced peripherals www.st.com/stm32 STM32 F-2 series The STM32

More information

Copyright 2016 Xilinx

Copyright 2016 Xilinx Zynq Architecture Zynq Vivado 2015.4 Version This material exempt per Department of Commerce license exception TSU Objectives After completing this module, you will be able to: Identify the basic building

More information

Application Note. Migrating from 8051 to Cortex Microcontrollers. Document number: ARM DAI 0237 Issued: July 2010 Copyright ARM Limited 2010

Application Note. Migrating from 8051 to Cortex Microcontrollers. Document number: ARM DAI 0237 Issued: July 2010 Copyright ARM Limited 2010 Application Note 237 Migrating from 8051 to Cortex Microcontrollers Document number: ARM DAI 0237 Issued: July 2010 Copyright ARM Limited 2010 Application Note 237 Copyright 2010 ARM Limited. All rights

More information

Ethernet'Basics. Topics

Ethernet'Basics. Topics 'Basics ผศ.ดร.ส ร นทร ก ตต ธรก ล และ อ.สรย ทธ กลมกล อม ภาคว ชาว ศวกรรมคอมพ วเตอร คณะว ศวกรรมศาสตร สถาบ นเทคโนโลย พระจอมเกล าเจ าค ณทหารลาดกระบ ง Topics History,)Standards,)Terminologies Transmission)media

More information

Universität Dortmund. ARM Cortex-M3 Buses

Universität Dortmund. ARM Cortex-M3 Buses ARM Cortex-M3 Buses Modulo 2 No change in class organization Thursday aftenoon (17-19) Lectures (Rossi) Aprile Giugno (Mod 2) room 1.3 Friday afternoon (14-18) (Benatti): LAB2 Content natural prosecution

More information

STM32 F0 Value Line. Entry-level MCUs

STM32 F0 Value Line. Entry-level MCUs STM32 F0 Value Line Entry-level MCUs Key Messages 2 STM32 F0: Is the Cortex -M0 core generated with ST s STM32 DNA, for cost sensitive designs. The STM32 F0 is benefiting of STM32 DNA, providing the essential

More information

Chapter 15 ARM Architecture, Programming and Development Tools

Chapter 15 ARM Architecture, Programming and Development Tools Chapter 15 ARM Architecture, Programming and Development Tools Lesson 07 ARM Cortex CPU and Microcontrollers 2 Microcontroller CORTEX M3 Core 32-bit RALU, single cycle MUL, 2-12 divide, ETM interface,

More information

CS/ECE 5780/6780: Embedded System Design

CS/ECE 5780/6780: Embedded System Design CS/ECE 5780/6780: Embedded System Design John Regehr Lecture 2: 68HC12 Architecture & Lab 1 Introduction Duff s Device void foo (int x, int *y, int *z) { switch (x % 8) { case 0: do { *y++ = *z++; case

More information

UM LPC5410x User Manual. Document information. LPC5410x, ARM Cortex-M4, ARM Cortex-M0+, microcontroller, sensor hub

UM LPC5410x User Manual. Document information. LPC5410x, ARM Cortex-M4, ARM Cortex-M0+, microcontroller, sensor hub LPC541x User manual Rev. 2.5 25 April 217 User manual Document information Info Keywords Abstract Content LPC541x, ARM Cortex-M4, ARM Cortex-M+, microcontroller, sensor hub LPC541x User Manual LPC541x

More information

M2351 Security Architecture. TrustZone Technology for Armv8-M Architecture

M2351 Security Architecture. TrustZone Technology for Armv8-M Architecture Architecture TrustZone Technology for Armv8-M Architecture Outline NuMicro Architecture TrustZone for Armv8-M Processor Core, Interrupt Handling, Memory Partitioning, State Transitions. TrustZone Implementation

More information

EE 308: Microcontrollers

EE 308: Microcontrollers EE 308: Microcontrollers AVR Architecture Aly El-Osery Electrical Engineering Department New Mexico Institute of Mining and Technology Socorro, New Mexico, USA January 23, 2018 Aly El-Osery (NMT) EE 308:

More information

History of the Microprocessor. ECE/CS 5780/6780: Embedded System Design. Microcontrollers. First Microprocessors. MC9S12C32 Block Diagram

History of the Microprocessor. ECE/CS 5780/6780: Embedded System Design. Microcontrollers. First Microprocessors. MC9S12C32 Block Diagram History of the Microprocessor ECE/CS 5780/6780: Embedded System Design Chris J. Myers Lecture 1: 68HC12 In 1968, Bob Noyce and Gordon Moore left Fairchild Semiconductor and formed Integrated Electronics

More information

RISC-V Core IP Products

RISC-V Core IP Products RISC-V Core IP Products An Introduction to SiFive RISC-V Core IP Drew Barbier September 2017 drew@sifive.com SiFive RISC-V Core IP Products This presentation is targeted at embedded designers who want

More information

AVR XMEGA TM. A New Reference for 8/16-bit Microcontrollers. Ingar Fredriksen AVR Product Marketing Director

AVR XMEGA TM. A New Reference for 8/16-bit Microcontrollers. Ingar Fredriksen AVR Product Marketing Director AVR XMEGA TM A New Reference for 8/16-bit Microcontrollers Ingar Fredriksen AVR Product Marketing Director Kristian Saether AVR Product Marketing Manager Atmel AVR Success Through Innovation First Flash

More information

STM32 MICROCONTROLLER

STM32 MICROCONTROLLER STM32 MICROCONTROLLER Lecture 2 Prof. Yasser Mostafa Kadah Harvard and von Neumann Architectures Harvard Architecture a type of computer architecture where the instructions (program code) and data are

More information

ARM Processor Architecture

ARM Processor Architecture Chapters 1 and 3 ARM Processor Architecture Embedded Systems with ARM Cortext-M Updated: Monday, February 5, 2018 A Little about ARM The company Originally Acorn RISC Machine (ARM) Later Advanced RISC

More information

Microcontrollers. Microcontroller

Microcontrollers. Microcontroller Microcontrollers Microcontroller A microprocessor on a single integrated circuit intended to operate as an embedded system. As well as a CPU, a microcontroller typically includes small amounts of RAM and

More information

EE 354 Fall 2015 Lecture 1 Architecture and Introduction

EE 354 Fall 2015 Lecture 1 Architecture and Introduction EE 354 Fall 2015 Lecture 1 Architecture and Introduction Note: Much of these notes are taken from the book: The definitive Guide to ARM Cortex M3 and Cortex M4 Processors by Joseph Yiu, third edition,

More information

ARM CORTEX-R52. Target Audience: Engineers and technicians who develop SoCs and systems based on the ARM Cortex-R52 architecture.

ARM CORTEX-R52. Target Audience: Engineers and technicians who develop SoCs and systems based on the ARM Cortex-R52 architecture. ARM CORTEX-R52 Course Family: ARMv8-R Cortex-R CPU Target Audience: Engineers and technicians who develop SoCs and systems based on the ARM Cortex-R52 architecture. Duration: 4 days Prerequisites and related

More information

UM LPC3180 User Manual. Document information. LPC3180; ARM9; 16/32-bit ARM microcontroller User manual for LPC3180

UM LPC3180 User Manual. Document information. LPC3180; ARM9; 16/32-bit ARM microcontroller User manual for LPC3180 UM1198 LPC318 User Manual Rev. 1 6 June 26 User manual Document information Info Content Keywords LPC318; ARM9; 16/32-bit ARM microcontroller Abstract User manual for LPC318 UM1198 LPC318 User Manual Revision

More information

STM32 F2 series High performance Cortex M3 MCUs

STM32 F2 series High performance Cortex M3 MCUs STM32 F2 series High performance Cortex M3 MCUs STMicroelectronics 32 bit microcontrollers, 120 MHz/150 DMIPS with ART Accelerator TM and advanced peripherals www.st.com/stm32 STM32 F2 series The STM32

More information

Welcome to this presentation of the STM32 direct memory access controller (DMA). It covers the main features of this module, which is widely used to

Welcome to this presentation of the STM32 direct memory access controller (DMA). It covers the main features of this module, which is widely used to Welcome to this presentation of the STM32 direct memory access controller (DMA). It covers the main features of this module, which is widely used to handle the STM32 peripheral data transfers. 1 The Direct

More information

ARM ARCHITECTURE. Contents at a glance:

ARM ARCHITECTURE. Contents at a glance: UNIT-III ARM ARCHITECTURE Contents at a glance: RISC Design Philosophy ARM Design Philosophy Registers Current Program Status Register(CPSR) Instruction Pipeline Interrupts and Vector Table Architecture

More information

STM bit ARM Cortex MCUs STM32F030 Series

STM bit ARM Cortex MCUs STM32F030 Series STM32 32-bit ARM Cortex MCUs STM32F030 Series ST has licensed Cortex-M processors 2 Forget traditional 8/16/32-bit classifications and get Seamless architecture across all applications Every product optimized

More information

Embedded Systems. PIC16F84A Internal Architecture. Eng. Anis Nazer First Semester

Embedded Systems. PIC16F84A Internal Architecture. Eng. Anis Nazer First Semester Embedded Systems PIC16F84A Internal Architecture Eng. Anis Nazer First Semester 2017-2018 Review Computer system basic components? CPU? Memory? I/O? buses? Instruction? Program? Instruction set? CISC,

More information

The ARM Cortex-M0 Processor Architecture Part-1

The ARM Cortex-M0 Processor Architecture Part-1 The ARM Cortex-M0 Processor Architecture Part-1 1 Module Syllabus ARM Architectures and Processors What is ARM Architecture ARM Processors Families ARM Cortex-M Series Family Cortex-M0 Processor ARM Processor

More information

Hello, and welcome to this presentation of the STM32L4 System Configuration Controller.

Hello, and welcome to this presentation of the STM32L4 System Configuration Controller. Hello, and welcome to this presentation of the STM32L4 System Configuration Controller. 1 Please note that this presentation has been written for STM32L47x/48x devices. The key differences with other devices

More information

Contents. Cortex M On-Chip Emulation. Technical Notes V

Contents. Cortex M On-Chip Emulation. Technical Notes V _ Technical Notes V9.12.225 Cortex M On-Chip Emulation Contents Contents 1 1 Introduction 2 2 Access Breakpoints 3 3 Trace 5 4 NXP LPC 5 4.1 Boot and Memory Remapping 5 4.2 LPC17xx Startup 5 4.1 LPC11A02/04

More information

STM32: Peripherals. Alberto Bosio November 29, Univeristé de Montpellier

STM32: Peripherals. Alberto Bosio November 29, Univeristé de Montpellier STM32: Peripherals Alberto Bosio bosio@lirmm.fr Univeristé de Montpellier November 29, 2017 System Architecture 2 System Architecture S0: I-bus: This bus connects the Instruction bus of the Cortex-M4 core

More information

Universität Dortmund. ARM Architecture

Universität Dortmund. ARM Architecture ARM Architecture The RISC Philosophy Original RISC design (e.g. MIPS) aims for high performance through o reduced number of instruction classes o large general-purpose register set o load-store architecture

More information

Advanced Microcontrollers Grzegorz Budzyń Extras: STM32F4Discovery

Advanced Microcontrollers Grzegorz Budzyń Extras: STM32F4Discovery Advanced Microcontrollers Grzegorz Budzyń Extras: STM32F4Discovery Plan STM32F4Discovery module STM32F407 description STM32F4Discovery STM32F4Discovery Easily availble(farnell), cheap(~15 EUR) and powerful

More information

Memory Map for the MCU320 board:

Memory Map for the MCU320 board: Memory Map for the MCU320 board: The Intel 8051 MCUs and all derivatives are based on the Harvard architecture. This is to say that they have separate memory space for program (CODE) and external data

More information

ATmega128. Introduction

ATmega128. Introduction ATmega128 Introduction AVR Microcontroller 8-bit microcontroller released in 1997 by Atmel which was founded in 1984. The AVR architecture was conceived by two students (Alf-Egil Bogen, Vergard-Wollen)

More information

STM32F4 Introduction F1/F2/F4 Comparison Features Highlight

STM32F4 Introduction F1/F2/F4 Comparison Features Highlight STM32F4 Introduction F1/F2/F4 Comparison Features Highlight February 20 th 2012 2 Content Product family overview F1/F2/F4 features comparisons Features highlight Boot & Remap feature RTC calibration &

More information

UM LPC5410x User Manual. Document information. LPC5410x, ARM Cortex-M4, ARM Cortex-M0+, microcontroller, sensor hub

UM LPC5410x User Manual. Document information. LPC5410x, ARM Cortex-M4, ARM Cortex-M0+, microcontroller, sensor hub LPC5410x User manual Rev. 2.0 10 April 2015 User manual Document information Info Keywords Abstract Content LPC5410x, ARM Cortex-M4, ARM Cortex-M0+, microcontroller, sensor hub LPC5410x User Manual LPC5410x

More information

STM32 ARM Cortex TM - M3 Based Product Introduction. Sept 2007

STM32 ARM Cortex TM - M3 Based Product Introduction. Sept 2007 STM32 ARM Cortex TM - M3 Based Product Introduction Sept 2007 What is the STM32? STM32 reshapes the Microcontroller Market First MCU family combining 32bit performance and features with the integration

More information

AN5123 Application note

AN5123 Application note Application note STSPIN32F0A - bootloader and USART protocol Introduction Cristiana Scaramel The STSPIN32F0A is a system-in-package providing an integrated solution suitable for driving three-phase BLDC

More information

NXP Unveils Its First ARM Cortex -M4 Based Controller Family

NXP Unveils Its First ARM Cortex -M4 Based Controller Family NXP s LPC4300 MCU with Coprocessor: NXP Unveils Its First ARM Cortex -M4 Based Controller Family By Frank Riemenschneider, Editor, Electronik Magazine At the Electronica trade show last fall in Munich,

More information

CN310 Microprocessor Systems Design

CN310 Microprocessor Systems Design CN310 Microprocessor Systems Design Microcontroller Nawin Somyat Department of Electrical and Computer Engineering Thammasat University Outline Course Contents 1 Introduction 2 Simple Computer 3 Microprocessor

More information

AND SOLUTION FIRST INTERNAL TEST

AND SOLUTION FIRST INTERNAL TEST Faculty: Dr. Bajarangbali P.E.S. Institute of Technology( Bangalore South Campus) Hosur Road, ( 1Km Before Electronic City), Bangalore 560100. Department of Electronics and Communication SCHEME AND SOLUTION

More information

(Embedded) Systems Programming Overview

(Embedded) Systems Programming Overview System Programming Issues EE 357 Unit 10a (Embedded) Systems Programming Overview Embedded systems programming g have different design requirements than general purpose computers like PC s I/O Electro-mechanical

More information

Chapter 7 Central Processor Unit (S08CPUV2)

Chapter 7 Central Processor Unit (S08CPUV2) Chapter 7 Central Processor Unit (S08CPUV2) 7.1 Introduction This section provides summary information about the registers, addressing modes, and instruction set of the CPU of the HCS08 Family. For a more

More information

AT91 ARM Thumb Microcontrollers. M63200 M63800 Summary. Features. Description

AT91 ARM Thumb Microcontrollers. M63200 M63800 Summary. Features. Description Features Utilizes the ARM7TDMI ARM Thumb Processor High-performance 32-bit RISC architecture High-density 16-bit Instruction Set Leader in MIPS/Watt Embedded ICE (In Circuit Emulation) 2/8K bytes Internal

More information

CISC RISC. Compiler. Compiler. Processor. Processor

CISC RISC. Compiler. Compiler. Processor. Processor Q1. Explain briefly the RISC design philosophy. Answer: RISC is a design philosophy aimed at delivering simple but powerful instructions that execute within a single cycle at a high clock speed. The RISC

More information

FIFTH SEMESTER DIPLOMA EXAMINATION IN ENGINEERING/ TECHNOLOGY-MARCH 2014 EMBEDDED SYSTEMS (Common for CT,CM) [Time: 3 hours] (Maximum marks : 100)

FIFTH SEMESTER DIPLOMA EXAMINATION IN ENGINEERING/ TECHNOLOGY-MARCH 2014 EMBEDDED SYSTEMS (Common for CT,CM) [Time: 3 hours] (Maximum marks : 100) (Revision-10) FIFTH SEMESTER DIPLOMA EXAMINATION IN ENGINEERING/ TECHNOLOGY-MARCH 2014 EMBEDDED SYSTEMS (Common for CT,CM) [Time: 3 hours] (Maximum marks : 100) PART-A (Maximum marks : 10) I. Answer all

More information

ECE2049 E17 Lecture 4 MSP430 Architecture & Intro to Digital I/O

ECE2049 E17 Lecture 4 MSP430 Architecture & Intro to Digital I/O ECE2049-E17 Lecture 4 1 ECE2049 E17 Lecture 4 MSP430 Architecture & Intro to Digital I/O Administrivia Homework 1: Due today by 7pm o Either place in box in ECE office or give to me o Office hours tonight!

More information

Contents of this presentation: Some words about the ARM company

Contents of this presentation: Some words about the ARM company The architecture of the ARM cores Contents of this presentation: Some words about the ARM company The ARM's Core Families and their benefits Explanation of the ARM architecture Architecture details, features

More information

STM32F7 series ARM Cortex -M7 powered Releasing your creativity

STM32F7 series ARM Cortex -M7 powered Releasing your creativity STM32F7 series ARM Cortex -M7 powered Releasing your creativity STM32 high performance Very high performance 32-bit MCU with DSP and FPU The STM32F7 with its ARM Cortex -M7 core is the smartest MCU and

More information

Processor Register Set of M16C

Processor Register Set of M16C Processor Register Set of M6C 2 banks of general-purpose registers 4 6-bit data registers R - R3 Upper and lower bytes of registers R and R can be used as 8-bit registers (RL, RH, RL, RH) 2 6-bit address

More information

Embedded Busses. Large semiconductor. Core vendors. Interconnect IP vendors. STBUS (STMicroelectronics) Many others!

Embedded Busses. Large semiconductor. Core vendors. Interconnect IP vendors. STBUS (STMicroelectronics) Many others! Embedded Busses Large semiconductor ( IBM ) CoreConnect STBUS (STMicroelectronics) Core vendors (. Ltd AMBA (ARM Interconnect IP vendors ( Palmchip ) CoreFrame ( Silicore ) WishBone ( Sonics ) SiliconBackPlane

More information

Computer Memory. Textbook: Chapter 1

Computer Memory. Textbook: Chapter 1 Computer Memory Textbook: Chapter 1 ARM Cortex-M4 User Guide (Section 2.2 Memory Model) STM32F4xx Technical Reference Manual: Chapter 2 Memory and Bus Architecture Chapter 3 Flash Memory Chapter 36 Flexible

More information

Wed. Aug 23 Announcements

Wed. Aug 23 Announcements Wed. Aug 23 Announcements Professor Office Hours 1:30 to 2:30 Wed/Fri EE 326A You should all be signed up for piazza Most labs done individually (if not called out in the doc) Make sure to register your

More information

EE4390 Microprocessors. Lessons 2, 3 68HC12 Hardware Overview, Subsystems, and memory System

EE4390 Microprocessors. Lessons 2, 3 68HC12 Hardware Overview, Subsystems, and memory System EE4390 Microprocessors Lessons 2, 3 68HC12 Hardware Overview, Subsystems, and memory System 1 Overview 68HC12 hardware overview Subsystems Memory System 2 68HC12 Hardware Overview "Copyright of Motorola,

More information

EE 308 Spring A software delay

EE 308 Spring A software delay A software delay To enter a software delay, put in a nested loop, just like in assembly. Write a function delay(num) which will delay for num milliseconds void delay(unsigned int num) volatile unsigned

More information

8-bit XMEGA D Microcontroller XMEGA D MANUAL. Preliminary

8-bit XMEGA D Microcontroller XMEGA D MANUAL. Preliminary This document contains complete and detailed description of all modules included in the AVR XMEGA TM D Microcontroller family. The XMEGA D is a family of low power, high performance and peripheral rich

More information

Introduction. PURPOSE: This course explains several important features of the i.mx21 microprocessor.

Introduction. PURPOSE: This course explains several important features of the i.mx21 microprocessor. Introduction PURPOSE: This course explains several important features of the i.mx21 microprocessor. OBJECTIVES: - Describe the features and functions of the ARM926EJ-S TM Core - Explain three processor

More information

Homework 9: Software Design Considerations

Homework 9: Software Design Considerations ECE 477 Digital Systems Senior Design Project Rev 8/09 Homework 9: Software Design Considerations Team Code Name: 2D-MPR Group No. _12_ Team Member Completing This Homework: _Alex Bridge E-mail Address

More information

AN4838. Managing memory protection unit (MPU) in STM32 MCUs. Application note. Introduction

AN4838. Managing memory protection unit (MPU) in STM32 MCUs. Application note. Introduction Application note Managing memory protection unit (MPU) in STM32 MCUs Introduction This application note describes how to manage the MPU in the STM32 products which is an optional component for the memory

More information

Fredrick M. Cady. Assembly and С Programming forthefreescalehcs12 Microcontroller. шт.

Fredrick M. Cady. Assembly and С Programming forthefreescalehcs12 Microcontroller. шт. SECOND шт. Assembly and С Programming forthefreescalehcs12 Microcontroller Fredrick M. Cady Department of Electrical and Computer Engineering Montana State University New York Oxford Oxford University

More information

AN2548 Application note

AN2548 Application note Application note Using the STM32F101xx and STM32F103xx controller 1 Introduction This application note describes how to use the STM32F101xx and STM32F103xx direct memory access () controller. The STM32F101xx

More information

PM0063 Programming manual

PM0063 Programming manual Programming manual STM32F100xx value line Flash programming Introduction This programming manual describes how to program the Flash memory of low-density (STM32F100x4, STM32F100x6), medium-density STM32F100xx

More information

Microcontroller: CPU and Memory

Microcontroller: CPU and Memory Microcontroller: CPU and Memory Amarjeet Singh January 15, 2013 Partly adopted from EE202A, UCLA Slides by Mani Srivastava Logistics Programming EVK1100 Guidelines for programming using AVR32 Studio on

More information

SiFive FE310-G000 Manual c SiFive, Inc.

SiFive FE310-G000 Manual c SiFive, Inc. SiFive FE310-G000 Manual 1.0.3 c SiFive, Inc. 2 SiFive FE310-G000 Manual 1.0.3 SiFive FE310-G000 Manual Proprietary Notice Copyright c 2016-2017, SiFive Inc. All rights reserved. Information in this document

More information

AVR ISA & AVR Programming (I) Lecturer: Sri Parameswaran Notes by: Annie Guo

AVR ISA & AVR Programming (I) Lecturer: Sri Parameswaran Notes by: Annie Guo AVR ISA & AVR Programming (I) Lecturer: Sri Parameswaran Notes by: Annie Guo 1 Lecture Overview AVR ISA AVR Instructions & Programming (I) Basic construct implementation 2 Atmel AVR 8-bit RISC architecture

More information

M68HC08 Microcontroller The MC68HC908GP32. General Description. MCU Block Diagram CPU08 1

M68HC08 Microcontroller The MC68HC908GP32. General Description. MCU Block Diagram CPU08 1 M68HC08 Microcontroller The MC68HC908GP32 Babak Kia Adjunct Professor Boston University College of Engineering Email: bkia -at- bu.edu ENG SC757 - Advanced Microprocessor Design General Description The

More information

Shedding too much Light on a Microcontroller s Firmware Protection. Johannes Obermaier, Stefan Tatschner, August 15, 2017

Shedding too much Light on a Microcontroller s Firmware Protection. Johannes Obermaier, Stefan Tatschner, August 15, 2017 Shedding too much Light on a Microcontroller s Firmware Protection Johannes Obermaier, Stefan Tatschner, August 15, 2017 Shedding too much Light on a Microcontroller s Firmware Protection Microcontrollers

More information

EE 308 Spring Lecture 28 March 30, 2012 Review for Exam 2. Introduction to the MC9S12 Expanded Mode

EE 308 Spring Lecture 28 March 30, 2012 Review for Exam 2. Introduction to the MC9S12 Expanded Mode Lecture 28 March 30, 2012 Review for Exam 2 Introduction to the MC9S12 Expanded Mode 1 Review for Exam 2 1. C Programming (a) Setting and clearing bits in registers PORTA = PORTA 0x02; PORTA = PORTA &

More information

8-bit Atmel XMEGA C Microcontroller XMEGA C MANUAL

8-bit Atmel XMEGA C Microcontroller XMEGA C MANUAL 8-bit Atmel XMEGA C Microcontroller XMEGA C MANUAL This document contains complete and detailed description of all modules included in the Atmel AVR XMEGA C microcontroller family. The Atmel AVR XMEGA

More information

UM LPC2101/02/03 User manual. Document information

UM LPC2101/02/03 User manual. Document information LPC2101/02/03 User manual Rev. 4 13 May 2009 User manual Document information Info Keywords Abstract Content LPC2101, LPC2102, LPC2103, ARM, ARM7, embedded, 32-bit, microcontroller LPC2101/02/03 User manual

More information

STM8L and STM32 L1 series. Ultra-low-power platform

STM8L and STM32 L1 series. Ultra-low-power platform STM8L and STM32 L1 series Ultra-low-power platform 8-bit and 32-bit MCU families 2 Flash (bytes) 2 M 1 M 128 K 16 K 8-bit Core STM8S Mainstream STM8A F and STM8AL Automotive STM8L Ultra-low-power 32-bit

More information

Table of Contents List of Figures... 2 List of Tables Introduction Main features Function description On-chip Flash memo

Table of Contents List of Figures... 2 List of Tables Introduction Main features Function description On-chip Flash memo GigaDevice Semiconductor Inc. GD32F103xx ARM 32-bit Cortex -M3 MCU Application Note AN002 Table of Contents List of Figures... 2 List of Tables... 3 1 Introduction... 4 2 Main features... 4 3 Function

More information

STM32F4 Labs. T.O.M.A.S Technically Oriented Microcontroller Application Services V1.07

STM32F4 Labs. T.O.M.A.S Technically Oriented Microcontroller Application Services V1.07 STM32F4 Labs T.O.M.A.S Technically Oriented Microcontroller Application Services V1.07 CONTENT 1/3 2 1. GPIO lab 2. EXTI lab 3. SLEEP lab 4. STOP lab 5. STANDBY lab 6. DMA Poll lab 7. DMA Interrupt lab

More information

Multi-core microcontroller design with Cortex-M processors and CoreSight SoC

Multi-core microcontroller design with Cortex-M processors and CoreSight SoC Multi-core microcontroller design with Cortex-M processors and CoreSight SoC Joseph Yiu, ARM Ian Johnson, ARM January 2013 Abstract: While the majority of Cortex -M processor-based microcontrollers are

More information

AVR XMEGA Product Line Introduction AVR XMEGA TM. Product Introduction.

AVR XMEGA Product Line Introduction AVR XMEGA TM. Product Introduction. AVR XMEGA TM Product Introduction 32-bit AVR UC3 AVR Flash Microcontrollers The highest performance AVR in the world 8/16-bit AVR XMEGA Peripheral Performance 8-bit megaavr The world s most successful

More information

Microprocessors and rpeanut. Eric McCreath

Microprocessors and rpeanut. Eric McCreath Microprocessors and rpeanut Eric McCreath Microprocessors There are many well known microprocessors: Intel x86 series, Pentium, Celeron, Xeon, etc. AMD Opteron, Intel Itanium, Motorola 680xx series, PowerPC,

More information

Module Introduction! PURPOSE: The intent of this module, 68K to ColdFire Transition, is to explain the changes to the programming model and architectu

Module Introduction! PURPOSE: The intent of this module, 68K to ColdFire Transition, is to explain the changes to the programming model and architectu Module Introduction! PURPOSE: The intent of this module, 68K to ColdFire Transition, is to explain the changes to the programming model and architecture of ColdFire. This module also provides a description

More information

ARM Architecture and Assembly Programming Intro

ARM Architecture and Assembly Programming Intro ARM Architecture and Assembly Programming Intro Instructors: Dr. Phillip Jones http://class.ece.iastate.edu/cpre288 1 Announcements HW9: Due Sunday 11/5 (midnight) Lab 9: object detection lab Give TAs

More information

ARM Cortex-M4 Programming Model

ARM Cortex-M4 Programming Model ARM Cortex-M4 Programming Model ARM = Advanced RISC Machines, Ltd. ARM licenses IP to other companies (ARM does not fabricate chips) 2005: ARM had 75% of embedded RISC market, with 2.5 billion processors

More information

Microprocessors. Microprocessors and rpeanut. Memory. Eric McCreath

Microprocessors. Microprocessors and rpeanut. Memory. Eric McCreath Microprocessors Microprocessors and rpeanut Eric McCreath There are many well known microprocessors: Intel x86 series, Pentium, Celeron, Xeon, etc. AMD Opteron, Intel Itanium, Motorola 680xx series, PowerPC,

More information