Session 1. Burn-in & Test Socket Workshop Introduction to Socketing
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1 Session 1 Burn-in & Test Socket Workshop 2000 Introduction to Socketing
2 BURN-IN & TEST SOCKET WORKSHOP COPYRIGHT NOTICE The papers in this publication comprise the proceedings of the 2000 BiTS Workshop. They reflect the authors opinions and are reproduced as presented, without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, or the Institute of Electrical and Electronic Engineers, Inc. There is NO copyright protection claimed by this publication. However, each presentation is the work of the authors and their respective companies: as such, proper acknowledgement should be made to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.
3 Presentations Thermal Management & The Parameters That Affect Heat Dissipation During Burn-in Erik Orwoll Wells-CTI A Typical Manufacturing Burn-in Process Edumban Kaneasan AMD Interface Considerations For High Performance Contactors In Automated Test Environments Dan Maccoux Pamela Lohr Johnstech International Johnstech International
4 Thermal Management & The Parameters That Affect Heat Dissipation During Burn-in Feb 2000 Bits Workshop Presented by Erik Orwoll Engineering Manager WELLS-CTI
5 PURPOSE OF HEAT SINKS As processor speed and I/O density increase, dies dissipate more heat, which can cause thermal failure. Heat Sinks maximize the surface area in contact with the cooling air and create a conductive path, which reduces die temperature. Heat Sinks can be fabricated from any thermally conductive material - Most commonly aluminum, but conductive polymers can be used. Aluminum Heat Sinks are often extruded. Extrusions are low cost and dimensionally accurate. 2
6 INTERFACE TEMPERATURE PROFILE T x, 1 T s T 2 T 3 L A L B L C T s, 4 High Temp Air T x, 1, h 1 k A k B k C T x, 4 A B C 1 h 1 A x L A k A A L B k B A L C k C A 1 h 4 A Low Temp Air T x, 4, h 4 q x T x, 1 T s,1 T 2 T 3 T s,4 T x, 4 3
7 AIRFLOW TEMPERATURE GRADIENT y FLOW y T x Velocity Distribution u(y) q Temperature Distribution u(y) T s u(y) Heated Surface T(y) 4
8 HEAT SINK FINS T x, h T x, h A q=ha(t s -T x ) Ts, A Increased Surface Area, A Increased Heat Transfer, q 5
9 Estimated Thermal Improvement Using Heat Sink % 79% 83% 85% 87% 88% 89% 89% 90% 90% 91% Die Temperature C % Improvement (%) Thermal Dissipation through Die Top Surface (Watts) ENHANCED WITH HEAT SINK NO HEAT SINK % IMPROVEMENT 0 Enhanced Thermal Version Requires Maximized Heat Sink Surface Area Maximum Air Flow Solid Thermal Interface
10 HEAT SINK CONFIGURATIONS 7
11 HEAT SINK EXAMPLES DIE SIZE 8
12 THERMAL INTERFACES Physical interface at junctions - Figure 1 Mating surfaces are not perfectly flat in the real world. Rough surface condition reduces the thermal efficiency across the boundary. Thermal Tape or Thermal Grease fills in the irregularities and can improve thermal transfer. (Heat is conducted across the film instead of convected across the voids) 9
13 SURFACE CONDITION (FIGURE 1) Convection Conduction Point Compliant Material Minimal contact area for heat conduction 10
14 THERMAL INTERFACE MATERIALS Thermal Interface Parameters: Compliance Thickness (Increases Thermal Resistance) Wear/Durability of Material Residue (Silicone based) Thermal Conductivity Application & Attachment Method (Adhesive, etc) Cost 11
15 CONTACT PRESSURE Heat Sink Contact Pressure improves thermal performance (especially when using thermal interface material). Damage to the die can occur if too much pressure is applied. The chip manufacturer should supply a die pressure specification (max value allowed). 12
16 OVEN PARAMETERS Air flow - Quantified by Feet per minute, etc. Flow path must be unrestricted to maximize efficiency. Orient sockets to maximize air flow. Oven Temperature - May need to be modified to achieve desired die operating temperature. Air temperature varies as it flows across the burnin board. Thermal uniformity can not be assumed. High Temp areas within the oven may require greater thermal management in those locations (Figure 2). 13
17 TEMPERATURE GRADIENT BURN-IN ENVIRONMENT (FIGURE 2) AIR FLOW MAX THERMAL LOAD AIR TEMP 14
18 MEASURING PERFORMANCE THERMOCOUPLE PLACEMENT Thermocouple usage and placement is critical 15
19 DESIGN INPUTS / PARAMETERS Parameters needed: Power usage as a function of time. (Peak & steady state power output) Current die temperatures during burn-in Specification for Max die temp allowed Oven temperature & gradient across board Air flow Flow geometry in oven/flow geometry of socket Die pressure applied Power Consumption Variability Throughout Board (Individual processor speeds are inconsistent) 16
20 COMPROMISES / TRADE-OFFS Board spacing can be increased to enhance airflow (at the cost of throughput) Modify Oven Temperature to meet die temperature spec Change board layout / density Change socket to thermally conductive resin Increase die pressure 17
21 THERMAL TERMINOLOGY Conduction - Heat transfer that occurs across a medium Convection - Heat transfer between a surface and a moving fluid when they are at different temperatures Radiation - Surfaces of finite temperature emit energy in the form of electromagnetic waves Temperature Vs. Heat - Heat is a measurement of thermal energy, Junction Temp - Temperature at the junction point of two materials Thermal Load - Power input to a system or device Thermal Efficiency - Rate at which heat is removed compared to another method Heat Loss / Heat Dissipation - Energy removed from the system through conduction, convection, or radiation Energy Vs. Power - Power is Energy per unit of time. Energy (joules), Power (watts) Heat Transfer Rate - Thermal transfer across a medium (measured in watts) Heat Transfer Coefficient - Efficiency of given material to transfer heat energy Laminar Vs. Turbulent Flow - Laminar Fluid Flow paths are parallel to one another, turbulent flow paths are not 18
22 A Typical Manufacturing Burn-in Process By Kaneasan Advanced Micro Devices Penang, Malaysia Feb Page 1
23 What is Burn-in? Burn-in is a process of stressing semiconductors to weed out potentially weak circuits.it is a stress situation in which time, temperature and electrical input signals and voltage are applied to semiconductors to accelerate aging. Why Semiconductors need burn-in? To screen out the infant mortality or early lifetime failure. To cause product with high probability failure to fail before it reach end user. To have quality and reliability products Types of Burn-in Static Burn-in - Applied Voltage and Temperature. Dynamic Burn-in- Applied Voltage, Signal and Temperature Page 2
24 Failure Mechanism Related to Burn-In Product Defects Silicon, Oxide & Manufacturing Defects Dielectric Breakdown Ionic Contamination Handling Defects Electrical Over Stress (EOS) Electro Static Discharge (ESD) Visual Mechanical Defects Page 3
25 Generic Production Burn-in Flow 1 Receiving / QA Inspection 2 Process Traveler generation throughcomputer 3 Production Loading Process 4 Electrical bench testing to screen out bad parts Pre Burn-in oven condition verification 5 temperature, Voltage, Signal At temperature condition verification 6 Temperature, Voltage, Signal In progress condition verification 7 through computer or manual for Voltage,Temperature 8 Post burn-in oven condition verification Temperature, Voltage, Signal Production unloading Process 9 includes 100 % visual inspection 10 QA Inspection, Packing and Ship to Customer Page 4
26 Common Burn-in Circuit Documentation Rules Documentation Rules should consider the following Burn-in Board Design Concept ( Dedicated or Universal ) Test Condition Power Supply Current Schematic / Table Burn-in Components Values Voltages / Current Values Input Drive Conditions / Clocks / Signals Device Orientation Switching Noise Power -Up and Power Down Sequences Power Stable Condition Burn-In Temperature and Duration Page 5
27 Burn-in Hardware Requirement Burn-in Board Burn-in Driver Burn-in Oven Supporting Hardware Universal or Dedicated Manual Programming or Through Computer Control Computer or Manual monitoring Power Supplies,Bench Tester, Socket Continuity Tester and Test Probe, Multimeter,Scope Page 6
28 Burn-in Board Universal Burn-in Board Is the most flexible and cost-effective. Restrictions are that the device packages be the same size and pin count, Vcc and Ground pins remain constant. Dedicated Burn-in Board Accommodate only a specific type of device. Signals and voltages present on the input edge connector to specific pins on the sockets. Page 7
29 Burn-in Driver board To generate signal (wave form ) for dynamic burn-in. It can be configured to require burn-in circuit by manual using hard wires or by computer. Computer provide an option to select the signal frequency for specific driver zone. Page 8
30 Burn-in Oven Can be configured through computer or manual control. The typical monitoring parameters during burn-in process are Power supply voltages and currents Voltages and signals at board level. Oven Temperature Individual Thermal Control Supporting Burn-in Hardware Needed to:- Monitoring and Measurement. Trouble shooting. Individual device temperature control Thermal solution Page 9
31 Example of Burn-in Hardware Set-Up Driver Board with Program Header PCB connection between driver and burn-in board Page 10 Burn-in Board
32 Manufacturing Burn-in Reject Modes and Causes 1) Electrical Reject Modes Leakage Failure Open Failure Short Failure Functional Failure 2) Visual Mechanical Reject Modes Broken Lead, Bent lead & Coplanarity Page 11
33 Continue.. 1) Possible Cause For Electrical Rejects Bad burn-in sockets (sockets with damage pin) Bad components (Resistor and Capacitor ) Integrity of signal and voltage (Electrical Noise and Spike control ) Bias and Signal applying procedure 2) Possible Cause For Visual Mechanical Rejects Loading and unloading process Rework tools, method and material Page 12
34 Enhancement on Burn-In Hardware's 1. Consideration to enhance Burn-In Oven Shortcomings Electrical Noise and Spike. Cause by poor grounding and unstable power supply No indication for Bias and Signal loss during burn-in due to power supply shut down. Recommendation Install power conditional on oven and ensure good grounding Replace mechanical switches with relay type on oven. Applying wrong power-up Install power supply sequencer and down sequence through manual handling and fast Vcc voltage ramping- up Page 13 Installed alarm module to indicate the power supply shut-down
35 Example of Hardware Modification Unmodified Oven Modified Oven SSR Control Sequencer Before Modification B/I System Without SSR Control and Sequencer After Modification B/I System With SSR Control and Sequencer. This to minimize the electrical noise and spike and also to automated the power supplies ON and OFF mode. Page 14
36 2. Consideration For Enhanced Burn-In Board Design A good burn-in board design should able to :- Minimize electrical noise with good route of traces using multi layers design. Minimize Board warpage with proper support Example- Rail and Guides. Useable for manual and automation loading and unloading process for high UPH. Page 15
37 Continue. Universal board design concept to use for same package of product. Mainly for cost avoidance Socket and Print Circuit Board(PCB) Material selection must be in compliance to ESD prevention. Selection of correct version of socket for better signal and voltage integrity. Page 16
38 Modified Driver Boards Before Modification Driver Card Without Program Header After Modification Driver board with program header.this is to allowed for circuit conversion at driver board level.to minimize the signal integrity problem at burn-in board level Page 17
39 3. Systematic Hardware Maintenance Program Regular Preventive Maintenance for Burn-in Hardware (Oven, Power supplies and Drivers Boards) Regular Calibration for Test Condition. ( Temperature and Voltage). Regular Burn-in Board Socket integrity verification and components measurement on burn-in boards. Page 18
40 P Looking Beyond 2000 Future Burn-In Process Should Venture Into Computer Based Monitoring The Benefits Would Be :- For Efficient Burn-In and Reduce Burn-in Hours Data Tracebility During Burn-In. Fast and Easy Burn-In Circuits Convention. Provide Flexibility For Various Burn-in Test Condition Bias and Signal To Be Set-Up At Board Level In Same Oven. Page 19
41 Reduce and Minimize Manual Burn-in Boards Preventive Maintenance. Socket Test Probe Socket Tester Resources Issues which can be addressed and Eliminated by Computer based Burn-In. Loss in capacity while boards schedule for 100% sockets verification. Need to maintain extra burn-in boards. Bad socket only detected during 100 % socket testing. High cost to fabricate various test probes Socket damage during probing. Page 20
42 As for Burn-in board and Driver board design the future trend is :- To be designed with device read out capability to monitor the socket integrity while burn-in. The Benefits Would Be:- Cost avoidance on burn-in board PM hardware maintenance Early detection on socket failure during burn-in. Less burn-in compensation hours More efficient burn-in. Page 21
43 Using Total Quality Management (TQM) To Monitor Burn-in Performance Objective Acceptance and Reasonable Cost, Lots On Time Delivery Measurement Problem Solving and Continuous Improvement In process Audit for Oven Setup and Burn-in Test Condition Electrical and Visual Rejects Within Allowable Percentage Control System and Process Specification Compliance Help to Reduce Burn-in Hours Review Process Quarterly review on lot rejection rate Goal Setting and continuos improvement project. Page 22
44 Interface Considerations for High Performance Contactors in Automated Test Environments Dan Maccoux Product Engineering & Support Manager Pamela Lohr Applications Engineer Johnstech International February 27-29, 1999 Johnstech International 1
45 Test System Interfaces Test floor and production managers must consider the entire test system and the interface To ensure more production time and greater MTBF To ensure that Overall Equipment Effectiveness (OEE) goals are met through easily maintainable test systems To ensure higher first pass yields Johnstech International 2
46 Agenda Package Considerations Contactor Considerations Test System Considerations Tester Considerations Handler Considerations Docking Considerations Johnstech International 3
47 Package Considerations (Geometry) Critical dimensions that affect contactor design Lead Pitch Lead Group Width (directly from samples) Lead Thickness Lead Width Lead Foot Lead Height Singulation Marks (Dambar) Body Size (including mold flash) Overall Device Thickness Outer Lead Width Johnstech International 4
48 Dimension Evaluations Lead Thickness Lf Body Size Inner Radius Device Thickness Singulation Mark Outer Lead Width LGW Pitch LGW Lead Width Johnstech International 5
49 Dimension Evaluations Critical dimensions for contactor design Johnstech International 6
50 Package Considerations (Industry Package Ranges) Test contactor manufacturers may have difficulty ensuring performance when designing to Industry Package Ranges Small geometry provides for: M Improved Electrical Performance M Self Cleaning Wipe M Long Production Life Johnstech International 7
51 Package Considerations Larger geometry introduces problems such as M Decrease in Electrical Performance M Reduced Wipe (Self Cleaning) M Shorter Production Life (increased maintenance) Insufficient wipe results in failure to break through lead frame coating oxides Causes poor signal integrity and contact resistance varies Excessive wipe results in excessive lead frame coating debris Increases maintenance Johnstech International 8
52 JEDEC Range Johnstech International 9
53 Contactor Considerations Contactor housing design requirements may vary M Based on handler/change kit requirements or configuration M Based on device performance requirements Alignment plates for automated applications must be considered They provide fine X-Y alignment for handler nest or work press M Some automated handlers utilize alignment plates and some do not Johnstech International 10
54 Test System Considerations The Test System components must work in concert to meet customer goals; therefore, the test contactor manufacturer must have detailed information on all components Tester Requirements M Load Board Requirements Handler Requirements M Work Press Requirements Docking Requirements Johnstech International 11
55 Overall Interface Requirements Johnstech International 12
56 Tester Considerations Tester make and model can dictate size constraints for the test contactor Testers are selected based on: The device type (memory, mixed signal, digital) The functions to be tested (DC, AC, Functional) The number of devices tested simultaneously Johnstech International 13
57 Load Board Considerations Load board design is a critical factor for test contactor manufacturers and their customers Mechanical Interface to Contactor M Must be manufactured with all features specified on the data sheet Johnstech International 14
58 Handler Considerations There are significant variations among handlers Horizontal Test Plane Vertical Test Plane 45 Degree Test Plane Test Sites M Single Site M Dual Site M Tri-site M Quad Site M Multiple (8,16,32,64, plus others) Johnstech International 15
59 Handler Considerations There are also many factors that affect handling accuracy Mold Parting Lines on Device Body Flash (Causes Debris) Singulation Tabs (Dambar) All these also affect contactor life and performance Johnstech International 16
60 Handler Considerations As the industry moves toward smaller, finer pitched devices, engineers working on handling interfaces are faced with a multitude of issues Smaller devices are more difficult to move Smaller devices are more difficult to locate Smaller devices are more fragile Smaller devices are more difficult to contact Johnstech International 17
61 Handler Considerations Device tooling tolerances play a significant role in the success of an interface Tolerances may not be in direct proportion to package size, lead count, and lead pitch M For example, variation on a 16-lead SOIC device is totally unacceptable for an 8- lead TSSOP Smaller devices provide less surface area to maintain X,Y control Johnstech International 18
62 Handler Considerations Industry Package Range specifications are too wide Handler manufacturers are driven to design device kits to accept the full tolerance range This saves the customer money, but in the long run, may affect OEE and first pass yields Accuracy is sacrificed, as it is difficult to contact the device Johnstech International 19
63 Handler Considerations As device geometry gets smaller, the area to contact on the device is reduced As we get closer to the load board for improved electrical performance, the geometry in which to place contact elements steadily shrinks Johnstech International 20
64 Handler Considerations The kit design is dependent upon package dimensions Body Length Body Width Body Thickness Lead Profile (Trim & Form) Johnstech International 21
65 Handler Considerations To ensure that test contactor designs will assist with higher first pass yields and OEE, customers must provide the following handler information: Handler Make and Model Numbers Device Kit Manufacturer Device Kit Part Number Second or Third Party Kit Component Suppliers Existing Device Kit Info, (if one is on-site or on order) Johnstech International 22
66 Handler Considerations Nest or Work Press Mechanical Drawings M Alignment Plate Design M Information on the Existing Nest, if Applicable M Information on Special Features Required in the Housing Drawings (Required for Contactor Design) M Sequence of Events While Handling or Aligning Handler Theory of Operation Johnstech International 23
67 Handler Considerations In addition to specific information on the handler and kits, customers must consider, and share with the contactor manufacturer, information on the following issues: How the handler aligns parts How leadbacking is done What surface is being used for overtravel control Johnstech International 24
68 Work Press Considerations Test contactor manufacturers must know the requirements of the X/Y device control in the work press or nest Based on device pitch M 0.08 mm (0.003 ) for device pitches of >0.50 mm M 0.05 mm (0.002 ) for device pitches of 0.50 mm Work press or nest presentation/control Nest or work press must provide overtravel stop M Control contact deflection M Maintain interface reliability Johnstech International 25
69 Work Press Considerations Johnstech International 26
70 Work Press Considerations The nest or work press must provide full lead support at point of contact Prevents device lead damage Upon actuation, the nest or work press must be coplanar to the contactor within 0.05 mm (0.002 ) Johnstech International 27
71 Work Press Considerations For direct plunge, the nest should align to a controlled feature on the contactor (such as the alignment plate) For drop and plunge, the device should align to a controlled feature on the contactor (such as the alignment plate) Johnstech International 28
72 Docking Considerations Docking is as important to the test contactor manufacturer as it is to the handler manufacturer when considering OEE; information is required in the areas of: Hard Docking (locked or keyed) Mechanical Alignment of the Contactor to Handler Backplane M Provides repeatable, precise X, Y, and Z alignment Accurate Coplanar Contactor Positioning to Handler Nest or Work Press Johnstech International 29
73 Conclusion In high performance contacting, the test contactor cannot be considered a stand alone component Although the test contactor may be among the smallest and least expensive items in the test system, it is critical to the overall success of the system in meeting customer goals for: OEE Higher First Pass Yields Johnstech International 30
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