The LabVIEW FPGA course prepares you to design, debug, and implement efficient,

Transcription

1 HUMAN RESOURCES STAFF TRAINING SERVICE EPFL RI RH-F Phone : Building BI Fax : Station 7 CH-1015 Lausanne Website : LabVIEW, FPGA The LabVIEW FPGA course prepares you to design, debug, and implement efficient, optimized applications using the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware. You learn how to compile and deploy your VIs to different types of NI targets, such as NI R Series multifunction RIO, CompactRIO, Single-Board RIO, and NI RIO instruments. You develop applications where you learn to acquire digital and analog I/O, control loop timing, synchronize operations, implement signal processing, and pass data between your host VI and your FPGA target. The LabVIEW FPGA course focuses on programming practices for applications with I/O rates less than 5 MHz or using R Series, CompactRIO, or Single-Board RIO targets. NI LabVIEW Skills Guide: Identify the skills you need and find learning resources to help you successfully develop a LabVIEW application with your hardware. Ce séminaire existe aussi en français

2 OBJECTIVES > Create & compile your LabVIEW FPGA VI and download to NI reconfigurable I/O hardware > Acquire and generate analog and digital signals, control timing, synchronize operations, and implement signal processing on the FPGA > Communicate between the FPGA and a host > Design and implement applications using the LabVIEW FPGA module PARTICIPANTS > New users with applications with I/O less than 5 MHz, incorporating LabVIEW FPGA and R Series, CompactRIO, or Single-Board RIO targets. PREREQUISITES > LabVIEW Core I METHODS > Lecture > Quizzes > Demonstrations > Activities > Development Exercise

3 PROGRAM Day 1 > Introduction to LabVIEW FPGA > Getting Started with LabVIEW FPGA > Programming Using LabVIEW FPGA > Using FPGA I/O > Timing an FPGA VI Day 2 > Executing Code in SCTLs > Signal Processing > Sharing Data on FPGA > Synchronizing FPGA Loops and I/O Day 3 > Modular Programming > Communicating Between the FPGA and Host PRACTICAL INFOMATION Dates Duration Timetable Group Place Certificate Voir sur 3 days from 8:30 am to 5:00pm Maximum 8 participants EPFL, Building MA, Room of the Staff Training Service. A certificate will be delivered to participants who have attended the whole training.

4 TRAINERS National Instruments - Each host has a Master (or a Bachelor) in the National Instruments chosen field (electronics, IT and microtechnology). Each facilitator of the course received a certification from National Instruments to teach this course. She/he has extensive experience with LabVIEW software and hardware by helping everyday users into their applications.

5 HUMAN RESOURCES STAFF TRAINING SERVICE EPFL RI RH-F Phone : Building BI Fax : Station 7 CH-1015 Lausanne Website : Enrolment Slip LabVIEW, FPGA Dates : Mrs Mr Surname First name Position Professional address EPFL - Station SCIPER N o Prof. phone Mobile phone Prof. Name of manager Signature of manager By your signature, you engage to release your collaborator for the whole duration of the course. Date and signature Send it to: EPFL RI RH-F, Staff Training Service Station 7, 1015 Lausanne - Fax