Emerging computing paradigms: The case of neuromorphic platforms

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1 Emerging computing paradigms: The case of neuromorphic platforms Andrea Acquaviva DAUIN Computer and control Eng. Dept. 1

2 Neuromorphic platforms Neuromorphic platforms objective is to enable simulation of Spiking Neural Networks (SNN) in real-time The guiding philosophy is not to simulate the brain in complete detail, but to search for organizing principles that can be applied in practical devices Real-time (or faster) simulation performance is a desirable feature Cognitive robotics need to interact with the environment through asynchronous sensors analog ASIC 1 billion neurons Digital pla=orm 20- wafer system: four million neurons and one billion synapses BrainScaleS and SpiNNaker: NM developed in HBP- SP9 2

3 Programming models What are suitable programming models for neuromorphic chip/platforms? How to describe algorithms How to map networks on the platform How to describe algorithms Examples: Corelet (for digital neurons TrueNorth system), Neural compiler (for analog neurons Neurogrid project) PyNN, NeuroML, OptiML (hardware independent) For instance PyNN allows to describe a SNN to be mapped on SpiNNaker How to map it to platform? 3

4 Problem: Mapping SNN to neuromorphic HW Objective: Maximize efficiency neuromorphic computing systems Scale-up neural max network size Improve simulation reliability By optimizing HW resource usage we may understand how the brain optimise its HW resources State of art strategies Communication optimization Computation optimization Mapping: The problem 4

5 Mapping: Case study on SpiNNaker Mapping neurons to SpiNNaker cores SpiNNaker boards with 48 mulk- core chips connected in a toroidal- shaped triangular mesh 5

6 Communication optimization Allocate neurons to minimize chip-to-chip communication packets generated by spikes Approach: Put in the same core densely interconnected neurons through spectral analysis of the neuron network graph (*) Transformed space where highly communicakng neurons are clustered (*) Barchi, Urgese, Macii, Acquaviva, OpKmizing Network Traffic for Spiking Neural Network SimulaKons on Densely Interconnected Many- Core Neuromorphic Pla=orms, IEEE TransacKons on Emerging Topics in CompuKng,

7 A Biological Benchmark Talamo-Cortical Microcircuit simulation benchmark Typically scaled down to a factor both in terms of neuron and synapses NEURONS L23E L23I L4E L5E L4I L5I L6E L6I TIME 7

8 Mapping Impact Baseline Op+mized Cor+cal Microcircuit Op+mized Baseline EXTERNAL DUMPED EXTERNAL 5% 242 K No 6 M 10% 10% 992 K No RUNTIME ERROR 10% 9% 923 K No 25 M 15% 15% 2 M No RUNTIME ERROR N K 5% DUMPED Increasing network size (*) Barchi, Urgese, Macii, Acquaviva, OpKmizing Network Traffic for Spiking Neural Network SimulaKons on Densely Interconnected Many- Core Neuromorphic Pla=orms, IEEE TransacKons on Emerging Topics in CompuKng,

9 Optimize synaptic input computation by splitting synaptic computation from neuron computation: Synapse-centric approach(*) Synapses vs neuron simulation allocation of different processors Post- synapkc neurons computakon is divided among cores Computation optimization SynapKc input currents are computed by synapkc processors; Neuron processors sum the input currents for each neuron Efficient in case of sparse networks such as TCM (*) Knight, Furber, Synapse- Centric Mapping of CorKcal Models to the SpiNNaker Neuromorphic Architecture, FronKers in Neuroscience,

10 Mapping impact While the synapse-centric approach requires more cores in general, it allows the network to be simulated in real time in all configurations (*) Increasing network size (*) Knight, Furber, Synapse- Centric Mapping of CorKcal Models to the SpiNNaker Neuromorphic Architecture, FronKers in Neuroscience,

11 Questions & Challenges Optimized mapping may use more chip resources (i.e. more cores) what is the impact on energy? Lost spikes may be not relevant see their impact on network functionalities on real applications: go beyond TLM How to handle external connections to physical sensors? How mapping can handle dynamic networks (e.g. neurogenesis)? Are the optimization we are doing brain-alike? 11

12 THANK YOU 12

13 How-to 13

14 Methodology 14

15 How-to d 15

16 Talamo-Cortical microcircuit 16

17 How-to Clustering 17

18 18

19 SyNAPSE collaboration, headed by Dharmendra Modha of IBM Research in Almaden, CA Digital neurons, 2 billions cores, 100 trillions synapses corelets Neurogrid project at Stanford University, Kwabena Boahen analog neurons, ultra-low-power subthreshold mode neural compiler 19

20 Standard spinnaker mapping 20

21 Some results Impact on simulakon size Op+mized Baseline EXTERNAL 24.5 Million of packets 723 Dumped packets EXTERNAL 16.5 Million of packets 0 Dumped packets 21

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