SN54ALS74A, SN54AS74, SN74ALS74A, SN74AS74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

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1 SNALS7A, SNAS7, SN7ALS7A, SN7AS7 SDASA D, APRIL 9 REVISED SEPTEMBER 97 Package Optio Include Plastic Small Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 00-mil DIPs Dependable Texas itruments uality and Reliability TYPE TYPICAL MAXIMUM CLOCK FREUEY (CL = 0 pf) TYPICAL POWER DISSIPATION PER FLIP-FLOP ALS7A 0 MHz mw AS7 MHz mw description These devices contain two independent D-type positive-edge triggered flip-flops. A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs. When Preset and Clear are inactive (high), data at the D input meeting the setup time requirements are traferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SNALS7A and SNAS7 are characterized for operation over the full military temperature range of C to C. The SN7ALS7A and SN7AS7 are characterized for operation from 0 C to 70 C. FUTION TABLE INPUTS OUTPUTS PRESET CLEAR CLOCK D L H X X H L H L X X L H L L X X H H H H H H L H H L L H H H L X O O The output levels in this configuration are not guaranteed to meet the minimum levels for VOH if the lows at Preset and Clear are near VIL maximum. Furthermore, this configuration is notable; that is, it will not persist when Preset or Clear; retur to their inactive (high) level. SNALS7A, SNAS7...J PACKAGE SN7ALS7A, SN7AS7...D OR N PACKAGE (TOP VIEW) SNALS7A, SNAS7... FK PACKAGE (TOP VIEW) logic symbol GND CLR GND S C R VCC No internal connection CLR 0 V CC CLR This symbol is in accordance with ANSI/IEEE Std 9-9 and IEC Publication 7-. Pin numbers shown are for D, J, and N packages. 9 PRODUCTION DATA information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 97, Texas Itruments Incorporated

2 SNALS7A, SNAS7, SN7ALS7A, SN7AS7 SDASA D, APRIL 9 REVISED SEPTEMBER 97 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC V Input voltage V Operating free-air temperature range: SNALS7A, SNALS C to C SN7ALS7A, SN7ALS C to 70 C Storage temperature range C to 0 C recommended operating conditio SNAS7 SN7AS7 MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage 0. V 0.7 IOH High-level output current IOL Low-level output current fclock Clock frequency 0 0 MHz low tw Pulse duration CLK high.. tsu Setup time before CLK CLK low.. Data inactive 0 0 th Hold time, data after CLK 0 0 TA Operating free-air temperature 0 70 C Tested at C to 70 C. Tested at 70 C C, per MIL-STD-, method 00, sub-group,, and. Static tests are performed at C, C, and C. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS 0. SNAS7 SN7AS7 MIN TYP MAX MIN TYP MAX VIK VCC =. V, II =.. V VOH VCC =. V to. V, IOH = VCC VCC V VOL VCC =. V, IOL = VOL VCC =. V, IOL = II IIH IIL VCC =. V, VI = 7 V VCC =. V, VI =.7 V VCC =. V, VI = 0. V IO VCC =. V, VO =. V 0 0 ICC VCC =. V, See Note.. All typical values are at VCC = V, TA = C. The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. NOTE : ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded. V µaa

3 SNALS7A, SN7ALS7A SDASA D, APRIL 9 REVISED SEPTEMBER 97 switching characteristics (see Note ) FROM (INPUT) TO (OUTPUT) VCC =. V to. V, CL = 0 pf, RL = 00 Ω, TA = MIN TO MAX SNALS7A SN7ALS7A MIN MAX MIN MAX fmax MHz CLK For conditio shown MIN or MAX, use the appropriate value specified under recommended operating conditio. NOTE : Load circuit and voltage waveforms are shown in Section of the ALS/AS Logic Data Book,

4 SNAS7, SN7AS7 SDASA D, APRIL 9 REVISED SEPTEMBER 97 recommended operating conditio SNAS7 SN7AS7 MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage V IOH High-level output current IOL Low-level output current 0 0 fclock Clock frequency MHz low tw Pulse duration CLK high tsu Setup time before CLK CLK low.. Data.. inactive th Hold time, data after CLK 0 0 TA Operating free-air temperature 0 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNAS7 SN7AS7 MIN TYP MAX MIN TYP MAX VIK VCC =. V, II =.. V VOH VCC =. V to. V, IOH = VCC VCC V VOL VCC =. V, IOL = V II VCC =. V, VI = 7 V IIH IIL VCC =. V, VI =.7 V VCC =. V, VI = 0. V IO VCC =. V, VO =. V 0 0 ICC VCC =. V, See Note All typical values are at VCC = V, TA = C. The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. NOTE : ICC is measured with D, CLK, and PRE grounded, then with D, CLK, and CLR grounded. switching characteristics (see Note ) FROM TO (INPUT) (OUTPUT) VCC =. V to. V, CL = 0 pf, RL = 00 Ω, TA = MIN TO MAX SNAS7A SN7AS7A MIN MAX MIN MAX fmax 90 0 MHz CLK For conditio shown MIN or MAX, use the appropriate value specified under recommended operating conditio. NOTE : Load circuit and voltage waveforms are shown in Section of the ALS/AS Logic Data Book, µa

5 IMPORTANT NOTICE Texas Itruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditio of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specificatio applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. ILUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applicatio, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applicatio assistance or customer product design. TI does not warrant or represent that any licee, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not cotitute TI s approval, warranty or endorsement thereof. Copyright 99, Texas Itruments Incorporated

SN54ALS645A, SN54AS645, SN74ALS645A, SN74AS645 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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