SN54ALS20A, SN54AS20, SN74ALS20A, SN74AS20 DUAL 4-INPUT POSITIVE-NAND GATES

Size: px

Start display at page:

Download "SN54ALS20A, SN54AS20, SN74ALS20A, SN74AS20 DUAL 4-INPUT POSITIVE-NAND GATES"

Tracy Clifton Malone
5 years ago
Views:

1 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs description These devices contain two independent -input positive-nand gates. They perform the Boolean functions Y = A B C D or Y = A + B + C + D in positive logic. The SNALS0A and SNAS0 are characterized for operation over the full military temperature range of C to C. The SN7ALS0A and SN7AS0 are characterized for operation from 0 C to 70 C. SNALS0A, SNAS0...J PACKAGE SN7ALS0A, SN7AS0...D OR N PACKAGE (TOP VIEW) GND V CC SNALS0A, SNAS0... FK PACKAGE (TOP VIEW) V CC logic symbol FUTION TABLE (each gate) INPUTS OUTPUT A B C D Y H H H H L L X X X H X L X X H X X L X H X X X L H GND No internal connection logic diagram (positive logic) 0 3 & 0 3 This symbol is in accordance with ANSI/IEEE Std - and IEC Publication 7-. Pin numbers shown are for the D, J, and N packages. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright, Texas Instruments Incorporated POST OFFICE BOX 303 DALLAS, TEXAS 7

2 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC V voltage, V I V Operating free-air temperature range, T A : SNALS0A C to C SN7ALS0A C to 70 C Storage temperature range C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SNALS0A SN7ALS0A MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage IOH High-level output current ma IOL Low-level output current ma TA Operating free-air temperature 0 70 C Applies over temperature range C to 70 C Applies over temperature range 70 C to C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNALS0A SN7ALS0A MIN TYP MAX MIN TYP MAX VIK VCC =. V, II = ma.. V VCC =. V to. V, IOH = 0. ma VCC VCC V VCC =V. IOL = ma IOL = ma II VCC =. V, VI = 7 V ma IIH VCC =. V, VI =.7 V 0 0 µa IIL VCC =. V, VI = 0. V ma IO # VCC =. V, VO =. V 0 30 ma ICCH VCC =. V, VI = ma IC VCC =. V, VI =. V ma All typical values are at VCC = V, TA = C. # The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. V V POST OFFICE BOX 303 DALLAS, TEXAS 7

3 switching characteristics (see Figure ) FROM (INPUT) TO (OUTPUT) VCC =. V to. V, = 0 pf, RL = 00 Ω, TA = MIN to MAX SNALS0A SN7ALS0A MIN MAX MIN MAX. 3 A, B, C, or D Y 3 0 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ns absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, V CC V voltage, V I V Operating free-air temperature range, T A : SNAS C to C SN7AS C to 70 C Storage temperature range C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SNAS0 SN7AS0 MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage V IOH High-level output current ma IOL Low-level output current 0 0 ma TA Operating free-air temperature 0 70 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS SNAS0 SN7AS0 MIN TYP MAX MIN TYP MAX VIK VCC =. V, II = ma.. V VCC =. V to. V, IOH = ma VCC VCC V VCC =. V, IOL = 0 ma V II VCC =. V, VI = 7 V ma IIH VCC =. V, VI =.7 V 0 0 µa IIL VCC =. V, VI = 0. V ma IO VCC =. V, VO =. V ma ICCH VCC =. V, VI = 0.. ma IC VCC =. V, VI =. V ma All typical values are at VCC = V, TA = C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. POST OFFICE BOX 303 DALLAS, TEXAS 7 3

4 switching characteristics (see Figure ) FROM (INPUT) TO (OUTPUT) VCC =. V to. V, = 0 pf, RL = 00 Ω, TA = MIN to MAX SNAS0 SN7AS0 MIN MAX MIN MAX. A, B, C, or D Y. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. ns POST OFFICE BOX 303 DALLAS, TEXAS 7

5 MEASUREMENT INFORMATION SERIES ALS/7ALS AND AS/7AS DEVICES VCC 7 V RL = R = R S RL From Under RL From Under From Under R R LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS LOAD CIRCUIT FOR 3-STATE OUTPUTS Timing High-Level Pulse Data tsu th Low-Level Pulse tw SETUP AND HOLD TIMES PULSE DURATIONS Control (low-level enabling) Waveform S Closed (see Note B) Waveform S Open (see Note B) tpzl tpzh tphz tplz ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS 0 V In-Phase Out-of-Phase (see Note C) PROPAGATION DELAY TIMES NOTES: A. includes probe and jig capacitance. B. Waveform is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S is open. D. All input pulses have the following characteristics: PRR MHz, tr = tf = ns, duty cycle = 0%. E. The outputs are measured one at a time with one transition per measurement. Figure. Load Circuits and Voltage Waveforms POST OFFICE BOX 303 DALLAS, TEXAS 7

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN54ALS32, SN54AS32, SN74ALS32, SN74AS32 QUADRUPLE 2-INPUT POSITIVE-OR GATES Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These devices contain four independent -input positive-or