MC1488, SN55188, SN75188 QUADRUPLE LINE DRIVERS

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Arline Wilkins
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1 Meet or Exceed the Requirements of ANSI EIA/ TIA--E and ITU Recommendation V. Designed to Be Interchangeable With Motorola MC1 Current-Limited Output: ma Typical Power-Off Output Impedance: Ω Minimum Slew Rate Control by Load Capacitor Flexible Supply Voltage Range Input Compatible With Most TTL Circuits SN1...J OR W PACKAGE MC1, SN71...D OR N PACKAGE (TOP VIEW) V CC 1A 1Y A B Y GND V CC + B A Y B A Y description The MC1, SN1, and SN71 are monolithic quadruple line drivers designed to interface data terminal equipment with data communications equipment in conformance with ANSI EIA/TIA--E using a diode in series with each supply-voltage terminal as shown under typical applications. The SN1 is characterized for operation over the full military temperature range of C to C. The MC1 and SN71 are characterized for operation from C to 7 C. FUTION TABLE (drivers ) A B Y H H L L X H X L H H = high level, L = low level, X = irrelevant 1Y A B SN1... FK PACKAGE (TOP VIEW) 1A VCC VCC Y GND Y A B No internal connection A Y B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 199, Texas Instruments Incorporated POST OFFICE BOX DALLAS, TEXAS 7 1

2 logic symbol 1A A B A B A B 9 1 & 1Y Y Y This symbol is in accordance with ANSI/IEEE Std and IEC Publication 17-. Pin numbers shown are for the D and N packages. 11 Y logic diagram (positive logic) 1A A B A B A B 9 1Y Y Y 11 1 Y Positive logic Y = A (driver 1) Y = AB or A + B (drivers thru ) schematic (each driver) To Other Drivers VCC + Input(s) A B. kω. kω. kω 7 Ω Ω Output GND To Other Drivers kω.7 kω 7 Ω VCC To Other Drivers Resistor values shown are nominal. POST OFFICE BOX DALLAS, TEXAS 7

3 absolute maximum ratings over operating free-air temperature (unless otherwise noted) Supply voltage, V CC+ at (or below) C free-air temperature (see Notes 1 and ) V Supply voltage, V CC at (or below) C free-air temperature (see Notes 1 and ) V Input voltage, V I V to 7 V Output voltage, V O V to 1 V Continuous total power dissipation (see Note ) See Dissipation Rating Table Operating free-air temperature range, T A : SN C to C MC1, SN C to 7 C Storage temperature range, T stg C to 1 C Case temperature for seconds, FK package C Lead temperature 1, mm (1/1 inch) from case for seconds: D or N package C Lead temperature 1, mm (1/1 inch) from case for seconds: J or W package C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the network ground terminal.. For operation above C free-air temperature, refer to the maximum supply voltage curve, Figure. In the FK and J packages, SN1 chips are alloy mounted. PACKAGE DISSIPATION RATING TABLE TA A C DERATING FACTOR TA A = 7 C TA A = C POWER RATING ABOVE TA = C POWER RATING POWER RATING D 9 mw 7. mw/ C mw FK 17 mw 11. mw/ C mw 7 mw J 17 mw 11. mw/ C mw 7 mw N 11 mw 9. mw/ C 7 mw W mw. mw/ C mw mw recommended operating conditions SN1 MC1, SN71 MIN NOM MAX MIN NOM MAX UNIT Supply voltage, VCC V Supply voltage, VCC V High-level input voltage, VIH V Low-level input voltage, VIL.. V Operating free-air temperature, TA 7 C POST OFFICE BOX DALLAS, TEXAS 7

4 electrical characteristics over operating free-air temperature range, V CC± = ±9 V (unless otherwise noted) VOH VOL PARAMETER High-level output voltage Low-level output voltage TEST CONDITIONS VCC + = 9 V, VIL =. V, VCC = 9 V RL = kω VCC + = 1. V, VCC = 1. V VCC + = 9 V, VIH = 1.9 V, VCC = 9 V RL = kω VCC + = 1. V, VCC = 1. V SN1 MC1, SN71 MIN TYP MAX MIN TYP MAX IIH High-level input current VI = V µa IIL Low-level input current VI = ma Short-circuit output IOS(H) =V = current at high level VI. V, VO ma Short-circuit output IOS(L) =19V = current at low level VI 1.9 V, VO ma ro Output resistance, VCC + =, VCC =, power off VO = V to V UNIT Ω VCC + = 9 V, All inputs at 1.9 V 1 1 No load All inputs at. V.. Supply current from VCC + = V, All inputs at 1.9 V ICC + VCC + No load All inputs at. V ICC Supply current from ICC PD Total power dissipation VCC + = 1 V, All inputs at 1.9 V No load, TA = C All inputs at. V VCC = 9 V, All inputs at 1.9 V No load All inputs at. V..1 VCC = V, All inputs at 1.9 V 1 1 No load All inputs at. V..1 VCC = 1 V, All inputs at 1.9 V No load, TA = C All inputs at. V.. VCC + = 9 V, VCC = 9 V, No load VCC + = V, VCC = V, No load 7 7 All typical values are at TA = C. The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic voltage levels only, e.g., if V is a maximum, the typical value is a more negative voltage. Not more than one output should be shorted at a time. V V ma ma mw POST OFFICE BOX DALLAS, TEXAS 7

5 switching characteristics, V CC± = ±9 V, T A = C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tplh Propagation delay time, low- to high-level output ns tphl Propagation delay time, high- to low-level output RL = kω,, CL L = 1 pf, 17 ns ttlh Transition time, low- to high-level output See Figure 1 ns tthl Transition time, high- to low-level output 7 ns ttlh Transition time, low- to high-level output RL = kω to 7 kω, CL = pf,. µs tthl Transition time, high- to low-level output See Figure 1. µs Measured between % and 9% points of output waveform. Measured between V and V points on the output waveform (EIA / TIA--E conditions). PARAMETER MEASUREMENT INFORMATION Pulse Generator (see Note A) Input RL Output CL (see Note B) Input Output tphl 9% 1. V % % 1. V tplh % 9% % V V VOH VOL TEST CIRCUIT tthl ttlh VOLTAGE WAVEFORMS NOTES: A. The pulse generator has the following characteristics: tw =. µs, PRR 1 MHz, ZO = Ω. B. CL includes probe and jig capacitance. Figure 1. Test Circuit and Voltage Waveforms POST OFFICE BOX DALLAS, TEXAS 7

6 TYPICAL CHARACTERISTICS VO V O Output Voltage V 9 VOLTAGE TRANSFER CHARACTERISTICS VCC + = V, VCC = V 9ÎÎÎÎÎÎÎÎ VCC + = 9 V, VCC = 9 V VCC + = V, VCC = V ÎÎÎ RL = kω TA = C VI Input Voltage V IO I O Output Current ma ÎÎÎÎÎ ÎÎÎÎ VCC + = 9 V VCC = 9 V TA = C OUPUT CURRENT vs OUTPUT VOLTAGE VOH(VI =. V) VOL(VI = 1.9 V) VO Output Voltage V ÎÎÎÎ -kω Load Line 1 Figure Figure IOS Short-Circuit Output Current ma ÁÁ 9 9 SHORT-CIRCUT OUTPUT CURRENT vs FREE-AIR TEMPERATURE ÎÎÎÎÎ ÎÎÎÎÎ VCC + = 9 V VCC = 9 V VO = IOS(L) (VI = 1.9 V) ÎÎÎÎÎÎ IOS(H) (VI =. V) µs SR Slew Rate V/ SLEW RATE vs LOAD CAPACITAE ÁÁÁÁ VCC + = 9 V ÁÁÁÁ VCC = 9 V RL = ÎÎÎÎÎ ÁÁÁÁ TA = C 7 7 TA Free-Air Temperature C 1 1 CL Load Capacitance pf Figure Figure Data for temperatures below C and above 7 C are applicable to SN1 circuit only. POST OFFICE BOX DALLAS, TEXAS 7

7 THERMAL INFORMATION 1 MAXIMUM SUPPLY VOLTAGE vs FREE-AIR TEMPERATURE Maximum Supply Voltage V VCC 1 RL kω (from each output to GND) 7 7 TA Free-Air Temperature C Figure Data for temperatures below C and above 7 C are applicable to SN1 circuit only. VCC + = V VCC = V APPLICATION INFORMATION Input From TTL or DTL 1/ SN1 or SN71 1/ SN1 or SN71 1/ SN1 or SN71 1/ SN1 or SN71 V V Output to MOS 1 kω V to V kω V Output to RTL.7 V to.7 V Output to DTL.7 V to.7 V Output to HNIL.7 V to V Figure 7. Logic Translator Applications 1 ±1 V Output VCC + 1 VCC VCC + VCC Diodes placed in series with the VCC+ and VCC leads will protect the SN1/SN71 in the fault condition in which the device outputs are shorted to ±1 V and the power supplies are at low voltage and provide low-impedance paths to ground. Figure. Power Supply Protection to Meet Power-Off Fault Conditions of ANSI EIA/ TIA--E POST OFFICE BOX DALLAS, TEXAS 7 7

8 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. ILUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 199, Texas Instruments Incorporated

SN54ALS04B, SN54AS04, SN74ALS04B, SN74AS04 HEX INVERTERS

SN54ALS04B, SN54AS04, SN74ALS04B, SN74AS04 HEX INVERTERS SNALS0B, SNAS0, SN7ALS0B, SN7AS0 Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 00-mil DIPs description These devices contain