PLCDA03C-6 thru PLCDA24C-6 LOW CAPACITANCE TVS ARRAY

Transcription

1 LOW APAITANE TVS ARRAY APPLIATIONS Ethernet - 1/1 Base T FireWire SSI Bluetooth & RF IE OMPATIBILITY (EN61-) 61-- (ESD): Air - 15kV, ontact - kv 61-- (EFT): A - 5/5ns (Surge): A, /µs - Level (Line-Gnd) & Level 3(Line-Line) SO- FEATURES 5 Watts Peak Pulse Power per Line (tp=/µs) Bidirectional onfiguration Available in Multiple Voltage Types Ranging From 3.3V to 15V Protects Up to Six (6) Lines ESD Protection > kilovolts Low apacitance: pf RoHS ompliant MEHANIAL HARATERISTIS Molded JEDE SO- Weight 7 milligrams (Approximate) Available in Lead-Free Pure-Tin Plating(Annealed) Solder Reflow Temperature: Pure-Tin - Sn, 1: 6-7 onsult Factory for Leaded Device Availability Flammability Rating UL 9V- 1mm Tape and Reel Per EIA Standard 1 Marking: Marking ode, Logo, Date ode & Pin One Defined By Dot on Top of Package PIN ONFIGURATION I/O I/O I/O GND I/O I/O I/O GND 51.R7 /7 1

2 DEVIE HARATERISTIS 5 Unless Otherwise Specified PARAMETER SYMBOL VALUE UNITS Peak Pulse Power (t p = /µs) - See Figure 1 P PP 5 Watts Operating Temperature T L -55 to 15 Storage Temperature T STG -55 to 15 ELETRIAL HARATERISTIS PER 5 Unless Otherwise Specified PART NUMBER (See Notes 1) DEVIE MARKING RATED STAND-OFF MINIMUM BREAKDOWN LAMPING (See Fig. ) LAMPING (See Fig. ) LEAKAGE URRENT APAITANE (See Note 1) V 1mA V I P = 1A I WM I D 1 MHz pf -6 PLDA5-6 PLDA-6 PLDA1-6 PLDA15-6 PRS PRT PRW PRV PRU A 33.V@1.A 17.A 15 1 Note 1: apacitance between I/O pins and ground (pins & 5) is typically pf. apacitance between I/O pins is typically pf. P PP - Peak Pulse Power - Watts 1, 1, 1 FIGURE 1 PEAK PULSE POWER VS PULSE TIME 5W /µs Waveform I PP - Peak Pulse urrent - % of I PP t f FIGURE PULSE WAVE FORM Peak Value I PP e -t = t IPP / TEST WAVEFORM PARAMETERS t f = µs = µs , 1, - Pulse Duration - µs t - Time - µs 51.R7 /7

3 GRAPHS % Of Rated Power 1 6 FIGURE 3 POWER DERATING URVE Peak Pulse Power /µs Average Power T L - Lead Temperature - 5 Volts per Division FIGURE OVERSHOOT & LAMPING FOR PLDA ESD Test Pulse: 5 kilovolt, 1/3ns (waveshape) FIGURE 5 TYPIAL LAMPING VS PEAK PULSE URRENT FOR PLDA V - lamping Voltage - Volts I PP - Peak Pulse urrent - Amps FIGURE 6 INSERTION LOSS - PLDA5-6 FIGURE 7 RETURN LOSS - PLDA5-6 db db 1 db per Division Ref db 1 db per Division Ref db - db - db -5 db 1 MHz per Division -5 db 1 MHz per Division 51.R7 /7 3

4 APPLIATION NOTE The PLDAxx-6 Series are low capacitance, bidirectional TVS arrays that are designed to protect I/O or high speed data lines from the damaging effects of ESD or EFT. This product series has a surge capability of 5 Watts P PP per line for an /µs waveshape and offers ESD protection > kv. BIDIRETIONAL OMMON-MODE ONFIGURATION (Figure 1) Figure 1: Typical Transceiver Protection ircuit LINE 6 Ideal for use multimode transceiver I/O lines, the PLDAxx-6 Series provides up to six (6) lines of protection in a common-mode configuration as depicted in Figure 1. LINE 5 ircuit connectivity is as follows: Line 1 is connected to Pin 1. Line is connected to Pin. Line 3 is connected to Pin 3. Line is connected to Pin. Line 5 is connected to Pin 7. Line 6 is connected to Pin 6. Pins and 5 are connected to Ground. 1 LINE LINE 3 LINE LINE 1 BIDIRETIONAL OMMON-MODE ONFIGURATION (Figure ) 7 The PLDAxx-6 Series also provides video line applications six (6) lines of protection in a common-mode configuration as depicted in Figure. ircuit connectivity is as follows: Line 1 (Red) is connected to Pin 1. Line (Green) is connected to Pin. Line 3 (Blue) is connected to Pin 3. Line (VSYN) is connected to Pin 6. Line 5 (HSYN) is connected to Pin 7. Pins and 5 are connected to Ground IRUIT BOARD LAYOUT REOMMENDATIONS ircuit board layout is critical for Electromagnetic ompatibility (EM) protection. The following guidelines are recommended: Figure : Typical Video Line Protection ircuit LINE 1 (RED) LINE (GREEN) LINE 3 (BLUE) The protection device should be placed near the input terminals or connectors, the device will divert the transient current immediately before it can be coupled into the nearby traces. The path length between the TVS device and the protected line should be minimized. All conductive loops including power and ground loops should be minimized. GRAPHI ONTROLLER 3 1 DB-15 ONNETOR The transient current return path to ground should be kept as short as possible to reduce parasitic inductance. Ground planes should be used whenever possible. For multilayer PBs, use ground vias. 5 LINE (VSYN) LINE (HSYN) R7 /7

5 SO- PAKAGE OUTLINE & DIMENSIONS PAKAGE OUTLINE SO- 5 G 1 -B - P -A- -T- K +.1 (.5 MM) M T B S A S PL D.5 ±.5 + PL J MOUNTING PAD.1 (.5 MM) M B M.3 ±.5 R x 5 F - 1 MILLIMETERS INHES DIM MIN MAX MIN MAX A B D F G J K P R NOTES PAKAGE DIMENSIONS BS BS BS BS T - = Seating Plane and Datum Surface.. Dimensions A and B are Datum. 3. Dimensions A and B do not include mold protrusion.. Maximum mold protrusion is.15 (.3 mm) per side. 5. Dimensioning and tolerances per ANSI Y1.5M, Dimensions are exclusive of mold flash and metal burrs. TAPE & REEL/BULK ORDERING NOMENLATURE.16 ±.5.5 MIN 1. Surface mount product is taped and reeled in accordance with EIA-1.. Suffix-T7 = 7 Inch Reel - 1, pieces per 1mm tape, i.e. PLDA5-6-T7. 3. Suffix-T13 = 13 Inch Reel -,5 pieces per 1mm tape, i.e., PLDA5-6-T13.. Suffix - LF = Lead-Free, Pure-Tin Plating, i.e., PLDA5-6-LF-T7. 5. No Suffix = Product Shipped in Tubes of 9 pcs per Tube..5 ±.5 OPYRIGHT ProTek Devices 7 SPEIFIATIONS: ProTek reserves the right to change the electrical and or mechanical characteristics described herein without notice (except JEDE). DESIGN HANGES: ProTek reserves the right to discontinue product lines without notice, and that the final judgement concerning selection and specifications is the buyer s and that in furnishing engineering and technical assistance, ProTek assumes no responsibility with respect to the selection or specifications of such products. ProTek Devices 99 South Fair Lane, Tempe, AZ 5 Tel: Fax: sales@protekdevices.com Web Site: 51.R7 /7 5