Reducing Solid-State Storage Device Write Stress Through Opportunistic In-Place Delta Compression

Transcription

1 Reducing Solid-State Storage Device Write Stress Through Opportunistic In-Place Delta Compression Xuebin Zhang, Jiangpeng Li, Hao Wang, Kai Zhao and Tong Zhang ECSE Department, Rensselaer Polytechnic Institute (RPI)

2 Outline Introduction and Motivation Progressive Programmability of SLC Flash Pages In-place Delta Compression Realization in SSDs Evaluation Results and Overhead Analysis Future Work and Summary 2

3 NAND Flash Memory Increasing Adoptions and Decreasing Cost of NAND Flash Memory NAND Flash Increasingly wide adoption consumer client enterprise Endurance: One of Existing Problems of NAND Flash Memory Limited lifetime : SLC: 8000; MLC: 2000; TLC: <1000. Make it worse: Bad management in software stack. 3

4 % of LBAs Content Temporal Locality in Storage Systems Small (<4kB) update will trigger a 4kB write in Flash (write amplification) 60% writes are smaller than one page (4kB), even less than 10 bytes Redundancy between consecutive updates Frequently repeated in-place update within a short time period 100% >1000 Repeated visiting times 80% 60% 40% 20% 0% Finance-1 Finance-2 Homes Webmail Workload Traces 4

5 Delta Compression: Problems in Current Practice 4KB 12KB 4KB 12KB P 0 D 0 Other data 4KB 12KB P 0 D 0 Other data 4KB P 0 D 0 Other data 4KB P 1 L 1 L 2... L i-1 Physical page P 1 L 1 Other data 4KB P 2 L i Other data T 0 Write D 1 T 1 Write D i T i Latency: need to read multiple pages to recover the latest version. Storage: need to keep a mapping table to store the delta s location. 5

6 Outline Introduction and Motivation Progressive Programmability of SLC Flash Pages In-place Delta Compression Realization in SSDs Evaluation Results and Overhead Analysis Summary and Future Work 6

7 NAND Flash Progressive Programming Append new data in the same page (for SLC flash pages) Writing 1 to flash cell will not change its state Overwrite new data to original physical page 7

8 NAND Flash Progressive Programming Hardware Platform: PCIe interface, FPGA as the Flash controller 8

9 Bit error rate NAND Flash Progressive Programming Validity checking of multiple programming before erasing Conventional: one program one erase Progressive: eight program one erase 1.6 x Conventional Progressive Erase count 9

10 Outline Introduction and Motivation Progressive Programmability of SLC Flash Pages In-place Delta Compression Realization in SSDs Evaluation Results and Overhead Analysis Summary and Future Work 10

11 Percentage Proposed Solution: Combine Data/Delta Compression Use intra-sector lossless data compression to make space for deltas one sector data Compression compressed data unused space Per-sector Compression ratio distribution of different file types Database1 Database2 Excel Text Source Code Metadata Smaller is better compression ratio 11

12 Proposed Solution: In-place Delta Compression Overall flow diagram to update one new version of sector data Read from SLCmode page Input: New version data C k Data reconstruction C k-1 Delta compression d k Header generation and ECC encoding p k Allocate a new SLC-mode page Enough space? Y Compress C k and write to the allocated page Write p k through partial programming Sector content change d 0 d 1 d n d' 0 d' 1 d' n OR p k d 0 d 1 d n p 1 p 2 p m

13 Proposed Solution: In-place Delta Compression Consecutive in-place updates Physical page P 0 C 0 P 0 C 0 d 1 1 st update P 0 C 0 d 1 d 2 2 nd update P 0 C 0 d 1 d 2... d k Full: k-th update P 1 C k+1 Allocate a new page Reset delta compression 13

14 Proposed Solution: Data Placement Two different data placement strategies Clustered: shared region for deltas of this physical page Segmented: independent regions for deltas of each sector only 4kB A 4kB C 16kB SLC-mode page Ac B c C c D c Ac 4kB B C c 4kB D Clustered placement 16kB SLC-mode page Shared region for all deltas Deltas of sector D only B c D c Ac B c C c D c 4kB segment Segmented placement 14

15 Proposed Solution: ECC Management ECC management for different types of data elements Compressed original sector data Compressed deltas Header for each elements Compressed 4kB sector Compressed delta Header ECC redundancy SLC-mode flash memory page One ECC codeword 15

16 Outline Introduction and Motivation Progressive Programmability of SLC Flash Pages In-place Delta Compression Realization in SSDs Evaluation Results and Overhead Analysis Summary and Future Work 16

17 Compression Ratio Evaluation: Write Stress Reduction Case study: file system metadata Use a benchmark to generate database/files operations Implement a metaanalyzer to grasp metadata from file system Analyze the collected consecutive versions of metadata Delta compression efficiency: (full metadata size is 256 bytes) SQlite Insert File Append SQlite Update File Update Workload Traces 17

18 Page Needed Evaluation: Write Stress Reduction Write stress reduction to store 1000 consecutive versions SQlite Insert File Append SQlite Update File Update Less than Segmented Data Placement Strategy Clustered 18

19 t Normalized Page Used Count Normalized Page Used Count Normalized Page Used Count Evaluation: Write Stress Reduction General cases analysis Set the data/delta compression ratio as Gaussian distribution Simulation driven by traces of different workloads Rdata= 0.7 Rdelta=0.6 Rdata= 0.7 Rdata= Rdelta= Rdelta=0.6 Rdata= 0.7 Rdata= Rdelta= Rdelta=0.3 Rdata= 0.4 Rdelta=0.6 Rdata= 0.4 Rdata= Rdelta= Rdelta=0.6 Rdata= 0.4 Rdata= Rdelta= Rdelta=0.3 Rdata= 0.2 Rdelta=0.6 Rdata= 0.2 Rdata= Rdelta= Rdelta=0.6 Rdata= 0.2 Rdata= Rdelta= Rdelta= Lower is better Segmented 0.0 (a) Webmail Clustered Segmented (a) Webmail Clustered Segmented 0.0 (b) Repeated File 19 Upd

20 sed Count Normalized Page Used Count Normalized Page Used Count Normalized Page Used Coun 0.8 Evaluation: 0.6 Write Stress Reduction 0.4 General cases analysis Rdata= 0.7 Rdelta=0.6 Rdata= 0.7 Rdelta=0.3 Rdata= 0.7 Rdelta=0.1 Rdata= 0.4 Rdelta=0.6 Segmented Rdata= 0.4 Rdelta=0.3 Clustered Rdata= 0.4 Rdelta=0.1 Rdata= 0.2 Rdelta=0.6 Rdata= 0.2 Rdelta=0.3 Rdata= 0.2 Rdelta=0.1 (b) Repeated File Update Lower is better Segmented 0.0 (a) Webmail Clustered Segmented (d) TPC-C Clustered Segmented (b) Repeated File Upd

21 Evaluation: Read Latency Overhead Read operation s flow diagram in proposed solution ecc dec sen Memory Sensing xfer Data Transfer LDPC Decode BCH Decode Decompress Decompress com Combine sata SATA Transfer Read latency model Conventional Practice without data/compression: Proposed solution: (4 kb) ( dec) read sen xfer LDPC sata ( dec) ( dec) read sen xfer ( n 4 kb) max( LDPC, BCH ) max(, ) ( dec) ( dec) sec delta com sata 21

22 Evaluation: Latency Overhead and Silicon Cost Flash memory parameter configurations Flash memory sensing latency: 40 us Data transfer from flash to controller (ONFI 4.0): 800MB/s LDPC/BCH decoding throughput: 1GB/s Read latency overhead Silicon cost Operation Technique Average-case (us) Worst-case (us) Conventional 54 Read Clustered Segmented Total involved silicon area is 0.39 mm 2 at 22nm, while in genral, a whole controller s silicon area size is around mm 2. 22

23 Outline Introduction and Motivation Progressive Programmability of SLC Flash Pages In-place Delta Compression Realization in SSDs Evaluation Results and Overhead Analysis Summary and Future Work 23

24 Extensions and Future Work Use a hardware accelerator to offload computation intensive tasks Will not bring troubles to controller because of small silicon size and power consumption Benefit a lot from the perspective of performance Exploit the byte-addressability to realize the delta compression in NVM Limited endurance, expensive cost Inherent support of byte-addressability 24

25 Conclusion SLC Flash page can support Progressive Partial Programming : different portions of the same flash page can be programmed at different time. Lossless data compression can be utilized to make space for deltas between consecutive versions of updates. SSD write stress can be reduced by up to 80% with proposed solution without significant overhead. 25