SAS/SATA II Multi-lane. lane Connector/cabling

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1 SAS/SATA II Multi-lane lane Connector/cabling Bill Bissonette SCD/SPD 08-Sep Sep-2003 Page 1 1

2 External vs. Internal Cabling Schemes Internal TX to RX matching is accomplished with different pinouts (same ball-out) on host vs. target Host and device ball-outs look the same Host Key Internal Scheme Key Target External RX matching accomplished with cable keying Connector pin-outs & Si ball-outs are identical on both ends Multilane cable has flipped keying for correct connection Host and device ball-outs look the same External Scheme Key Host Target /- /- /- /- /+ /+ /+ /+ /+ /+ /+ /+ /- /- /- /- Key Intel Communications Group Storage Components Division Page 2

3 Heritage of SATA Multi-lane lane SATA adopted SAS multi-lane for compatibility Intent of SAS is to be interoperable w/ SATA SAS adopted FC for simplicity Cables already exist Why invent another one? FC adopted Infiniband scheme Proven technology, cables exist Eliminate TX connection, but SAS/SATA II AC coupled Infiniband scheme for easy cable construction But, no multi-lane vs. single lane pinout conundrum Intel Communications Group Storage Components Division Page 3

4 Ball-out/Routing Requirements FR4 is very lossy, thus: Minimal (zero at 3Gb/s) vias and no cross-over routing Vias add about 0.7pF depending on ground plane clearance ICH5 allows 2 vias for 1.5Gb/s channels (SATA I) Ball-out & routing should be similar for multiple single lane and multilane usage models External connector scheme should allow simple (cheap) cables No high-cost assembly requirements Ideally would re-use current IB/FC/SAS cable constituants Intel Communications Group Storage Components Division Page 4

5 Cable and Connector Construction (External) Twin-AX 8 discrete differential pairs No lane ordering enforced in cable construction Intel Communications Group Storage Components Division Page 5

6 Device #1 Single Channel Routing Host/Initiator Xcvr 0 Xcvr 1 Xcvr 2 Xcvr 3 Intel Communications Group Storage Components Division Page 6

7 Device #2 Single Channel Routing Initiator/host Xcvr 3 Xcvr 2 Xcvr 1 Xcvr 0 Intel Communications Group Storage Components Division Page 7

8 Routing to Current 8470 Scheme Device #2 Initiator/Host Xcvr 3 Xcvr 2 Xcvr 1 Xcvr 0 Not pretty Intel Communications Group Storage Components Division Page 8

9 Preferred Multi-lane lane Pinout Device #2 Initiator/Host Xcvr 3 Xcvr 2 Xcvr 1 Xcvr 0 Intel Communications Group Storage Components Division Page 9

10 Device #1 Multi-lane lane Routing Device #1 Initiator/host Xcvr 0 Xcvr 1 Xcvr 2 Xcvr 3 Intel Communications Group Storage Components Division Page 10

11 Alignment w/ Internal Multi-lane lane SB5 SB4 SB3 SB2 SB1 SB Current Internal 4-lane proposal G1 S1 S2 G2 S3 S4 G3 S5 S6 G4 S7 S8 G5 S9 S10 G6 S11 S12 G7 S13 S14 G8 S15 S16 G9 External Multi-lane proposal SB5 SB4 SB3 SB2 SB1 SB0 G1 S1 S2 G2 S3 S4 G3 S5 S6 G4 S7 S8 G5 SB5 SB4 SB3 SB2 SB1 SB0 SBG S9 S10 G6 S11 S12 G7 S13 S14 G8 S15 S16 G9 Possible Internal 4-lane pin designations to align w/ 8470 SB5 SB4 SB3 SB2 SB1 SB0 This end gets lopped off for 2-lane SB5 SB4 SB3 SB2 SB1 SB0 SBG S9 S10 G6 S11 S12 G7 S13 S14 G8 S15 S16 G9 2-lane implication Pin numbering gets awkward Intel Communications Group Storage Components Division Page 11

12 Proposed Pinouts xx G1 S1 S2 G2 S3 S4 G3 S5 S6 G4 S7 S8 G5 S9 S10 G6 S11 S12 G7 S13 S14 G8 S15 S16 G9 External Multi-lane proposal w/ SFF8470 Pin designations SB5 SB4 SB3 SB2 SB1 SB Internal 4-lane pin SB5 SB4 SB3 SB2 SB1 SB0 This end gets lopped off for 2-lane Internal 2-lane Intel Communications Group Storage Components Division Page 12

13 External X4 Scheme Host to Expander External Cable Assembly Initiator Expander Host/device ball-outs can be the same Lanes line up Intel Communications Group Storage Components Division Page 13

14 Host System External 4X Scheme Host to s External Cable Assembly SAS/SATA External Box w/ s Interposer #3 Initiator Interposer Interposer Interposer #2 #1 #0 Device-side pinout can be defined like internal 4X to backplane Intel Communications Group Storage Components Division Page 14

15 External 4X Scheme Host to Expander External Cable Assembly SAS/SATA Expander Box #3 Initiator Expander #2 #1 Host/device ball-outs are same #0 Intel Communications Group Storage Components Division Page 15

16 Backup Page 16 16

17 Lane Swizzle External Cable Assembly Initiator Target Lanes are swizzled end-to-end to line up Host/device ball-outs can be the same Supports 1X, 2X, 3X & 4X versions Cabcon suppliers saying, Construction won t be a problem. Intel Communications Group Storage Components Division Page 17

18 Reference: Internal multi-lane lane Host to Expander Internal Cable Assembly S2 Initiator Target S2 Connector geographic pin designations swapped from 8470 connector designations, but essentially the same routing Intel Communications Group Storage Components Division Page 18

19 Reference: Internal 4X Scheme Host to Backplane Internal Cable Assembly SAS/SATA Backplane S2 Initiator S2 Lanes line up Device side pin out different definition Intel Communications Group Storage Components Division Page 19

20 Extension to 12 Lane External /- /- /- /- /- /- /- /- G1 4 Lane SFF8470 TXB+/- TXB+/- TXA+/- RXA+/- TX9+/- RX9+- TX8+/- RX8+/- TX7+/- RX7+/- TX6+/- RX6+/- TX5+/- RX5+/-- TX4+/- RX4+/- /- /- /- /- /- /- /- /- 4 Lane SFF8470 G9 S16 S15 G8 S14 S13 G7 S12 S11 G6 S10 S9 G5 S8 S7 G4 S6 S5 G3 S4 S3 G2 External Multi-lane proposal w/ proposed pin designations Can designations for external change to align w/ lanes? Different connector keying for SAS/SATA? SATA device to SAS host No SATA host to SAS device Intel Communications Group Storage Components Division Page 20

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