Lecture 23 Introduction to Paging

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1 Lecture 23 Introduction to Paging

2 Why not Segmentation? Segmentation to chop up space into different-size chunks. the space itself can become fragmented, and thus allocation becomes more challenging over time. Paging to chop up space into fixed-sized pieces, i.e., pages. The physical memory can be viewed as an array of fixedsized slots called page frames; each of these frames can contain a single virtual-memory page.

3 Overview Address Space to Physical Memory

4 Why Paging? Advantages of paging: Flexibility: With a fully-developed paging approach, the system will be able to support the abstraction of an address space effectively, regardless of how a process uses the address space. Simplicity: The free-space management can be easy.

5 Page Table Page Table stores address translations for each of the virtual pages of the address space, thus letting us know where in physical memory each page reside. E.g., (Virtual Page 0 Physical Frame 3), (VP 1 PF 7), (VP 2 PF 5), and (VP 3 PF 2). (in Slide-55) Most page tables we discuss are per-process data structures.

6 Address-Translation an address-translation example Virtual address has two components: the virtual page number (VPN), and the offset within the page.

7 Address-Translation Assume m=6, n = 4 An example: 21 in decimal is in binary. Page number p = 01. Offset d = 0101.

8 Address-Translation According to Slide-3, the physical frame number (PFN) (also sometimes called the physical page number or PPN) is 7 (binary 111). How is this address translation performed?

9 Where Are Page Tables Stored? Where Are Page Tables Stored? Page tables can be terribly large. (What s the size of a page table with 32-bit address space and 4KB pages? assuming we need 4 bytes per page table entry (PTE) to hold the physical translation plus any other useful stuff) Page tables are stored for each process in kernel physical memory, not in MMU.

10 Example

11 What s Actually In The Page Table? Data structure in Page Tables The simplest form is called a linear page table, which is just an array. The OS indexes the array by the virtual page number (VPN), and looks up the page-table entry (PTE) at that index in order to find the desired physical frame number (PFN).

12 PTE PTE consists of: PFN. A valid bit is common to indicate whether the particular translation is valid. A present bit indicates whether this page is in physical memory or on disk. A dirty bit is also common, indicating whether the page has been modified since it was brought into memory. A reference bit (a.k.a. accessed bit) is sometimes used to track whether a page has been accessed, and is useful in determining which pages are popular and thus should be kept in memory.

13 PTE This PTE contains a present bit (P); a read/write bit (R/W) which determines if writes are allowed to this page; a user/supervisor bit (U/S) which determines if user-mode processes can access the page; a few bits (PWT, PCD, PAT, and G) that determine how hardware caching works for these pages; an accessed bit (A) and a dirty bit (D); and finally, the page frame number (PFN) itself.

14 Only for those wondering the details. (See Intel Manual) PTE

15 Paging: Also Too Slow By now you may understand paging. However there is one more problem: For every memory reference, paging requires us to perform one extra memory reference in order to first fetch the translation from the page table. Extra memory references are costly, and in this case will likely slow down the process by a factor of two or more.

16 Example An example: 1. Obtain the physical address of the starting location of the page table from a page-table base register. 2. Fetch the proper page table entry from the process s page table. 3. Translate the virtual address (21) into the correct physical address. 4. Fetch the data from the physical address and put it into register eax. Paging requires us to perform one extra memory reference!

17 Example One more example: The assembly code: Let s trace the memory references

18

19 Paging How to speed up paging? Hardware support: Translation Lookaside Buffers!

20 Exercise1 试比较内部碎片与外部碎片的异同

21 Exercise2 如果帧大小为 4KB, 那么具有 4B 大小页表条目的系统可以访问的最大物理内存空间为多少? 如果固定页表大小为一页呢?

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