ARM-based Embedded MPUs

Transcription

1 ARM-based Embedded MPUs SAMAD Xplained USER GUIDE SAMADXPLAINED Introduction This user guide introduces the Atmel SAMAD Xplained evaluation kit and describes the development and debugging capabilities for applications running on a SAMAD ARM -based embedded microprocessor unit (empu). 9A ATARM 0-Feb-

2 Scope This guide provides details on the SAMAD Xplained evaluation kit. It is made up of four main sections: Section. describes the evaluation kit content and its main features. Section. provides instructions to power up the SAMAD Xplained board. Section. provides an overview of the SAMAD Xplained board. Section. describes the SAMAD Xplained board components. Contents Boards One SAMAD Xplained board Cables One micro-ab type USB cable A welcome letter Related Items Atmel SAMAD Series Datasheet SAMAD Xplained Getting Started SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

3 Table of Contents. Evaluation Kit Specifications Electrostatic Warning Power Supply Warning Power Up Power up the Board Sample Code and Technical Support Hardware Introduction Introduction Equipment List Board features Board Components Board Overview Function Blocks Other Connector Details and PIO Usage Summary SAMAD Xplained Board Schematics Revision History SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

4 . Evaluation Kit Specifications Table -. Evaluation Kit Specifications Characteristic Temperature: - Operating - Storage Relative Humidity RoHS status Ordering code Specifications 0 C to +0 C -0 C to + C 0 to 90% (non-condensing) Compliant ATSAMAD-XPLD. Electrostatic Warning Electrostatic sensitive device Warning: ESD-Sensitive Electronic Equipment! The evaluation kit is shipped in a protective anti-static package. The board system must not be subject to high electrostatic potentials. We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board.. Power Supply Warning Warning: Hardware Power Supply Limitation Using a power adapter greater than Vcc (e.g. the Vcc power adapters from other kits such as Arduino kits) may damage the board. Warning:Hardware Power Budget Using the USB as the main power source (max. 00 ma) is acceptable only with the use of the on-board peripherals and low-power LCD extension. When external peripheral or add-on boards need to be powered, we recommend the use of an external power adapter connected to a J DC Jack (can provide up to.a on the.v node). SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

5 . Power Up Several power source options are available to power up the SAMAD Xplained board. The board can be: USB-powered through the USB Micro-AB connector (J connector - default configuration) Powered through an external AC-to-DC adapter connected via a. mm center-positive plug into the optional power jack of the board. The recommended output voltage range of the power adapter is V at A. Powered through the Arduino shield. Warning: Unlike Arduino Uno boards, the SAMAD Xplained board runs at.v. The maximum voltage that the I/O pins can tolerate is.v. Providing higher voltages (e.g. V) to an I/O pin could damage the board.. Power up the Board Unpack the board, taking care to avoid electrostatic discharge. Simply connect the USB Micro-AB cable to the connector (J).Then, connect the other end of the cable to a free USB port of your PC. Table -. Electrical Characteristics Electrical Parameter Input voltage Maximum input voltage Values VCC VCC Max DC.V current available.a I/O Voltage.V only. Sample Code and Technical Support After booting up the board, you can run sample code or your own application on the board. You can download sample code and get technical support from the Atmel website. Linux software and demos can be found on the website LinuxSAM. SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

6 . Hardware Introduction. Introduction The Atmel SAMAD Xplained board is a fully-featured evaluation platform for Atmel SAMAD series microcontrollers. It allows users to extensively evaluate, prototype and create application-specific designs.. Equipment List The SAMAD Xplained board is built around the integration of a Cortex -A-based microcontroller (BGA package) with external memory, dual Ethernet physical layer transceiver, two SD/MMC interfaces, two host USB ports and one device USB port, one -bit RGB LCD interface and one debug interface. Seven headers, compatible with Arduino R, are available for various shield connections. SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

7 . Board features Table -. Board Specifications Characteristics PCB characteristics Processor Processor clock sources Memory Optional on-board memory SD/MMC USB Display interface Ethernet Debug port Expansion connectors Board supply voltage Battery User interface Specifications x x 0mm (0-layers) SAMAD (-ball BGA package) ARM Cortex-A Processor with ARM v-a Thumb instruction set, core frequency up to MHz. -MHz crystal oscillator.-khz crystal oscillator x Gb DDR (M x bits x banks) x Gb SLC NAND Flash (M x bits) One Serial EEPROM SPI One -Wire EEPROM One -bit SD card connector One optional -bit Micro-SD card connector Two USB Hosts with power switch One Micro-AB USB device One LCD interface connector, LCD TFT Controller with overlay, alphablending, rotation, scaling and color space conversion One Gigabit Ethernet PHY (GRMII 0/00/000) One Ethernet PHY (RMII 0/00) One JTAG interface connector One serial DBGU interface (.V level) Arduino R compatible set of headers The SAMAD GPIO,TWI, SPI, USART, UART, Audio and ISI interfaces are accessible through these headers. V from USB or power jack or Arduino shield On-board power regulation is performed by a Power Management Unit (PMU) On-board optional power Cap for CMOS backup Reset, wakeup and free user pushbutton One red user/power LED and one blue user LED SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

8 . Board Components. Board Overview The full-featured SAMAD Xplained board integrates several peripherals and interface connectors, as shown in Figure -. Figure -. SAMAD Xplained Board Overview J PIO Expansion J0 PIO Expansion Gb Nand Flash Memory J PIO Expansion SPI Interface J9 PIO Expansion USB A Device Supply Input USB Host Interfaces Gb DDR Memory SAMAD Gb DDR Memory ATSAMAD CU 0 A XXXXXXXXXX ARM GigaBit Ethernet Optional Supply Input Voltages and Reset Interface Ethernet 0/00 Free User Push Button System Buttons JTAG Interface ADC Inputs Expansion LCD Connector ADC Inputs and CAN Interfaces Debug Interface SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

9 The SAMAD Xplained board is equipped with the following interface connectors: J: Main power supply J: USB A device, that supports USB device using a Micro-AB connector J (upper): USB B Host, that supports USB host using a type A connector J (lower): USB C Host, that supports USB host using a type A connector J: Serial DBGU.V level J: JTAG, 0-pin IDC connector J: Micro-SD connector J0: SD/MMC connector J: Gigabit Ethernet ETH0 J: Ethernet ETH J: Expansion connector with all LCD controller signals for display module connection (QTouch, TFT LCD display with Touch Screen and backlight C: Optional SuperCap J to J: Seven expansion connectors with Arduino R compatible PIO signals Various test points located throughout the board. Function Blocks Figure -. Evaluation Kit Architecture Push Buttons Reset Force PwrOn V & V Single PMU Solution V INPUT USB DEVICE Expansion Headers VBAT Power rails USER LEDS ANALOG Reference PIO A,...E PIO ATMEL SAMAD CORTEX-A PROCESSOR USB A,B,C EBI JTAG & DBGU PIO A,...E USB Host x Gb DDR SDRAM (Up to Gb) Gb NAND FLASH (Up to Gb) JTAG DBGU LCD Connector SD CARD Micro SD CARD SERIAL 0/00/000 0/00 DATA FAST ETHERNET ETHERNET FLASH ETH0 ETH SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 9

10 .. Processor The SAMAD Xplained board is built around the SAMAD, a Cortex-A application processor which combines highperformance computing device with low-power consumption and a wide range of communication peripherals. It features a combination of user interface functionalities and high data rate IOs, including LCD controller, touchscreen, camera interface, Gigabit and 0/00 Ethernet ports, high-speed USB and SDIO. The ARM Cortex-A supports the latest generation of DDR and NAND Flash memory interfaces for program and data storage. An internal -MHz multi-layer bus architecture associated with DMA channels and two -Kbyte SRAM blocks, sustains the high bandwidth required by the processor and the high-speed peripherals... Clock Circuitry The SAMAD Xplained evaluation board features four clock sources: Two clocks are alternatives for the SAMAD series processor main clock Two crystal oscillators are used for the GETH and Ethernet MII/RMII chip Table -. Main Components Associated with the Clock Systems Quantity Description Component Assignment Crystal for internal clock, MHz Y Crystal for RTC clock,. khz Y Oscillator for ethernet clock RGMII, MHz Y Oscillator for ethernet clock RMII, MHz Y.. Power Supplies The on-board power supply generation is based on the Active-Semi Power Management Unit (PMU) featuring a - channel (.V /.V /.V or.0v) topology. For a maximum efficiency, these supply channels are generated by three integrated step-down converters. In addition to these DCDC channels, LDO channels with low noise and high PSRR performance are available for the application. These channels are disabled at startup by default and can be turned on and adjusted under software control through an I²C link. They are also used to supply the.v VDDFUSE and the.v VDDANA power inputs of the processor. The power supply sequencing of the three primary channels is controlled by the PMU itself in perfect compliance with the SAMAD requirements. The turn-on sequence is:.v first, then.v and finally.v. Table - summarizes the power specifications. Table -. Supply Group Configuration Nominal Name Power domains Power source.0v VDDBU The slow clock oscillator, the internal K RC, the internal M RC and a part of the system controller Optional on-board battery.v VDDIOP0 A part of peripheral I/O lines.v VDDIOP A part of peripheral I/O lines.v VDDUTMII The three USB interfaces.v VDDOSC The main oscillator cells PMU.V VDDANA The analog-to-digital converter.v VDDCORE The core, including the processor, the embedded memories and the peripherals SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 0

11 Table -..V VDDUTMIC The USB UTMI + core.v VDDPLLA The PLLA cell.v VDDIODDR DDR interface I/O lines.v VDDIOM NAND, NOR Flash and SMC interface I/O lines.0v to.v Supply Group Configuration (Continued) Nominal Name Power domains Power source PMU ADVREF ADC reference voltage J header.v VDDFUSE Fuse box for programming PMU Note: Jumper footprints are available on board to measure power consumption on main power lines. By default, the jumpers are not implemented. They are short-circuited by a thin PCB wire. To use this functionality, open the short circuit and mount a -pin jumper. Figure -. Board Power Management Schematic JP DNP(JUMPER) VDDCORE L 0ohm at 00MHz L 0ohm at 00MHz AVDDL_PLL AVDDL [,9,0,] NRST [] PC [] WKUP [] PE0 [] SHDN [] TWCK_PMIC [] TWD_PMIC R.K % R K PC PC V R.K % R R9 V_MAIN C V.uF R 0K 0R DNP(0R) C.uF R C.uF 0R R R C uf MN VP VP VP NC VDDREF nrst0 nirq npbstat 0 VSEL NC 0 PWRHLD PWREN SCL SDA ACT INL INL SW OUT SW OUT SW OUT V_MAIN C uf 0 L L L9 9 C uf.uh.uh.uh C 0uF C 0uF C 0uF C9 0uF C 0uF C 0uF C0 00nF C 00nF C 00nF (V) (V) (V) JP DNP(JUMPER) VDDIODDR V R R0 L JP DNP(JUMPER) L 0ohm at 00MHz L R 0uH0mA L R 0uH0mA 0ohm at 00MHz C.uF C.uF DVDDL VDDPLLA VDDUTMIC VDDIOP0 R 0K Auto PWRON (option) C0 00nF C nf R 9.9K 9 REFBP npbin OUT OUT OUT (V) (V) R 0R FUSE_V TP SMD VDDANA C9 00nF L0 0ohm at 00MHz JP DNP(JUMPER) L 0ohm at 00MHz VDDIOP VDDIOM C 00nF Q BP R 0R BP GNDA GNDP GNDP GNDP EXPAD OUT C.uF C.uF C.uF C.uF R 0R TP SMD R L R 0uH0mA C.uF VDDOSC R9 00K % C0 0nF IRLML0 BP BP 9 WAKUP or Force Power ON RESET SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

12 ... Power Options Several power options are available to configure the SAMAD Xplained board powering scheme. The power sources are selected by a set of 0R resistors. The USB-powered operation is the default configuration. The power source is the USB device port (J) connected to a PC or a mini-ab V DC supply. The USB supply is sufficient to power the board in most applications if USB host ports are not used. If USB host ports are used, it is recommended to use a DC supply source. Schematic diagrams of various power options are illustrated in Figure -. Figure -. Input Powering Scheme Option Schematic [] Vbus R 0R V_MAIN R 0R [] V_Ext R DNP(0R) J R R R DNP(0R) DNP(0R) DNP(0R) D PSMAJ.0A DNP(DC JACK) Note: USB-powered operation is a good single cable solution because it combines powering and board control through a unique cable. Consequently, it eliminates the need for other wires and batteries. This power option is suitable for most projects that only require volts at up to 00 ma.... Mains Power Adapter A mains power supply adapter can be used to provide power to the board. A regulated V DC supply of typically A is required but a current range of A is recommended if the USB ports and expansion headers are likely to be used. It needs a. mm plug with a center-hot configuration. If you are using the USB host ports or expansion board Arduino shields, a higher current is required. To supply the full 00 ma per port, a mains power adapter must be used.... VBAT By default, VDDBU is delivered through the.v node. An optional SuperCap (C), used for real-time clock backup, is provided. The board does not come equipped with the SuperCap. When the SuperCap is not installed, an R must be installed. You must make sure that the R is removed prior to installing the SuperCap. Figure -. VBAT Powering Scheme Option Schematic V TP Place TP to Bottom SMD R0 00R C 0nF D BATCLT Populate R if no Super Cap (C) R.K % (Super)-Capacitor energy storage C DNP(0.F/V) R 00K % VDDBU R DNP(00K) C 00nF [] VBat [,9,0,] NRST V R.K % NRST [] TDI [] TMS [] TCK [] TDO [] NTRST TDI TMS TCK TDO NTRST T9 R N0 P9 M P V9 JTAGSEL TDI TMS TCK TDO NTRST NRST VDDBU V R 0K U U9 TST BMS SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

13 .. Reset Circuitry The reset sources for the SAMAD Xplained board are: Power-on reset from the Power Management Unit (PMU), Reset Pushbutton BP, JTAG reset from an in-circuit emulator (through JTAG interface).. Memory Organization The SAMADx-series processor features a DDR/SDRAM memory interface and an External Bus Interface (EBI) to interface with a wide range of external memories and to almost any kind of parallel peripherals. The memory devices that equip the SAMAD Xplained evaluation kit are as follows: Two DDR/SDRAM (MTHMHR) used as main system memory ( MByte). The board includes Gbits of on-board soldered DDR (double data rate) SDRAM. The footprints can also host two DDR (MTHMRT) from Micron for a total of MBytes of DDR memory. The memory bus is bits wide and operates with a frequency of up to MHz (See Figure -). One NAND Flash (MT9FG0ABAEAWP) connected to the processor. The default size is MBytes. The footprint can also host a -Gbit Micron chip for a total of MBytes of NAND Flash memory (See Figure -). Figure -. DDR Schematic DDR_D[0..] DDR_A[0..] VDDIODDR R R DDR_A0 DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A9 DDR_A0 DDR_A DDR_A DDR_A DDR_BA0 DDR_BA DDR_BA DNP(K) 0R DDR_CKE DDR_CLK DDR_CLKN DDR_CS DDR_CAS DDR_RAS DDR_WE DDR_DQS R0.K DDR_DQS0 R.K DDR_DQM DDR_DQM0 MN M A0 DDR SDRAM DQ0 M A DQ M A MTHMHR DQ N A DQ N A DQ N A DQ N A DQ P A DQ P A DQ P A9 DQ9 M A0 DQ0 P A DQ R A DQ R A DQ DQ L BA0 DQ L BA L BA VDD K9 ODT VDD VDD VDD VDD K CKE VDDL J CK K CK VDDQ VDDQ VDDQ L CS VDDQ VDDQ VDDQ L CAS VDDQ K RAS VDDQ VDDQ K WE VDDQ VREF B UDQS A UDQS VSS VSS VSS F LDQS VSS E LDQS VSS VSSQ B UDM VSSQ F LDM VSSQ VSSQ VSSQ VSSQ A RFU VSSQ E RFU VSSQ R RFU VSSQ R RFU VSSQ VSSDL G G H H H H9 F F9 C C D D D D9 B B9 A E J9 M9 R J A9 C C C C9 E9 G G G G9 J A E J N P9 A B B D D E F F H H J DDR_D0 DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D9 DDR_D0 DDR_D DDR_D DDR_D DDR_D DDR_D VDDIODDR C 00nF C9 00nF C 00nF C 00nF C 00nF DDR_VREF C 00nF C9 00nF C 00nF C 00nF C 00nF C 00nF C9 00nF C9 00nF C9 00nF C9 00nF C9 00nF C00 00nF VDDIODDR L 0uH0mA DDR_A0 DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A DDR_A9 DDR_A0 DDR_A DDR_A DDR_A DDR_BA0 DDR_BA DDR_BA VDDIODDR R DNP(K) R 0R DDR_CKE DDR_CLK DDR_CLKN DDR_CS DDR_CAS DDR_RAS DDR_WE DDR_DQS R9.K DDR_DQS R.K DDR_DQM DDR_DQM MN M A0 DDR SDRAM DQ0 M A DQ M A MTHMHR DQ N A DQ N A DQ N A DQ N A DQ P A DQ P A DQ P A9 DQ9 M A0 DQ0 P A DQ R A DQ R A DQ DQ L BA0 DQ L BA L BA VDD K9 ODT VDD VDD VDD VDD K CKE VDDL J CK K CK VDDQ VDDQ VDDQ L CS VDDQ VDDQ VDDQ L CAS VDDQ K RAS VDDQ VDDQ K WE VDDQ VREF B UDQS A UDQS VSS VSS VSS F LDQS VSS E LDQS VSS VSSQ B UDM VSSQ F LDM VSSQ VSSQ VSSQ VSSQ A RFU VSSQ E RFU VSSQ R RFU VSSQ R RFU VSSQ VSSDL G G H H H H9 F F9 C C D D D D9 B B9 A E J9 M9 R J A9 C C C C9 E9 G G G G9 J A E J N P9 A B B D D E F F H H J DDR_D DDR_D DDR_D DDR_D9 DDR_D0 DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D DDR_D9 DDR_D0 DDR_D VDDIODDR C 00nF C 00nF C0 00nF C 00nF C 00nF DDR_VREF C 00nF C 00nF C0 00nF C 00nF C 00nF C 00nF C 00nF C90 00nF C9 00nF C9 00nF C9 00nF C9 00nF C0.uF R R C0 00nF TP R SMD.K % DDR_VREF C0.uF C0 00nF R.K % SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

14 Figure -. NAND Flash Schematic R R9 00K % 00K % NANDRDY NCS VDDIOM R0 00K % JP JUMPER PE PE NRD NWE MN MT9FG0ABAEAWP (NANDCLE) (NANDALE) CLE I/O0 9 ALE I/O 0 RE I/O (NANDCE) WE I/O 9 CE I/O I/O R/B I/O I/O 9 WP I/O_N.C N.C I/O9_N.C N.C I/O0_N.C N.C I/O_N.C N.C I/O_N.C 0 N.C I/O_N.C N.C I/O_N.C 0 N.C I/O_N.C N.C VCC N.C9 VCC N.C0 VCC_N.C 0 N.C VCC_N.C 9 N.C N.C N.C VSS DNU VSS DNU VSS_N.C DNU VSS_N.C M_EBI_D0 M_EBI_D M_EBI_D M_EBI_D M_EBI_D M_EBI_D M_EBI_D M_EBI_D VDDIOM C0 00nF C0 00nF The following memory part numbers are recommended: Table -. Recommended Memories Part Number Supplier Size Type MTHM Micron Gb ( M x x banks) DDR - BGA MTHM Micron Gb ( M x x banks) DDR - BGA MT9FG0 Micron Gb NAND Flash - TSOP MT9FG0 Micron Gb NAND Flash - TSOP.. SD/MMC Interface The SAMAD Xplained board features two high-speed Multimedia Card Interfaces (MCI). The first interface is used as an -bit interface (MCI0), connected to a SD/MMC card slot (J0) located on the bottom side of the PCB. The second interface is used as a -bit interface (MCI), connected to an optional Micro-SD card connector (J) located on the top side of the PCB. The MCI0 SD card power line is enabled by default. It is PIO-controlled through a MOSFET transistor. Note: The power source is VCC (. volts).... J0 SD Card Slot When a card is inserted into the SD/MMC connector, the Card Detect pin (PE0) is tied to ground. Figure -. J0 SD Card Schematic VDDIOP VDD_MCI0 Q IRLML0 VDDIOP R 00K % PE [] K R K R K R K R K R K R K R K R 0K R C0 0uF C09 00nF R DNP(.K) VDDIOM R 0K [] PE0 [] PD [] PD [] PD9 [] PD0 [] PD [] PD (MCI0_CD) (MCI0_DA) (MCI0_DA0) (MCI0_CK) R (MCI0_CDA) (MCI0_DA) (MCI0_DA) R J0 9 (MCI0_WP) 0 R 0R SDMM-B0- [] PD [] PD [] PD [] PD (MCI0_DA) (MCI0_DA) (MCI0_DA) (MCI0_DA) SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

15 ... J SD Card Slot (optional) When a card is inserted into the Micro SD connector, the Card Detect pin is tied to ground. This is detected on pin PE of the main processor. Figure -9. J Micro SD Card Schematic VDDIOP VDDIOM [] PB0 [] PB [] PB [] PB [] PB9 [] PB [] PE (MCI_DA0) (MCI_DA) (MCI_DA) (MCI_DA) (MCI_CDA) (MCI_CK) (MCI_CD) K R0 R K R K R R K R9 0K R DNP(K) R R9 0K 9 0 J DAT0 DAT DAT DAT CMD CLK VDD VSS CD PGND PGND PGND PGND NC NC C0 0uF C 00nF DNP(MCTF-00) Micro SD CARD INTERFACE - MCI.. Serial Peripheral Interface (SPI) The SAMADX-series processor features two high-speed Serial Peripheral Interfaces. One port is used to interface with the optional on-board serial DataFlash. There are four main signals used in the SPI interface; Clock, Data In, Data Out, and Chip Select. Figure -0. Optional Serial DataFlash Schematic VDDIOP R 00K % PD PD0 PD PD (SPI0_MOSI) (SPI0_MIS0) (SPI0_SPCK) (SPI0_CS) MN DQO VCC DQ C W/Vpp/DQ HOLD/DQ S GND VDDIOP C0 00nF JP JUMPER DNP(NQ0AESE0F) SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

16 .. Optional -Wire EEPROM The SAMAD Xplained board can use a -Wire device as soft label to store data such as chip type, manufacturer s name, production date, etc. Figure -. Optional One-Wire EEPROM Schematic VDDIOM R.K PE MN IO GND NC DNP(DSE0) IO MN GND NC NC NC NC DNP(DS)..9 0/00/00 Ethernet Port The SAMAD Xplained board features a MICREL PHY device (KSZ90RN) operating at 0/00/000 Mb/s. The board supports the RGMII interface mode. The Ethernet interface consists of four pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators. These signals are routed to the 0/00/000 BaseT RJ connector (J). For monitoring and control purposes, LEDs are integrated in the RJ connectors to indicate activity, link, and speed status information for the corresponding ports. For more information about the Ethernet controller device, refer to the MICREL KSZ90RN datasheet. Figure -. Gigabit Ethernet Schematic C 0pF XI 0Base-T/00Base-TX/000BASE-T C 0pF Y MHz XO AVDDL_PLL + C C 0uF 0nF C 0nF VDDIOP 0ohm at 00MHz L + C C 0uF 0nF C9 0nF C0 0nF AVDDH R.K % XI XO R0.K R K R R VDDIOP GCK PB INT_GETHR PB0 GMDIO PB VDDIOP NRST [,,0,] PB[0..] [,,0,] VDDIOP C 0nF C 0nF C 0nF + C 0uF ETH0_A+ ETH0_A- ETH0_B+ ETH0_B- ETH0_C+ ETH0_C- ETH0_D+ ETH0_D- ETH0_A+ ETH0_A- ETH0_B+ ETH0_B- ETH0_C+ ETH0_C- ETH0_D+ ETH0_D- AVDDH R DNP(0R) C DNP(0uF 00) 9 0 J TD+ TD- TD+ TD- TD+ TD- TD+ TD- GND TCT GND RCT GND C GND 00nF F-0GYDPLNL 0R R GRLA GRLC Left Green LED YELC YELA Right Yellow LED EARTH_ETH0 ETH0_LED LINK ETH0_LED ACT AVDDL + C 0uF C 0nF C9 0nF 9 0 AVDDH TXRXP_A TXRXM_A AVDDL TXRXP_B TXRXM_B TXRXP_C TXRXM_C AVDDL TXRXP_D TXRXM_D AVDDH KSZ90RNI -pin QFN MN0 KSZ90RN MDC RX_CLK DVDDH RX_DV RXD0 RXD DVDDL 0 VSS 9 RXD RXD DVDDL TX_EN VDDIOP GMDC PB GRXCK PB GRX_CTL PB GRX0 PB GRX PB GRX PB GRX PB GTX_CTL PB9 VSS_PS DVDDL LED DVDDH LED DVDDL TXD0 TXD TXD TXD DVDDL GTX_CLK 9 0 0R R P_GND 9 ISET AVDDH XI XO AVDDL_PLL LDO_O RESET_N CLK_NDO DVDDH 0 DVDDL 9 INT_N MDIO R R R R.K.K.K.K R R ETH0_GND VDDIOP DVDDL R 0R L 0ohm at 00MHz ETH0_LED ETH0_LED R9.K + C 0uF C 0nF C 0nF C 0nF C 0nF C C 0nF 0nF R0 R GTXCK GTX GTX GTX GTX0 PB PB PB PB PB0 ETH0_GND EARTH_ETH0 SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

17 9..0 Ethernet 0/00 Port The SAMAD Xplained board features a MICREL PHY device (KSZ0RNB) operating at 0/00 Mb/s. The board supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators. These signals are routed to the 0/00 BaseT RJ connector (J). For monitoring and control purposes, a LED functionality is added on the RJ connectors to indicate activity, link, and speed status information for the corresponding ports. For more information about the Ethernet controller device, refer to the MICREL KSZ0RNB controller manufacturer's datasheet. Figure -. RMII Ethernet Schematic VDDIOP VDDIOP0 TD+ CT TD- RD+ CT RD- F-GYDPLNL TX+ TX- RX+ RX- J TX+ TX- RX+ RX- TX+ TX- RX+ RX- TXP TXM RXP RXM 0Base-T/00Base-TX MN9 RXC/B-CAST_OFF 9 TXD TXD0 TXEN RXD/PHYAD0 RXD/PHYAD RXD/PHYAD RXD0/DUPLEX RXDV/CONFIG RXER/ISO 0 CRS/CONFIG 9 COL/CONFIG0 R K R K 0K R 0K R 0K R ETH_PC [] ETH_PC [] ETH_PC0 [] ETH_PC [] ETH_PC [] ETH_PC [] ETH_PC [] ETH_PC [] EARTH_ETH Right yellow LED NC nf Left Green LED C9 C0 00nF 00nF C.uF C 00nF GND_ETH.9k/% R 0 EARTH_ETH VDDIOP0 ETH_XO VDD_V GND PADDLE TXC TXD TXD REXT XO MDC MDIO INTRP/NAND E_AVDDT VDDIOP0 L9 VDDA_V 0ohm at 00MHz C + C 00nF 0uF 0K R 0K R 0K R 0K R9 0K R0 ETH_PC [] ETH_PC9 [] PB [] VDDIOP0 0 ETH_LED ACT R R 0K 0K ETH_LED0 ETH_LED ETH_XI 9 0 XI LED0/NWAYEN LED/SPEED VDDIO C + C 00nF 0uF R9 0R ETH_LED0 LINK R0 0R RESET NRST [,,9,] KSZ0RNB C 0pF ETH_XI VDDIOP0 + C 0uF Y MHz R GND_ETH 0R L0 0ohm at 00MHz EARTH_ETH C9 0pF ETH_XO.. Indicators Two LEDs are available on the SAMAD Xplained board. Both can be software-controlled by the user. The red LED indicates that power is applied to the board (by default). It can be controlled via software. The blue LED is mainly controlled by one GPIO line. Figure -. LED Indicators Schematic [,,,] PE[0..] PE R 0R D V BLUE PE R 00K % LED Q IRLML0 R 0R D RED SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

18 .. USB The SAMAD Xplained board features three USB communication ports: Port A: High-speed (EHCI) and full-speed (OHCI) host multiplexed with high-speed USB device Micro-AB connector (J) Port B: High-speed (EHCI) and full-speed (OHCI) host, standard type A connector (J upper port) Port C: Full-speed OHCI host, standard type A connector (J lower port) The two USB host ports are equipped with 00-mA high-side power switch for self-powered and bus-powered applications. The USB device port A (J) features a VBUS insert detection function through the ladder-type resistors R and R. Figure -. USB Interface Schematic [,] PE9 [] Vbus (VBUS_SENSE) R 00K USB A DEVICE INTERFACE R 00K % C C 0pF 0pF MHz.K Y V U V XOUT XIN XOUT MNH SAMADx_BGA VDDOSC VDDUTMII VDDPLLA EARTH_USB_A J UBAF-0P VBUS DM DP ID GND L 0ohm at 00MHz C HHSDMA HHSDPA HHSDMB HHSDPB HHSDMC HHSDPC 0pF U V V0 U0 V U V U R DIBN DIBP HHSDMA HHSDPA HHSDMB HHSDPB HHSDMC HHSDPC VBG GNDBU GNDPLL GNDOSC GNDFUSE GNDCORE_ GNDCORE_ GNDCORE_ GNDCORE_ GNDCORE_ GNDCORE_ GNDIODDR_ GNDIODDR_ GNDIODDR_ GNDIODDR_ GNDIODDR_ GNDIOP_ GNDIOP_ GNDIOP_ GNDIOP_ GNDIOM_ GNDIOM_ GNDUTMI_ GNDANA VDDUTMIC VDDANA ADVREF EARTH_USB_A R0 C0.K % 0pF T P0 T P A C9 N T T V E F0 F F H J N U E J T R L R 0R J_USB_A_Up V_USBB HHSDMB HHSDPB A B J Dual USB A L 9 0 0ohm at 00MHz J_USB_B_Down V_USBC HHSDMC HHSDPC V_USBC V_USBB C 00nF C 00nF C 0uF C 0uF GNDUTMI L 0ohm at 00MHz V_MAIN C 00nF L 0ohm at 00MHz MN OUTA ENA IN FLGA GNG FLGB OUTB ENB SPA-E ENV_USBC OVCUR_USB ENV_USBB GNDUTMI PE [] PE [] PE [] EARTH_USB EARTH_USB.. Pushbutton Switches The following pushbuttons switches are available: One board reset button (BP). When pressed and released, this pushbutton causes a power-on reset of the whole board. One wakeup pushbutton that brings the processor out of Low-power mode (BP) One user pushbutton (BP) SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

19 Figure -. Pushbutton Schematic R 0K Auto PWRON (option) C0 00nF C nf R 9.9K 9 REFBP npbin C 00nF R9 00K % C0 0nF Q IRLML0 BP R 0R BP BP BP GNDA GNDP 9 GNDP [,] PE9 TP SMD Place TP to Bottom BP USER BUTTON WAKUP or Force Power ON RESET.. LCD The SAMAD processor drives bits of data and control signals to the LCD interface. Other signals are used to control the LCD and are also routed to the J connector: TWI, SPI, GPIOs for interrupt, ID for -Wire EEPROM (ID_SYS) and power supply lines.... LCD Connector One. mm pitch 0-pin header is provided to gain access to the LCD signals. Figure -. LCD Expansion Header Interface Schematic V_MAIN V NRST PE (RST_LCD) PD (AD) R9 PD0 (SPI0_MISO) R0 PD (AD) R0 PD (SPI0_NPCS) R0 PA (LCDPCK) [] TWCK_LCD [] TWD_LCD R9 R9 R9 R99 PD0 (AD0) R9 PD (SPI0_SPCK) R9 PD (AD) R00 PD (SPI0_MOSI) R9 R DNP(0R) 0R 0R DNP(0R) DNP(0R) R DNP(0R) R DNP(0R) R DNP(0R) R R TWCK_LCD TWD_LCD PA (LCDPWM) PE (IRQ) PE IRQ) TWCK_LCD TWD_LCD PA (LCDDISP) PA9 (LCDDEN) PA (LCDHSYNC) PA (LCDVSYNC) PE (LCDDAT) PE (LCDDAT) PC (LCDDAT) PC0 (LCDDAT0) PC (LCDDAT9) PC (LCDDAT) PC (LCDDAT) PC (LCDDAT) PA (LCDDAT) PA (LCDDAT) PA (LCDDAT) PA (LCDDAT) PA (LCDDAT) PA0 (LCDDAT0) PA9 (LCDDAT9) PA (LCDDAT) PA PA PA PA PA PA PA PA0 LCD Connector (LCDDAT) (LCDDAT) (LCDDAT) (LCDDAT) (LCDDAT) (LCDDAT) (LCDDAT) (LCDDAT0) PE (ID_SYS) J FP0T-0SR0... LCD Power To operate correctly with various LCD modules, regardless of the processor, two voltage lines are available: V by default and V_MAIN, both selected by 0R resistors R9 and R9. SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 9

20 .. Debug JTAG/ICE and DBGU... Debug JTAG/ICE A x0-pin JTAG header is implemented on the SAMAD Xplained board to enable the software development and debugging of the board by using various JTAG emulators. The interface signals have a voltage level of.v. Figure -. JTAG/ICE Interface Schematic JTAG VDDIOP0 V R0 00K % R0 00K % R0 00K % R0 00K % 0 0 J TDI TMS 9 TCK RTCK TDO 9 R09 R0 0R 0R R0 0R NTRST [] TDI [] TMS [] TCK [] TDO [] NRST [,,9,0]... DBGU The SAMAD Xplained board has a dedicated serial port for debugging, which is accessible through the -pin male header J. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-R-V USB to TTL serial cable or basic breakout board for the /USB converter. These interfaces are available on the following websites: Adafruit: Sparkfun: Figure -9. DBGU Interface Schematic V V V_MAIN R9 R90 R R [] [] PB PB0 PE PE R (TXD) (RXD) R 0R 0R K K DNP(0R) DNP(0R) J DEBUG P0-*0SGF-A-NX R and R are optional (not implemented) resistors that can be used for power selection. Power can be delivered either by the SAMAD Xplained board or by the debug interface tool. To avoid a contention between your debug interface (e.g. FTDI) and the on-board power system, be careful during the installation of one of this resistor... Expansion Ports Five -pin, one 0-pin, one -pin and one x-pin headers (J to J) are implemented on the board to enable the PIO connection of various expansion cards that could be developed by users or by other sources. Due to multiplexing, different signals can be provided on each pin. These connectors are mechanically and footprint compatible with the SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 0

21 Arduino R shields. As the SAMAD signals have a voltage level of.v, -V level shields must not be used on the SAMAD Xplained. In addition to its standard IO functionality, the SAMAD processor can provide alternate functions to external IO lines available on the J to J headers. These alternate functions are: UARTs: UART0, UART USARTs: USART0, USART, USART, USART SPI: SPI I²C: TWI0, TWI Timer capture and compare: TIOA, TIOB Clock out: PCK0, PCK, PCK PWMs: PWML0, PWMH0, PWML, PWMH DIGITAL AUDIO: TD0, TK0, TF0, RD0, RK0, RF0 ISI: ISI[D0:D], ISI_HSYNC, ISI_VSYNC, ISI_PCK CAN: CAN-RX0, CANTX0, CANRX, CAN_TX Analog: AD[0:], ADTRG, ADREF GPIO: MISC RESET VBAT To get further details on the PIO multiplexing and alternate function selection, refer to the SAMAD series datasheet. SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

22 ... Functions available through the Arduino Headers The following tables illustrate the functionalities provided by the SAMAD Xplained board. They show the pins used to implement each functionality. Note: Some pins are multiplexed for different functionalities, which means that only one at a time can be active for each pin. Table -. Function by PIO (part ) PIO NAME PCK ISI SSC CAN SPI PC TK PC TF PC TD PC0/PD RF PC/PD RD PC9/PD0 PCK0 -- RK PD0/PC PCK0/PCK PD PCK PB CANRX -- PD CANRX0 -- PB CANTX -- PD CANTX0 -- PC/PC SPI_MISO PC/PC SPI_SPCK PC/PC SPI_MOSI PC SPI_NPCS0 PC/PA0 -- ISI_D/VSYNC SPI_NPCS PC/PA -- ISI_D0/HSYNC SPI_NPCS PC -- ISI_D SPI_NPCS PC9 -- ISI_D PA -- ISI_D PA -- ISI_D PA -- ISI_D PA0 -- ISI_D PA9 -- ISI_D PA -- ISI_D PA -- ISI_D PA -- ISI_D PC0 -- ISI_PCK PA0 -- ISI_VSYNC PA -- ISI_HSYNC SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

23 Table -. Function by PIO (part ) PIO NAME TWI UART/USART ANALOG MISC V/V V/V nrts nrts GND GND AREF AREF -- V V PC AD0 -- PD AD -- PD AD -- PD AD -- PD AD -- PD AD -- PD AD -- PD AD -- PC0/PD AD -- PC/PD AD9 -- PC9/PD AD0 -- PD AD -- PD9/PB ADTRG -- PA9 TWCK PA TWD PC TWD PA0 TWD0 URXD PA TWCK0 UTXD PC/PA0 TWD0/TWD URXD PC/PA TWCK0/TWCK URTD PC0 -- UTXD PC9 -- URXD0 -- PWMFI PD -- SCK PD -- CTS PD -- TXD PD -- RXD PB -- SCK PB -- CTS PB9 -- TXD PB -- RXD SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

24 Table -. Function by PIO (part ) (Continued) PIO NAME TWI UART/USART ANALOG MISC PB -- RTS -- PWMH PE0 -- SCK PE -- CTS PE -- TXD PE -- RXD PE -- RTS PE -- SCK PE -- CTS PE9 -- TXD PE -- RXD PE -- RTS PC/PC GPIO PC/PC GPIO PC/PC GPIO PC GPIO PE GPIO PE GPIO PE GPIO PE GPIO PE GPIO PE IRQ/PWML PC PWMFI0 PA PWMH0 PA PWMH PA PWML0 PA PWML PE TCLK PC TCLK PC TCLK PC TIOA PC TIOA PC TIOB PC TIOB SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

25 ... J Header Figure -0. J Header Table -. J Header IOs Silkscreen PIO Function Function Function PIO Function Function SCL0 PA TWCK0 UTXD ISI_HSYNC SDA0 PA0 TWD0 URXD ISI_VSYNC ARFE GND PC SPI_SPCK PC0 ETX0 TIOA PC SPI_MISO PC ETX TIOB PC SPI_MOSI PC ERX0 TCLK 0 PC SPI_NPCS PC ERX TIOA PC ETXEN TIOB SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

26 ... J Header Figure -. J Header Table -. J Header IOs Silkscreen PIO Function Function Function PC ECRSDV TCLK -- PC ERXER TIOA -- PC EREFCK TIOB -- PC SPI_NPCS PWMFI0 ISI_D9 PC EMDC TCLK -- PC9 EMDIO PC0 UTXD0 ISI_PCK -- 0 PC9 URXD0 PWMFI ISI_D SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

27 ... J0 Header Figure -. J0 Header Table -. J0 Header IOs Silkscreen PIO Function Function Function PIO Function Function Function TXD PE9 A9 TXD RXD PE A RXD TXD PB9 TXD RXD PB RXD TXD0 PD TXD RXD0 9 PD RXD SDA 0 PC SPI_NPCS TXWD ISI_D PA0 TWD0 URXD ISI_VSYNC SCL PC SPI_NPCS TWCK ISI_D0 PA TWCK0 UTXD ISI_HSYNC SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

28 ... J9 Header Figure -. J9 Header Table -9. J9 Header IOs Silkscreen PIO Function Function Function PIO Function Function PD0 PD0 AD0 PCK0 -- PC PCI_CK PCK PC PC TF PB PB CTS GRX PE9 PE9 A PA PA LCDDAT ISI_D PA9 PA9 LCDDAT9 TWCk ISI_D PA PA LCDDAT PWML0 ISI_D PA PA LCDDAT PWML ISI_D PE PE A SCK PE PE A RTS PE PE A PE PE A CTS PE PE A RXD PE PE A SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

29 Table -9. J9 Header IOs (Continued) Silkscreen PIO Function Function Function PIO Function Function PE9 PE9 NWR/NBS TCLK PC PC SPI_NPCS TXWD ISI_D PC PC TK PB PB SCK GRX PB PB RTS PWMH PE0 PE0 A PA PA LCDDAT ISI_D PA PA LCDDAT TWD ISI_D PA0 PA0 LCDDAT0 PWMH0 ISI_D PA PA LCDDAT PWMH ISI_D PE PE A CTS PE0 PE0 A0 SCK PE PE A PE PE A RTS PE PE NCS0 TXD PE PE A PE PE IRQ PWML PB PB GCOL CANTX SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 9

30 ... J Header Figure -. J Header Table -0. J Header IOs Silkscreen PIO Function MISO PC SPI_MISO V/V -- Power supply SPCK PC SPI_SPCK MOSI PC SPI_MOSI RST NRST System reset GND -- Power ground SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 0

31 ... J Header Figure -. J Header Position Table -. J Header IOs Silkscreen VBAT V RST V V GND GND NC Function VBAT supply AREF. Reference voltage for the analog inputs of the SAMAD processor. System reset Main.V supply - generated by the on-board regulator. Maximum sourced current is.a. This regulator also provides the power supply to the SAMAD microcontroller and components. Main.0V supply System ground System ground Not connected SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

32 ... J Header Figure -. J Header Table -. J Header IOs Silkscreen PIO Function Function Function PIO Function Function A0 PC TD PD0 AD0 -- A PD AD A PD AD A PD AD A PD AD A PD AD A PD AD A PD AD SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

33 ...9 J Header Figure -. J Header Table -. J Header IO Silkscreen PIO Function Function Function PIO Function Function A PC0 RF PD AD -- A9 PC RD PD9 AD9 -- A0 PC9 RK PD0 AD0 PCK0 A PD PCK ** PB GCRS CANRX ** PD9 ADTRG PB GCOL CANTX CANRX0 PD SCK0 SPO_NPCS CANRX CANTX0 PD CTS0 SPI0_NPCS CANTX SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

34 . Other Connector Details and PIO Usage Summary.. Power Supply Figure -. Power Supply Connector J (Optional) Table -. Power Supply Connector J Signal Description Pin Mnemonic Signal Description Center +V -- GND -- Floating SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

35 .. JTAG/ICE Connector Figure -9. JTAG port J Table -. JTAG/ICE Connector J Signal Descriptions Pin Mnemonic Signal Description VTref.V power Vsupply.V power This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor. This pin is not connected in SAM-ICE. It is reserved for compatibility with other equipment. Connect to VDD or leave open in target system. ntrst Target Reset - Active-low output signal that resets the target. JTAG Reset. Output from SAM-ICE to the reset signal on the target JTAG port. Typically connected to ntrst on the target CPU. This pin is normally pulled High on the target to avoid unintentional resets when there is no connection. GND Common ground. TDI Test Data Input - Serial data output line, sampled on the rising edge of the TCK signal. JTAG data input of target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU. GND Common ground. TMS Test Mode Select. JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal. GND Common ground. 9 TCK Test Clock - Output timing signal, for synchronizing test logic and control register access. JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU. 0 GND Common ground. RTCK - Input Return Test Clock signal from the target. Some targets must synchronize the JTAG inputs to internal clocks. To fulfill this requirement, a returned and resynchronized TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND. GND Common ground. TDO JTAG Test Data Output - Serial data input from the target. JTAG data output from target CPU. Typically connected to TDO on target CPU. GND Common ground nsrst RESET Active-low reset signal. Target CPU reset signal. GND Common ground SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

36 Table -. JTAG/ICE Connector J Signal Descriptions (Continued) Pin Mnemonic Signal Description RFU This pin is not connected. GND Common ground 9 RFU This pin is not connected. 0 GND Common ground.. USB Type A Dual Port Figure -0. USB Type A Dual Port J9 Table -. USB Type A Dual Port J9 Signal Descriptions Pin Mnemonic Signal Description A Vbus - USB_A V power A DM - USB_A Data minus A DP - USB_A Data plus A GND Common ground B Vbus - USB_A V power B DM - USB_A Data minus B DP - USB_A Data plus B GND Common ground Mechanical pins -- Shield SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

37 .. USB Micro-AB Figure -. USB Host/Device Micro-AB Connector J Table -. USB Device Micro-AB Connector J Signal Descriptions Pin Mnemonic Signal Description Vbus V power DM Data minus DP Data plus ID On-the-go identification GND Common ground.. DEBUG Connector Figure -. DEBUG Connector J Table -. DEBUG Connector J Signal Descriptions Pin Mnemonic PIO Signal Description -- PE -- TXD (transmitted data) PB RS serial data input signal RXD (transmitted data) PB0 RS serial data output signal Power line (V/V) -- PE -- GND -- Common ground.. SD/MMC Plus MCI0 Figure -. SD/MMC Socket J0 SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

38 Table -9. SD/MMC Socket J0 Signal Descriptions Pin Mnemonic PIO Signal Description DAT PD Data bit CMD PD0 Command line VSS -- Command line VCC -- Supply voltage.v CLK PD9 Clock / command line CD PE0 Card detect DAT0 PD Data bit DAT PD Data bit 9 DAT PD Data bit 0 DAT PD Data bit DAT PD Data bit DAT PD Data bit DAT PD Data bit WP R Protect VSS -- Common ground VSS -- Common ground SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

39 .. MicroSD MCI Figure -. MicroSD Socket J Table -0. MicroSD Socket J Signal Descriptions Pin Mnemonic PIO Signal Description DAT PB Data bit CD/DAT PB Card detect / data bit CMD PB9 Command line VCC -- Supply voltage.v CLK PB Clock / command line VSS -- Common ground DAT0 PB0 Data bit 0 DAT PB Data bit 9 SW -- Not used, grounded 0 CARD DETECT PE Card detect.. Gigabit Ethernet ETH0 RJ Socket J Figure -. Gigabit Ethernet RJ Socket J RJ-..9 Ethernet ETH RJ Socket J Figure -. Ethernet RJ Socket J RJ- SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 9

40 ..0 LCD Socket J Figure -. LCD Socket J Table -. LCD Socket J Signal Descriptions PIN Signal Display Module Interface Function MCU Interface Function ID_SYS Extension module identification (connected to -wire EEPROM available on LCD display module) Extension module identification GND GND GND D0 Data line Data line D Data line Data line D Data line Data line D Data line Data line GND GND GND D Data line Data line 9 D Data line Data line 0 D Data line Data line D Data line Data line GND GND GND D Data line Data line D9 Data line Data line D0 Data line Data line D Data line Data line GND GND GND D Data line Data line 9 D Data line Data line 0 D Data line Data line D Data line Data line GND GND GND D Data line Data line D Data line Data line D Data line Data line D9 Data line Data line GND GND GND D0 Data line Data line SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb- 0

41 Table -. LCD Socket J Signal Descriptions (Continued) PIN Signal Display Module Interface Function MCU Interface Function 9 D Data line Data line 0 D Data line Data line D Data line Data line GND GND GND PCLK Pixel clock -- VSYNC/CS Vertical sync Chip select HSYNC/WE Horizontal sync Write enable DATA_ENABLE/ RE Data enable Read enable SPI_SCK -- SPI_SCK SPI_MOSI -- SPI_MOSI 9 SPI_MISO -- SPI_MISO 0 SPI_CS -- SPI_CS ENABLE Display enable signal Display enable signal TWI_SDA IC data line (maxtouch ) IC data line (maxtouch) TWI_SCL IC clock line (maxtouch) IC clock line (maxtouch) IRQ maxtouch interrupt line maxtouch interrupt line IRQ Interrupt line for other IC devices Interrupt line for other IC devices PWM Backlight control Backlight control RESET Reset for both display and maxtouch Reset for both display and maxtouch VCC.V or V supply (0R).V supply 9 VCC.V or V supply (0R).V supply 0 GND GND GND.. PIO Usage Most signals can also be configured as simple inputs or outputs from the processor. Table -. PIO A Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PA0 LCDDAT0 LCDDAT0 VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

42 Table -. PIO A Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PA9 LCDDAT9 LCDDAT9 VDDIOP0 PA0 LCDDAT0 LCDDAT0 VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT LCDDAT VDDIOP0 PA LCDDAT ISI_D0 ISI_D0 VDDIOP0 PA LCDDAT ISI_D ISI_D VDDIOP0 PA LCDDAT TWD ISI_D TWD/ISI_D VDDIOP0 PA9 LCDDAT9 TWCK ISI_D TWCK/ISI_D VDDIOP0 PA0 LCDDAT0 PWMH0 ISI_D ISI_D VDDIOP0 PA LCDDAT PWML0 ISI_D ISI_D VDDIOP0 PA LCDDAT PWMH ISI_D ISI_D VDDIOP0 PA LCDDAT PWML ISI_D ISI_D VDDIOP0 PA LCDPWM LCDPWM VDDIOP0 PA LCDDISP LCDDISP VDDIOP0 PA LCDVSYNC LCDVSYNC VDDIOP0 PA LCDHSYNC LCDHSYNC VDDIOP0 PA LCDPCK LCDPCK VDDIOP0 PA9 LCDDEN LCDDEN VDDIOP0 PA0 TWD0 URXD ISI_VSYN C TWD0 URXD/ISI_VSYNC VDDIOP0 PA TWCK0 UTXD ISI_HSYN C TWCK0 UTXD/ISI_HSYNC Table -. PIO B Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP PB0 GTX0 PWMH0 GTX0 VDDIOP PB GTX PWML0 GTX VDDIOP PB GTX TK GTX VDDIOP PB GTX TF GTX VDDIOP PB GRX0 PWMH GRX0 VDDIOP PB GRX PWML GRX VDDIOP PB GRX TD GRX VDDIOP PB GRX RK GRX SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

43 Table -. PIO B Pin Assignment and Signal Description (Continued) Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP PB GTXCK PWMH GTXCK VDDIOP PB9 GTXEN PWML GTXEN VDDIOP PB0 GTXER RF INT_GETH -- VDDIOP PB GRXCK RD GRXCK -- VDDIOP PB GRXDV PWMH INT_ETH VDDIOP PB GRXER PWML GRXER VDDIOP PB GCRS CANRX CANRX VDDIOP PB GCOL CANTX CANTX VDDIOP PB GMDC GMDC -- VDDIOP PB GMDIO GMDIO VDDIOP PB GCK GCK VDDIOP PB9 MCI_CDA GTX MCI_CDA -- VDDIOP PB0 MCI_DA0 GTX MCI_DA0 VDDIOP PB MCI_DA GTX MCI_DA -- VDDIOP PB MCI_DA GTX MCI_DA -- VDDIOP PB MCI_DA GRX MCI_DA VDDIOP PB MCI_CK GRX MCI_CK VDDIOP PB SCK GRX SCK VDDIOP PB CTS GRX CTS VDDIOP PB RTS PWMH RTS VDDIOP PB RXD RXD VDDIOP PB9 TXD TXD VDDIOP0 PB0 DRXD DRXD (DBGU) -- VDDIOP0 PB DTXD DTXD (DBGU) -- Table -. PIO C Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PC0 ETX0 TIOA ETX0 ETX0/TIOA VDDIOP0 PC ETX TIOB ETX ETX/TIOB VDDIOP0 PC ERX0 TCLK ERX0 ERX0/TCLK VDDIOP0 PC ERX TIOA ERX ERX/TIOA VDDIOP0 PC ETXEN TIOB ETXEN ETXEN/TIOB VDDIOP0 PC ECRSDV TCLK ECRSDV ECRSDV/TCLK VDDIOP0 PC ERXER TIOA ERXER ERXER/TIOA VDDIOP0 PC EREFCK TIOB EREFCK EREFCK/TIOB SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

44 Table -. PIO C Pin Assignment and Signal Description (Continued) Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PC EMDC TCLK EMDC EMDC/TCLK VDDIOP0 PC9 EMDIO -- EMDIO EMDIO VDDIOP0 PC0 MCI_CDA LCDDAT0 LCDDAT0 VDDIOP0 PC MCI_DA0 LCDDAT9 LCDDAT9 VDDIOP0 PC MCI_DA TIOA LCDDAT LCDDAT VDDIOP0 PC MCI_DA TIOB LCDDAT LCDDAT VDDIOP0 PC MCI_DA TCLK LCDDAT LCDDAT VDDIOP0 PC MCI_CK PCK LCDDAT LCDDAT/PCK VDDIOP0 PC TK0 TK0 Audio VDDIOP0 PC TF0 TF0 Audio VDDIOP0 PC TD0 TD0 Audio VDDIOP0 PC9 RK0 RK0 Audio VDDIOP0 PC0 RF0 RF0 Audio VDDIOP0 PC RD0 RD0 Audio VDDIOP0 PC SPI_MISO SPI_MISO VDDIOP0 PC SPI_MOSI SPI_MOSI VDDIOP0 PC SPI_SPCK SPI_SPCK VDDIOP0 PC SPI_NPCS0 SPI_NPCS0 VDDIOP0 PC SPI_NPCS TWD ISI_D SPI_NPCS/TWD VDDIOP0 PC SPI_NPCS TWCK ISI_D0 SPI_NPCS/TWCK VDDIOP0 PC SPI_NPCS PWMFI0 ISI_D9 SPI_NPCS/ISI_D9 VDDIOP0 PC9 URXD0 PWMFI ISI_D URXD0/ISI_D VDDIOP0 PC0 UTXD0 ISI_PCK UTXD0/ISI_PCK VDDIOP0 PC FIQ PWMFI IRQ_PMIC Table -. PIO D Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP PD0 MCI0_CDA MCI0_CDA VDDIOP PD MCI0_DA0 MCI0_DA0 VDDIOP PD MCI0_DA MCI0_DA VDDIOP PD MCI0_DA MCI0_DA VDDIOP PD MCI0_DA MCI0_DA VDDIOP PD MCI0_DA TIOA0 PWMH MCI0_DA VDDIOP PD MCI0_DA TIOB0 PWML MCI0_DA VDDIOP PD MCI0_DA TCLK0 PWMH MCI0_DA SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-

45 Table -. PIO D Pin Assignment and Signal Description (Continued) Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP PD MCI0_DA PWML MCI0_DA VDDIOP PD9 MCI0_CK MCI0_CK VDDIOP PD0 SPI0_MISO SPI0_MISO SPI0_MISO VDDIOP PD SPI0_MOSI SPI0_MOSI SPI0_MOSI VDDIOP PD SPI0_SPCK SPI0_SPCK SPI0_SPCK VDDIOP PD SPI0_NPCS0 SPI0_NPCS0 VDDIOP PD SCK0 SPI0_NPCS CANRX0 VDDIOP PD CTS0 SPI0_NPCS CANTX0 SCK0/SPI0_NPCS 0/CANRX0 CST0/SPI0_NPCS /CANTX0 VDDIOP PD RTS0 SPI0_NPCS PWMFI SPI0_NPCS VDDIOP PD RXD0 RXD0 VDDIOP PD TXD0 TXD0 VDDIOP PD9 ADTRG ADTRG (HSYNC) VDDANA PD0 AD0 AD0/LCD TSC VDDANA PD AD AD/LCD TSC VDDANA PD AD AD/LCD TSC VDDANA PD AD AD/LCD TSC VDDANA PD AD AD VDDANA PD AD AD VDDANA PD AD AD VDDANA PD AD AD VDDANA PD AD AD VDDANA PD9 AD9 AD9 VDDANA PD0 AD0 PCK0 -- AD0/PCK0 VDDANA PD AD PCK AD/PCK Table -. PIO E Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOM PE0 A0/NBS0 MCI0_CD VDDIOM PE A MCI_CD VDDIOM PE A PWR_MCI0 VDDIOM PE A ENV_USBB VDDIOM PE A ENV_USBC VDDIOM PE A OVCUR_USB VDDIOM PE A RST_LCD SAMAD Xplained User Guide [USER GUIDE] 9A ATARM 0-Feb-