Alexandros Daglis Computer Science PhD Candidate École Polytechnique Fédérale de Lausanne (EPFL)

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1 Alexandros Daglis Computer Science PhD Candidate École Polytechnique Fédérale de Lausanne (EPFL) Computer & Communication Sciences École Polytechnique Fédérale de Lausanne daglis/ INJ 239, Station 14, CH-1015 Lausanne Research Interests I am broadly interested in the ongoing transition towards extreme hardware heterogeneity, as it opens a broad range of architectural innovation opportunities. With CPU performance improvements stagnating, it is time for a paradigm shift from CPU-centric to network- and memory-centric computing. Such transition calls for a thorough rethink of well-established practices across layers: hardware architectures, software, and algorithms. I therefore strive to take holistic, cross-layer approaches in my research. My work so far has been focused on rack-scale computing and network-compute integration, targeting the most challenging communication-intensive services. These services are abundant in modern datacenter environments, where service quality guarantees impose tight microsecond-scale tail latency constraints. Blurring the boundaries between network and compute, and pushing functionality with richer semantics to the network paves the way for tail-tolerant, low-latency services. Education 2012 present PhD candidate in Computer Science École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland Thesis: Network-compute co-design for distributed in-memory computing Advisors: Prof. Babak Falsafi & Prof. Edouard Bugnion Diploma in Electrical & Computer Engineering (5-year degree) National Technical University of Athens (NTUA), Athens, Greece Thesis: A study of a dynamic placement policy in a NUCA cache Advisor: Prof. Nectarios Koziris GPA: 9.22/10 (Summa cum laude top 1%) Awards & Honors Microsoft Research Fellowship EPFL Computer Science Fellowship Nominated for a Fulbright scholarship for graduate studies in the US 2010 Honorary distinction by the State Scholarships Foundations of Greece (IKY) for ranking 5/430 in class (undergraduate) 1

2 Employment Sep Research Assistant at EPFL, Lausanne, Switzerland Research on Datacenter Technologies and In-Memory Rack-scale Computing Core member of the Scale-Out NUMA project, introducing a communication protocol and architecture for fast distributed in-memory processing. Designed Scale-Out NUMA s Remote Memory Controller, an on-chip network protocol controller integrated in the processor s coherence domain. Proposed and evaluated NI split, the first scalable network interface design for manycore chips. Proposed and evaluated SABRes, a lightweight hardware extension that provides the network interface with the capability of direct atomic access to data objects in remote memory, without the remote CPU s involvement. Contributed to the design of RackOut, a system architecture that leverages fast one-sided remote memory accesses (RDMA) for memory pooling and load balancing in skewed data serving workloads. Contributed to the design of the Mondrian Data Engine, an algorithmhardware co-design for high-performance data analytics on emerging architectures with near-memory processing capabilities. Jan. May 2015 Systems Research Intern at HP Labs, Palo Alto, USA Software and hardware research for HP s The Machine Analyzed the microarchitectural behavior and memory access patterns of analytics workloads on Spark. Investigated opportunities for hybrid hardware-software and partial coherence schemes for shared something architectures. Peer-Reviewed Publications [1] The Mondrian Data Engine. Mario Drumond, Alexandros Daglis, Nooshin Mirzadeh, Dmitrii Ustiugov, Javier Picorel, Babak Falsafi, Boris Grot, Dionisios Pnevmatikatos. In Proceedings of the 44th International Symposium on Computer Architecture (ISCA), Toronto, ON, Canada, [2] The Case for RackOut: Scalable Data Serving Using Rack-Scale Systems. Stanko Novakovic, Alexandros Daglis, Edouard Bugnion, Babak Falsafi, Boris Grot. In Proceedings of the ACM Symposium in Cloud Computing (SoCC), Santa Clara, CA, USA, [3] SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing. Alexandros Daglis, Dmitrii Ustiugov, Stanko Novakovic, Edouard Bugnion, Babak Falsafi, Boris Grot. In Proceedings of the 49th International Symposium on Microarchitecture (MI- CRO), Taipei, Taiwan, [4] An Analysis of Load Imbalance in Scale-out Data Serving. Stanko Novakovic, Alexandros Daglis, Edouard Bugnion, Babak Falsafi, Boris Grot. ACM SIGMETRICS (Short paper), Antibes Juan-Les-Pins, France,

3 [5] Manycore Network Interfaces for In-Memory Rack-Scale Computing. Alexandros Daglis, Stanko Novakovic, Edouard Bugnion, Babak Falsafi, Boris Grot. In Proceedings of the 42nd International Symposium on Computer Architecture (ISCA), Portland, OR, USA, [6] Scale-Out NUMA. Stanko Novakovic, Alexandros Daglis, Edouard Bugnion, Babak Falsafi, Boris Grot. In Proceedings of the 19th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XIX), Salt Lake City, UT, USA, Oral Presentations SABRes: Atomic Object Reads for In-Memory Rack-Scale Computing 49th International Symposium on Microarchitecture (MICRO), Taipei, Taiwan (conference presentation) Oct Chip Design for In-Memory Rack-Scale Computing EcoCloud Annual Event, Lausanne, Switzerland (invited) May 2016 Manycore Network Interfaces for In-Memory Rack-Scale Computing Research day of the Computer Systems Lab of the National Technical University of Athens (NTUA), Athens, Greece (invited) 42nd International Symposium in Computer Architecture (ISCA), Portland, USA (conference presentation) Jan Jun Hybrid Coherence for The Machine HP Labs, Palo Alto, USA May 2015 Student Supervision Zilu Tian (1st year PhD at EPFL) Sep present Currently supervising Zilu in a project targeting memory access efficiency via dynamic in-memory data transformation through specialized hardware. Dmitrii Ustiugov (3rd year PhD at EPFL) Jan. Aug Supervised Dmitrii on memory hierarchy design leveraging emerging Storage-Class Memory technology as a cheaper and denser DRAM replacement. This work identified the key parameters that enable designs capable of delivering significant cost benefits without sacrificing performance and is currently under review. Ivo Mihailovic (Master s thesis at EPFL) Mar. Apr Supervised Ivo on his Master s thesis, in which he studied the effectiveness of RDMAfriendly data structures and the tradeoff between data overfetch and additional network roundtrips. Marina Shimchenko (Summer intern at EPFL) Jun. Sep Supervised Marina on extending the QEMU emulator to support incremental checkpoints, a critical missing feature, as it dramatically reduces storage requirements for long chains of checkpoints needed for cycle-accurate simulation. 3

4 Zaid Qureshi (2nd year Master s at EPFL) Mar. Jun Supervised Zaid on a semester project investigating caching policies for data accessed from remote memory over RDMA operations, driven by the insight that remote memory access patterns drastically differ from those of local accesses. Hussein Kassir (Master s thesis at EPFL) Feb. Jun Supervised Hussein (with Mario Drumond) on his master thesis, which involved prototyping the Scale-Out NUMA architecture on HARP, Intel s hybrid CPU-FPGA platform. Hussein is now a PhD student at EPFL. MS Course Research Project Mentoring Fall 2015 & Fall 2017 As the head TA of the Advanced Multiprocessor Architecture course at EPFL, supervised twenty course-tailored research projects in total over two semesters. Sample topics include: shared core frontend for call graph prefetching, graph analytics on GPU, the effect of multithreading on the performance density of server processors, and analysis of modern RPC software stacks. Teaching Assistantships Fall 2017 Fall 2015 Fall 2017 Fall 2016 Spring 2017 Fall 2016 Fall 2014 Fall 2013 Spring 2016 Spring 2014 Spring 2013 Advanced Multiprocessor Architecture (MS) Head TA Prepared the course material (slides, exercises, exams), graded, guided students on individual research projects, and gave guest lectures on distributed memory systems and advanced topics on memory consistency. Introduction to Multiprocessor Architecture (BS) Guest Lecturer Gave guest lectures on cache coherence and memory consistency. Topics on Datacenter Design (PhD) Constructed curriculum, led in-class discussions, graded weekly paper reviews. Course based on paper readings and discussions. Computer Architecture I (BS) Prepared the course s material (slides, exercises, labs, exams), graded, and taught lab sessions. Virtual Reality (MS) Prepared a lab exercise based on Google Cardboard and assisted in lab sessions. Real-time Embedded Systems (MS) Assisted in lab sessions. Professional Service CloudSuite Benchmark Suite: Member of the CloudSuite team since CloudSuite is one of the first benchmark suites representative of modern datacenter services, and has been used to drive the design of modern datacenter-oriented CPUs, such as Cavium ThunderX. I have been in the core team responsible for the 2nd and 3rd releases of CloudSuite, which upgraded the software packages and added new workloads. In the 3rd release we also included pre-packaged Docker images of all workloads to ease deployment. I was responsible for the Graph Analytics workload in the 2nd release, and the Media Streaming workload in the 3rd release. 4

5 Flexus Simulator: Member of the Flexus maintenance team since Flexus is the only full-system cycleaccurate simulator that can be used to practically model full-blown modern server software stacks, thanks to its integrated SMARTS statistical sampling. The project s latest focus has been on (i) porting Flexus from Simics to the QEMU open-source and widely used emulator, making Flexus widely accessible to the community; and (ii) moving from the Sparc to the ARM ISA, which is emerging in the server space. Tutorials: Apr Jan Jun Server Benchmarking with CloudSuite 3.0 at EuroSys 16, London, UK. With Mario Drumond, Javier Picorel, and Dmitrii Ustiugov. Server Benchmarking with CloudSuite 3.0 at the 11th HiPEAC conference, Prague, Czech Republic. With Mario Drumond and Javier Picorel. CloudSuite on Flexus at the 40th International Symposium on Computer Architecture (ISCA), Tel-Aviv, Israel. With Djordje Jevdjic and Cansu Kaynak. Funding In April 2016, drafted the technical part of a Swiss National Science Foundation research proposal with Javier Picorel, entitled Memory-Centric Server Architecture for Datacenters (Principal PI: Prof. Babak Falsafi). The proposal was ranked at the top of six quality levels and was awarded a full 3-year funding for 2 PhD students. Patent Scale-Out Non-Uniform Memory Access US Patent 20,150,242,324, 2015 With Stanko Novakovic, Boris Grot, Edouard Bugnion, and Babak Falsafi. Prototyped on Intel s hybrid CPU-FPGA HARP platform. Licensed by a major IT vendor in Languages Greek, English, German (limited working proficiency), French (elementary proficiency). Extracurricular Violin Diploma (highest degree), 2012 Erateio Conservatory, Athens, Greece. Principal first violin in the orchestra of Erateio Conservatory, Gold medal in the 5th World Choir Games (Graz, Austria), as member of the Rosarte choir. 5