TEACHING PLAN GUIDE. Course Content/Activity Sem /17 Chapters from 10 th Edition textbook. Week. Week Feb. 17.

Transcription

1 TEACHING PLAN GUIDE Week Course Content/Activity Sem /17 Chapters from 10 th Edition textbook Lab Activity Date/Notes 1 Chapter 1: Basic Concepts and Computer Evolution Organization and architecture Structure and function A brief history of Computers The evolution of the Intel x86 Architecture Embedded systems ARM architecture Cloud computing Introduction to FPGA and Digital Electronic refreshment. (1 and 2) Quartus II Refreshment Week Feb Chapter 2: Performance Issues Designing for performance Multicore, MICs, and GPGPUs Two laws that provide insight : Ahmdahl s law and Little s law Basic measures of computer performance Calculating the mean Benchmarks and spec A VHDL Primer: The Essentials: Design Structure and Data types (3.1) Week Feb Chapter 3: A Top-Level View of Computer Function and Interconnection Computer components Computer function Interconnection structure Bus interconnection Point-to-point interconnect PCI express Operators and Attributes and Concurrent Design (3.2) Week 3 27 Feb. 3 Mar. 17 Universiti Malaysia Perlis 1 /5

2 4 Chapter 14 : Processor Structure and Function Week Mar. 17 Processor organization Register organization Instruction cycle Instruction pipelining The x86 processor family The ARM processor Sequential Design (3.3) 5 Chapter 20 : Control Unit Operation Micro-operations Control of the processor Hardwired implementation Implement FPGA design by using VHDL code on DE2 board Briefing on lab assignments and Mini-project Week Mar Chapter 21 : Microprogrammed Control Basic concepts Microinstruction sequencing Microinstruction execution T Signals and Variables and State Machines (3.4) Week Mar Chapter 4: Cache Memory Computer memory system overview Cache memory principles Elements of Cache Design Pentium 4 cache organization Implement Memory by using MegaCore Function. Implement LCD design on FPGA Week Mar MID TERM EXAM 1 Lab assignment 1: 30 th Mar. 17 Thursday Universiti Malaysia Perlis 2 /5

3 - Mid Semester Break 1 Week Apr Week Apr. 17 Chapter 5: Internal Memory Semiconductor main memory Error correction DDR DRAM Flash memory Newer nonvolatile solid-state memory technologies Implement Additional Circuit Designs on DE 2 board (3.5) - FINAL EXAM VETTING 9 Chapter 6: External Memory Magnetic disk RAID Solid state drives Optical memory Magnetic tape Verification of Lab assignment 1 Week Apr Chapter 7 : Input/Output External devices I/O modules Programmed I/O Interrupt-driven I/O Direct memory access Direct cache access I/O channels and processors External interconnection standards IBM zenterprise EC12 I/O structure Packages and Components Approaches (4.1) Lab assignment 2: Week Apr. 17 Israk Mikraj 24 th April 2017 Universiti Malaysia Perlis 3 /5

4 11 Chapter 16 : Instruction Level Parallelism and Superscalar Processors Overview Design issues Intel core microarchitecture ARM-Cortex-A8 ARM-Cortex-M3 Verification of Lab assignment 2 Week May 17 Labour Day 1 st May 2017 Wesak Day 2 nd May MID TERM EXAM 2 4 th May 17 Thursday 12 Chapter 17 : Parallel Processing Multiple processor organizations Symmetric multiprocessors Cache coherence and the MESI protocol Multithreading and chip multiprocessors Clusters Nonuniform memory access Cloud computing Functions and Procedures (4.2) Additional System Designs Week May Chapter 15 : Reduced Instruction Set Computers Instruction execution characteristics The use of a large register file Compiler-based register optimization Reduced instruction set architecture RISC pipelining MIPS 4000 SPARC RISC vs CISC controversy Mini-Project Viva Week May 17 Birthday of DYMM Tuanku Raja Perlis 17 th May 2017 Universiti Malaysia Perlis 4 /5

5 14 Mini-Project Viva Week May 17 - Study week 1 week 29 May 04 Jun. 17 Birthday of SPB Yang Di-Pertuan Agung 3 th June Examination Week 3 weeks Jun. 17 Nuzul Al-Quran 12 th June 2017 Dr. Muataz Hameed Salih muataz@unimap.edu.my H/P: Dr. Muslim Bin Mustapa muslim@unimap.edu.my Universiti Malaysia Perlis 5 /5