Timer-1 can be run using the internal clock, fosc/12 (timer mode) or from any external source via pin T1 (P3.5) (Counter mode).

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1 EC 6504 MICROPROCESSOR AND MICROCONTROLLER Electronics and Communication Engineering Fifth Semester UNIT-V Part A 1. List the modes of Timer in [N/D16] The timers available in 8051 are Timer 0 (T0) 16 bit timer / counter Timer 1 (T1) 16 bit timer / counter These two timers can be configured either as timers or event counters. They can be split into two byte register namely TL0, TH0, TL1, and TH1. The modes of timer in 8051 are chosen with the help of two bits,viz., M0 & M1 in TMOD register. M1 M0 Mode Description of Timer bit timer bit timer bit timer with auto reload Split timer 2. State how baud rate is calculated for serial date transfer in mode 1. [N/D16] Mode-1 baud rate generation: Timer-1 is used to generate baud rate for mode-1 serial communication by using overflow flag of the timer to determine the baud frequency. Timer-1 is used in timer mode-2 as an auto-reload 8-bit timer. The data rate is generated by timer-1 using the following formula. Where, SMOD is the 7th bit of PCON register f osc is the crystal oscillator frequency of the microcontroller It can be noted that f osc / (12 X [256- (TH1)]) is the timer overflow frequency in timer mode-2, which is the auto-reload mode. If timer-1 is not run in mode-2, then the baud rate is, Timer-1 can be run using the internal clock, fosc/12 (timer mode) or from any external source via pin T1 (P3.5) (Counter mode).

2 3. Compare polling and interrupt. [M/J16] BASIS FOR COMPARISON INTERRUPT POLLING Basic Mechanism Servicing Indication Device notifies CPU that it needs CPU attention. An interrupt is a hardware mechanism. Interrupt handler services the Device. Interrupt-request line indicates that device needs servicing. CPU constantly checks device status whether it needs CPU's attention. Polling is a Protocol. CPU services the device. Command-ready bit indicates the device needs servicing. CPU Occurrence Efficiency Example CPU is disturbed only when a device needs servicing, which saves CPU cycles. An interrupt can occur at any time. Interrupt becomes inefficient when devices keep on interrupting the CPU repeatedly. Let the bell ring then open the door to check who has come. CPU has to wait and check whether a device needs servicing which wastes lots of CPU cycles. CPU polls the devices at regular interval. Polling becomes inefficient when CPU rarely finds a device ready for service. Constantly keep on opening the door to check whether anybody has come. 4. Define baud rate of [M/J-16] It is the speed of serial data transfer, expressed in bits/sec. The standard baud rates are110, 150, 300, 600, 1200, 2400, 4800, 9600, Explain the operating mode2 of 8051 serial ports. In this mode 11 bits are transmitted(through TXD)or received (through RXD):a start bit(0), 8 data bits(lsb first),a programmable 9th data bit,& a stop bit(1).on transmit the 9th data bit (TB* in SCON)can be assigned the value of 0 or 1.Or for eg:, the parity bit(p, in the PSW)could be moved into TB8.On receive the 9th data bit go in to the RB8 in Special Function Register

3 SCON, while the stop bit is ignored. The baud rate is programmable to either 1/32 or 1/64 the oscillator frequency. 6. Explain the operating mode0 of 8051 serial ports. [M/J-15] In this mode serial enters &exits through RXD, TXD outputs the shift clock.8 bits are transmitted/received: 8 data bits(lsb first).the baud rate is fixed at 1/12 the oscillator frequency. 7. What are the tasks involved in keyboard interfacing? The task involved in keyboard interfacing are sensing a keyboard interfacing are sensing a key actuation, de bouncing the key and generating key codes(decoding the key).these task are performed software if the keyboard is interfaced through ports and they are performed by hardware if the keyboard is interfaced through How a keyboard matrix is formed in keyboard interface? The return lines RL0 to RL7 of 8279 are used to form the columns of keyboard matrix. In decoded scan the scan lines SLO to SL3 of 8279 are used to form the rows of keyboard matrix. In encoded scan mode, the output lines of external decoder are used as rows of keyboard matrix. 9. What is scanning in keyboard and what is scan time? The process of sending a zero to each row of a keyboard matrix and reading the columns for key actuation is called scanning. the scan time is the time taken by the processor to scan all the rows one by one starting from first row and coming back to the first row. 10. What is scanning in display and what is the scan time? [N/D - 15] In display devices the process of sending display codes to 7-segment LED S to display the led s one by one is called scanning. The scan time is the time taken to display all the 7- segment LED S one by one, starting from first LED and coming back to the first LED again.

4 Part B 1. Describe the different modes of operation of timers/counters in 8051 microcontroller. [16] [N/D - 16] Timers / Counters 8051 has two 16-bit programmable UP timers/counters. They can be configured to operate either as timers or as event counters. The names of the two counters are T0 and T1 respectively. The timer content is available in four 8-bit special function registers, viz, TL0,TH0,TL1 and TH1 respectively. In the "timer" function mode, the counter is incremented in every machine cycle. Thus, one can think of it as counting machine cycles. Hence the clock rate is 1/12 th of the oscillator frequency. In the "counter" function mode, the register is incremented in response to a 1 to 0 transition at its corresponding external input pin (T0 or T1). It requires 2 machine cycles to detect a high to low transition. Hence maximum count rate is 1/24 th of oscillator frequency. The operation of the timers/counters is controlled by two special function registers, TMOD and TCON respectively. Timer Mode control (TMOD) Special Function Register: TMOD register is not bit addressable. TMOD Address: 89 H Various bits of TMOD are described as follows - Gate: This is an OR Gate enabled bit which controls the effect of on START/STOP of Timer. It is set to one ('1') by the program to enable the interrupt to start/stop the timer. If TR1/0 in TCON is set and signal on pin is high then the timer starts counting using either internal clock (timer mode) or external pulses (counter mode). It is used for the selection of Counter/Timer mode. Mode Select Bits:

M1 and M0 are mode select bits. Timer/ Counter control logic: Fig 8.1 Timer/Counter Control Logic Timer control (TCON) Special function register: TCON is bit addressable. The address of TCON is 88H.

It is cleared when processor vectors to execute ISR located at address 001BH. TR1 : Timer1 run control bit. Set to 1 to start the timer / counter. TF0 : Timer0 overflow flag.

5 M1 and M0 are mode select bits. Timer/ Counter control logic: Fig 8.1 Timer/Counter Control Logic Timer control (TCON) Special function register: TCON is bit addressable. The address of TCON is 88H. It is partly related to Timer and partly to interrupt. The various bits of TCON are as follows. Fig 8.2 TCON Register TF1 : Timer1 overflow flag. It is set when timer rolls from all 1s to 0s. It is cleared when processor vectors to execute ISR located at address 001BH. TR1 : Timer1 run control bit. Set to 1 to start the timer / counter. TF0 : Timer0 overflow flag. (Similar to TF1) TR0 : Timer0 run control bit. IE1 : Interrupt1 edge flag. Set by hardware when an external interrupt edge is detected. It is cleared when interrupt is processed. IE0 : Interrupt0 edge flag. (Similar to IE1) IT1 : Interrupt1 type control bit. Set/ cleared by software to specify falling edge / low level

6 triggered external interrupt. IT0 : Interrupt0 type control bit. (Similar to IT1) As mentioned earlier, Timers can operate in four different modes. They are as follows Timer Mode-0: In this mode, the timer is used as a 13-bit UP counter as follows. Fig. 8.3 Operation of Timer on Mode-0 The lower 5 bits of TLX and 8 bits of THX are used for the 13 bit count.upper 3 bits of TLX are ignored. When the counter rolls over from all 0's to all 1's, TFX flag is set and an interrupt is generated. The input pulse is obtained from the previous stage. If TR1/0 bit is 1 and Gate bit is 0, the counter continues counting up. If TR1/0 bit is 1 and Gate bit is 1, then the operation of the counter is controlled by input. This mode is useful to measure the width of a given pulse fed to input. Timer Mode-1: This mode is similar to mode-0 except for the fact that the Timer operates in 16-bit mode. Fig 8.4 Operation of Timer in Mode 1 Timer Mode-2: (Auto-Reload Mode) This is a 8 bit counter/timer operation. Counting is performed in TLX while THX stores a constant value. In this mode when the timer overflows i.e. TLX becomes FFH, it is fed with the value stored in THX. For example if we load THX with 50H then the timer in mode 2 will count from 50H to FFH. After that 50H is again reloaded. This mode is useful in applications like fixed time sampling. Timer Mode-3: Fig 8.5 Operation of Timer in Mode 2

7 Timer 1 in mode-3 simply holds its count. The effect is same as setting TR1=0. Timer0 in mode-3 establishes TL0 and TH0 as two separate counters. Fig Operation of Timer in Mode 3 Control bits TR1 and TF1 are used by Timer-0 (higher 8 bits) (TH0) in Mode-3 while TR0 and TF0 are available to Timer-0 lower 8 bits(tl0). 2. Draw a diagram to interface a stepper motor with 8051 microcontroller, also writes an 8051 ALP to run the stepper motor in both forward and Reverse with a delay direction. [16] [N/D16]. PS-TRAINER-8051 trainer kit is proposed to smooth the progress of learning and developing designs of MCU from Intel and NXP. It has the facility to connect PC s 101/104 Keyboard, to enter user programs in Assembly languages. Serial communication achieved using It also supports C & assembly language in standalone kit (P89V51RD2). It s designed as to facilitate On-board Programmer for NXP 8051 MCU through ISP on serial port. STEPPER MOTOR A stepper motor is a brushless, synchronous electric motor that converts digital pulses into mechanical shaft rotation. Every revolution of the stepper motor is divided into a discrete number of steps, and the motor must be sent a separate pulse for each step. INTERFACING STEPPER MOTOR Fig. shows how to interface the Stepper Motor to microcontroller. As you can see the stepper motor is connected with Microcontroller output port pins through a ULN2803A array. So when the microcontroller is giving pulses with particular frequency to ls293a, the motor is rotated in clockwise or anticlockwise.

8 Fig. Interfacing Stepper Motor to Microcontroller We now want to control a stepper motor in 8051 trainer kit. It works by turning ON & OFF a four I/O port lines generating at a particular frequency. The 8051 trainer kit has three numbers of I/O port connectors, connected with I/O Port lines (P1.0 P1.7),(p3.0 p3.7) to rotate the stepper motor. Ls293d is used as a driver for port I/O lines, drivers output connected to stepper motor, connector provided for external power supply if needed. ASSEMBLY PROGRAM TO RUN THE STEPPER MOTOR USING 8051

9 NOTE: To turn the motor in the reverse direction enter as (Rl A instead of RR A). The schematics sections given is, stepper motor connected to port 1 and the sample program is given based on 8255.

3. Explain 8051 serial port programming with examples. [16] [N/D16] Serial Interface The serial port of 8051 is full duplex, i.e., it can transmit and receive simultaneously.

The other is, read-only and holds the received data from external sources via RXD. Both mutually exclusive registers have the same address 099H.

10 3. Explain 8051 serial port programming with examples. [16] [N/D16] Serial Interface The serial port of 8051 is full duplex, i.e., it can transmit and receive simultaneously. The register SBUF is used to hold the data. The special function register SBUF is physically two registers. One is, write-only and is used to hold data to be transmitted out of the 8051 via TXD. The other is, read-only and holds the received data from external sources via RXD. Both mutually exclusive registers have the same address 099H. Serial Port Control Register (SCON) Register SCON controls serial data communication. Address: 098H (Bit addressable) Mode select bits SM2: multi processor communication bit REN: Receive enable bit TB8: Transmitted bit 8 (Normally we have 0-7 bits transmitted/received) RB8: Received bit 8 TI: Transmit interrupt flag RI: Receive interrupt flag Power Mode control Register Register PCON controls processor powerdown, sleep modes and serial data bandrate. Only one bit of PCON is used with respect to serial communication. The seventh bit (b7)(smod) is used to generate the baud rate of serial communication. Address: 87H SMOD: Serial baud rate modify bit GF1: General purpose user flag bit 1 GF0: General purpose user flag bit 0 PD: Power down bit IDL: Idle mode bit Data Transmission Transmission of serial data begins at any time when data is written to SBUF. Pin P3.1 (Alternate function bit TXD) is used to transmit data to the serial data network. TI is set to 1 when data has been transmitted. This signifies that SBUF is empty so that another byte can be sent.

Data Reception Reception of serial data begins if the receive enable bit is set to 1 for all modes. Pin P3.0 (Alternate function bit RXD) is used to receive data from the serial data network.

Serial Data Transmission Modes: Mode-0: In this mode, the serial port works like a shift register and the data transmission works synchronously with a clock frequency of f osc /12.

11 Data Reception Reception of serial data begins if the receive enable bit is set to 1 for all modes. Pin P3.0 (Alternate function bit RXD) is used to receive data from the serial data network. Receive interrupt flag, RI, is set after the data has been received in all modes. The data gets stored in SBUF register from where it can be read. Serial Data Transmission Modes: Mode-0: In this mode, the serial port works like a shift register and the data transmission works synchronously with a clock frequency of f osc /12. Serial data is received and transmitted through RXD. 8 bits are transmitted/ received aty a time. Pin TXD outputs the shift clock pulses of frequency f osc /12, which is connected to the external circuitry for synchronization. The shift frequency or baud rate is always 1/12 of the oscillator frequency. Fig Data transmission/reception in Mode-0 Mode-1 (standard UART mode) : In mode-1, the serial port functions as a standard Universal Asynchronous Receiver Transmitter (UART) mode. 10 bits are transmitted through TXD or received through RXD. The 10 bits consist of one start bit (which is usually '0'), 8 data bits (LSB is sent first/received first), and a stop bit (which is usually '1'). Once received, the stop bit goes into RB8 in the special function register SCON. The baud rate is variable. The following figure shows the way the bits are transmitted/ received. Fig 11.2 Data transmission format in UART mode Bit time= 1/f baud In receiving mode, data bits are shifted into the receiver at the programmed baud rate. The data word (8-bits) will be loaded to SBUF if the following conditions are true. 1. RI must be zero. (i.e., the previously received byte has been cleared from SBUF) 2. Mode bit SM2 = 0 or stop bit = 1.

12 After the data is received and the data byte has been loaded into SBUF, RI becomes one. Mode-1 baud rate generation: Timer-1 is used to generate baud rate for mode-1 serial communication by using overflow flag of the timer to determine the baud frequency. Timer-1 is used in timer mode-2 as an auto-reload 8-bit timer. The data rate is generated by timer-1 using the following formula. Where, SMOD is the 7 th bit of PCON register f osc is the crystal oscillator frequency of the microcontroller It can be noted that f osc / (12 X [256- (TH1)]) is the timer overflow frequency in timer mode-2, which is the auto-reload mode. If timer-1 is not run in mode-2, then the baud rate is, Timer-1 can be run using the internal clock, fosc/12 (timer mode) or from any external source via pin T1 (P3.5) (Counter mode). Example: If standard baud rate is desired, then MHz crystal could be selected. To get a standard 9600 baud rate, the setting of TH1 is calculated as follows. Assuming SMOD to be '0' Or, Or, In mode-1, if SM2 is set to 1, no receive interrupt (RI) is generated unless a valid stop bit is received. Serial Data Mode-2 - Multiprocessor Mode : In this mode 11 bits are transmitted through TXD or received through RXD. The various bits are as follows: a start bit (usually '0'), 8 data bits (LSB first), a programmable 9 th (TB8 or RB8)bit and a stop bit (usually '1'). While transmitting, the 9 th data bit (TB8 in SCON) can be assigned the value '0' or '1'. For example, if the information of parity is to be transmitted, the parity bit (P) in PSW could be moved into TB8. On reception of the data, the 9 th bit goes into RB8 in 'SCON', while the stop bit is ignored. The baud rate is programmable to either 1/32 or 1/64 of the oscillator frequency. f baud = (2 SMOD /64) fosc. Mode-3 - Multi processor mode with variable baud rate : In this mode 11 bits are transmitted through TXD or received through RXD. The various bits are: a start bit (usually '0'), 8 data bits (LSB first), a programmable 9 th bit and a stop bit

13 (usually '1'). Mode-3 is same as mode-2, except the fact that the baud rate in mode-3 is variable (i.e., just as in mode-1). f baud = (2 SMOD /32) * ( fosc / 12 (256-TH1)). This baudrate holds when Timer-1 is programmed in Mode-2. Operation in Multiprocessor mode : 8051 operates in multiprocessor mode for serial communication Mode-2 and Mode-3. In multiprocessor mode, a Master processor can communicate with more than one slave processors. The connection diagram of processors communicating in Multiprocessor mode is given in fig The Master communicates with one slave at a time. 11 bits are transmitted by the Master, viz, One start bit (usually '0'), 8 data bits (LSB first), TB8 and a stop bit (usually '1'). TB8 is '1' for an address byte and '0' for a data byte. If the Master wants to communicate with certain slave, it first sends the address of the slave with TB8=1. This address is received by all the slaves. Slaves initially have their SM2 bit set to '1'. All slaves check this address and the slave who is being addressed, responds by clearing its SM2 bit to '0' so that the data bytes can be received. It should be noted that in Mode 2&3, receive interrupt flag RI is set if REN=1, RI=0 and the following condition is true. 1. SM2=1 and RB8=1 and a valid stop bit is received. Or 2. SM2=0 and a valid stop bit is received. Fig 8051 in Multiprocessor Communication

14 After the communication between the Master and a slave has been established, the data bytes are sent by the Master with TB8=0. Hence other slaves do not respond /get interrupted by this data as their SM2 is pulled high (1). Power saving modes of operation : 8051 has two power saving modes. They are - 1. Idle Mode 2. Power Down mode. The two power saving modes are entered by setting two bits IDL and PD in the special function register (PCON) respectively. The structure of PCON register is as follows. PCON: Address 87H The schematic diagram for 'Power down' mode and 'Idle' mode is given as follows: Idle Mode Fig Schematic diagram for Power Down and Idle mode implementation Idle mode is entered by setting IDL bit to 1 (i.e., =0). The clock signal is gated off to CPU, but not to the interrupt, timer and serial port functions. The CPU status is preserved entirely. SP, PC, PSW, Accumulator and other registers maintain their data during IDLE mode. The port pins hold their logical states they had at the time Idle was initiated. ALE and are held at logic high levels. Ways to exit Idle Mode: 1. Activation of any enabled interrupt will clear PCON.0 bit and hence the Idle Mode is exited. The program goes to the Interrupt Service Routine (ISR). After RETI is executed at the end of the ISR, the next instruction will start from the one following the instruction that enabled Idle Mode. 2. A hardware reset exits the idle mode. The CPU starts from the instruction following the

15 instruction that invoked the 'Idle' mode. Power Down Mode: The Power down Mode is entered by setting the PD bit to 1. The internal clock to the entire microcontroller is stopped (frozen). However, the program is not dead. The Power down Mode is exited (PCON.1 is cleared to 0) by Hardware Reset only. The CPU starts from the next instruction where the Power down Mode was invoked. Port values are not changed/ overwritten in power down mode. Vcc can be reduced to as low as 2V in PowerDown mode. However, Vcc has to be restored to normal value before PowerDown mode is exited. 4. Assembly language program for LCD interfacing with 8051 lcd_cmd equ 0800h ;Write COMMAND reg address 0800h lcd_st equ 0801h ;Read STATUS reg address 0801h lcd_wr equ 0802h ;Write DATA reg address 0802h lcd_rd equ 0803h ;Read DATA reg address 0803h ORG 08100h hello: mov P2, #(lcd_cmd SHR 8) ;load P2 with high address mov R0, #(lcd_cmd AND 255) ;load R0 with command reg addr mov R7, #03h ;set LCD position, line=1, char=3 mov dptr, #mesg1 ;point to mesg1 acall wr_string ;write mesg1 to LCD mov R7, #41h ;set LCD position, line= 2, char=1 mov dptr, #mesg2 ;point to mesg2 acall wr_string ;write mesg2 to LCD stop: ajmp stop wr_string: acall lcd_busy mov a, R7 orl a, #080h a nxt_char: acall lcd_busy clr a movc inc dptr jz str_end ;soft halt ;wait until LCD not busy ;get LCD position ;msb set for LCD RAM address ;write lcd_cmd to set line & char ;wait until LCD not busy ;point to next byte in string ;if 0 then end of string mov R1, #(lcd_wr AND 255) ;Load R1 with wr_data address a ;Write char to LCD sjmp nxt_char ;get next char in string

16 str_end: ret lcd_busy: mov R1, #(lcd_st AND 255) ;Load R1 with status address movx ;read LCD status jb acc.7, lcd_busy ;keep checking until busy bit clear ret mesg1: db "Hello ",0 mesg2: db "World ",0 END 5. Assembly language program sorting of array using 8051 Address Label Mnemonics 4100 MOV R0, #05H 4101 AGAIN MOV DPTR, #4600H 4105 MOV R1,#05H 4106 MOV R2, 02H 4109 MOVX 410B 410D 410E 410F MOV FO, A INC DPTR MOVX CJNE A,0F0,L AJMP SKIP 4101 L1 JC SKIP 4102 MOV 82H,R INC DPTR 4109 MOV A,0F0 410A 410E SKIP DJNZ R1, BACK 4110 DJNZ R0, AGAIN 4113 LCALL 00BB

17 6. Write a Assembly language program to rotate a motor in the clock wise direction. The motor has a step angle of using the 4 step sequence in 8051.

CoE3DJ4 Digital Systems Design. Chapter 5: Serial Port Operation

CoE3DJ4 Digital Systems Design Chapter 5: Serial Port Operation Serial port 8051 includes an on-chip serial port Hardware access to the port is through TXD and RXD (Port 3 bits 1 and 0) Serial port is