Table of Contents. Chapter Description Page. 1. PLC Fundamentals Ladder Logic
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1 Page v Table of Contents Chapter Description Page 1. PLC Fundamentals Ladder Logic Hardwired System PLC System Major Components Chassis Power Supply CPU Memory A- ROM B- RAM I/O Processor I/O A- Discrete I/O B- Analog I/O Programmer PC PLC System General Block Diagrams Processor Power Supply Chassis/Rack I/O System A- Local I/O B- Remote I/O General Design Considerations I/O Cards Typical AC Input Card Typical AC Output Card Logix Processors ControlLogix Processors Specifications Firmware/Software Matrix Diagnostic LEDs Key Switch RS232 (Serial) Port Battery Memory Expansion FlexLogix Processors Specifications Firmware/Software Matrix Diagnostic LEDs Key Switch Battery
2 Page vi RS232 (Serial) Port Communication Daughter Cards a- DeviceNet b- ControlNet c- Ethernet Local I/O Ports a- Local b- Local CompactLogix Processors Specifications Firmware/Software Matrix Diagnostic LEDs Key Switch RS232 (Serial) Port Battery Power Supplies Power Supply Models and Specifications Power Supply Jumper Standalone Power supplies PA PA72/B PA75A/A PB PB72/B PB75A/A Redundant Power Supplies PA75R/B PB75R/B PSCA CPR I/O Chassis A4/B A7/B A10/B A13/B A17/B Modules Mnemonic Code First Letter Second Letter Numeric Terminating Alpha Character Discrete Input and Output Modules...5 4
3 Page vii AC Output AC Input DC Output DC Input Contact Type (relay based) Output Analog Modules Analog Input RTD Input Thermocouple Input Analog Output Specialty I/O High Speed Counter Programmable Limit Switch Drive Modules Motion Control Redundancy/Hot Standby Module Communication Modules ControlNet Bridge DHRIO Bridge DeviceNet Bridge Ethernet Bridge MVI (Multi-Vendor Interface) Memory Data Types Predefined a- Atomic Data Types b- Defined Data Types Module Defined Data Type User Defined Data Types User Memory Processor Name a- Naming Convention Tag Names a- Base Tags b- I/O Base Tags c- Alias Tags d- Consumed Tags Tasks (Programs) a- Routines b- Programs (Program Groups) c- Tasks (Task Group) Free Memory Addressing Tag/Symbolic Addressing I/O Data Tags a- I/O Base Tags b- Alias I/O Tags User Defined Data Tags
4 Page viii a- Base b- Alias Indirect Addressing Indexed Addressing System Design and Operation Logix Operating modes Prescan Run Program Test Fault Scan Input Data Being Produced by Input Module a- RPI b- COS c- RTS Input Data Being Consumed by a Logix Processor Logix Processor Solving Logic a- Rung Solve b- Continuous Task c- Periodic Tasks d- System Overhead (Housekeeping) Output Data Produced by a Logix Processor a- RPI b- EOT Output Data Consumed by Output module Output module Producing an Echo of Consumed data Communications RS-232-D Specifications Protocols a- DF1-Point to Point b- DF1 Master c- DF1 Slave d- ASCII Ethernet ControlNet Data Highway Plus Network Topologies a- Daisy Chain b- Trunk-Line c- Terminating Resistors DH+ Channel Configuration a- Enhanced Processor DH+ Channel Configuration Options Concepts of DH+ Messaging Using the DH+ Network a- Global Data b- Peer to Peer Read and Writes DH+ Performance Data Highway DH
5 Page ix Features Specifications DeviceNet Ladder Logic Instruction Set Basic Logic Rules Rung Editing Off-Line On-Line, PLC in Program Mode On-Line, PLC in Remote Run Mode A- Accept B- Test C- Assemble Contacts, Coils, and Branches Examine On (XIC) Normally Open Examine Off (XIO) Normally Closed Output Energize (OTE) Coil Branching Output Latch & Unlatch One Shots A- One Shot (ONS) B- One Shot Rising (OSR) C- One Shot Falling (OSF) Always False (AFI) Reset Coil (RES) Timers Timer On Delay, (TON) Timer Off Delay (TOF) Retentive Timer On Delay (RTO) Counters Count Up Counter (CTU) Count Down Counter (CTD) Comparison Instructions Equal (EQU) Not Equal (NEQ) Greater Than (GRT) Greater Than or Equal (GEQ) Less Than (LES) Less Than or Equal (LEQ) Limit Test (LIM) Compare (CMP) Computational Instructions Add (ADD) Subtract (SUB) Multiply (MUL) Divide (DIV) Move (MOV)
6 Page x Compute (CPT) Square Root (SQR) Negate (NEG) Clear (CLR) Exponential (XPY) Logarithm (LOG) Natural Logarithm (LN) Sine (SIN) Cosine (COS) Tangent (TAN) Arc Sine (ASN) Arc Cosine (ACS) Arc Tangent (ATN) Data Conversion Instructions Binary to BCD (TOD) BCD to Binary (FRD) Radians to Degrees (DEG) Degrees to Radians (RAD) File Logic and Manipulation Instructions Modes Of File Operations A- All Mode B- Numeric Mode C- Incremental Mode File Arithmetic And Logic (FAL) File Search And Compare (FSC) Fill File(FLL) Copy File(COP) First In-First Out (FFL & FFU) Last In-First Out (LFL & LFU) Average (AVE) Standard Deviation (STD) Sort (SRT) Sequencer Instructions (SQL, SQI, SQO) A- Sequencer Load (SQL) B- Sequencer Input (SQI) C- Sequencer Output (SQO) System Value and Message Instructions Get System Value (GSV) Set System Value (SSV) Message (MSG) Bit Logic and Manipulation Instructions Bitwise And (AND) Masked Move (MVM) Masked Equal (MEQ) Bitwise Inclusive OR (OR) Bitwise Exclusive Or (XOR) Not (NOT) Bit Shift Left (BSL) Bit Shift Right (BSR)
7 Page xi Bit Distribute (BTD) Diagnostic Instructions File Bit Comparison FBC Diagnostic Detect DDT Data Transitional DTR Program Control Instructions Jump And Label (JMP & LBL) For Loops - FOR, NXT, BRK A- For (FOR) B- Break (BRK) C- Next (NXT) Jump To Subroutine Functions - JSR, SBR, RET A- Jump to Subroutine (JSR) B- Subroutine (SBR) C- Return (RET) Master Control Reset - MCR Process Control Instructions PID A- Logix PID Functions B- The PID Equation C- Computers Don't Do Calculus D- PID Options & Features ASCII Instructions
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Table of Contents. Chapter Description Page. 1. PLC Fundamentals Ladder Logic
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