10-1 C D Pearson Education, Inc. M. Morris Mano & Charles R. Kime LOGIC AND COMPUTER DESIGN FUNDAMENTALS, 4e
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1 10-1 C D E A B
2 10-2 A B A B C (A B) C D A A B (A B) C E D (A B) C D E (A B) C + D E (A B) C
3 10-3 Opcode Mode Address or operand
4 10-4 Memory 250 Opcode Mode PC = ADRS 252 Next instruction ACC Opcode: Mode: ADRS: Operation: Load ACC Direct address 500 ACC Program 800 Data
5 10-5 Memory 300 Opcode Mode PC = ADRS 302 Next instruction ACC Program Opcode: Mode: ADRS: Operation: Branch if ACC 0 Direct address 500 PC 500 if ACC 0 PC 302 if ACC Instruction Program
6 10-6 Memory PC = Opcode Mode ADRS or NBR = 500 R1 = Next instruction ACC Opcode: Load to ACC
7 T 10-1 TABLE 10-1 Symbolic Convention for Addressing Modes Refers to Figure 10-6 Addressing Mode Symbolic Convention Register Transfer Effective Address Contents of ACC Direct Immediate Indirect Relative Index LDA ADRS LDA #NBR LDA [ADRS] LDA $ADRS LDA ADRS (R1) Register LDA R1 ACC R1 400 Register-indirect LDA (R1) ACC M[ ADRS] ACC NBR ACC M[ M[ ADRS] ] ACC M[ ADRS PC] ACC M[ ADRS R1] ACC M[ R1]
8 T 10-2 TABLE 10-2 Typical Data Transfer Instructions Name Load Store Move Exchange Push Pop Input Output Mnemonic LD ST MOVE XCH PUSH POP IN OUT
9 10-7 Memory Address SP 101 R1 C B A
10 T 10-3 TABLE 10-3 Typical Arithmetic Instructions Name Increment Decrement Add Subtract Multiply Divide Add with carry Subtract with borrow Subtract reverse Negate Mnemonic INC DEC ADD SUB MUL DIV ADDC SUBB SUBR NEG
11 T 10-4 TABLE 10-4 Typical Logical and Bit-Manipulation Instructions Name Clear Set Complement AND OR Exclusive-OR Clear carry Set carry Complement carry Mnemonic CLR SET NOT AND OR XOR CLRC SETC COMC
12 T 10-5 TABLE 10-5 Typical Shift Instructions Name Mnemonic Diagram Logical shift right SHR 0 C Logical shift left SHL C 0 Arithmetic shift right SHRA C Arithmetic shift left SHLA C 0 Rotate right ROR C Rotate left ROL C Rotate right with carry RORC C Rotate left with carry ROLC C
13 s e f
14 T 10-6 TABLE 10-6 Evaluating Biased Exponents Exponent E in decimal Biased exponent e E 127 Decimal Binary
15 T 10-7 TABLE 10-7 Typical Program Control Instructions Name Branch Jump Call procedure Return from procedure Compare (by subtraction) Test (by ANDing) Mnemonic BR JMP CALL RET CMP TEST
16 T 10-8 TABLE 10-8 Conditional Branch Instructions Relating to Status Bits in the PSR Branch Condition Mnemonic Test Condition Branch if zero BZ Z 1 Branch if not zero BNZ Z 0 Branch if carry BC C 1 Branch if no carry BNC C 0 Branch if minus BN N 1 Branch if plus BNN N 0 Branch if overflow BV V 1 Branch if no overflow BNV V 0
17 T 10-9 TABLE 10-9 Conditional Branch Instructions for Unsigned Numbers Branch Condition Mnemonic Condition Status Bits* Branch if above BA A B C Z 0 Branch if above or equal BAE A B C 0 Branch if below BB A B C 1 Branch if below or equal BBE A B C Z 1 Branch if equal BE A B Z 1 Branch if not equal BNE A B Z 0 *Note that C here is a borrow bit.
18 T TABLE Conditional Branch Instructions for Signed Numbers Branch condition Mnemonic Condition Status Bits Branch if greater BG A B ( N V) Z 0 Branch if greater or equal BGE A B N V 0 Branch if less BL A B N V 1 Branch if less or equal BLE A B ( N V) + Z 1 Branch if equal BE A B Z 1 Branch if not equal BNE A B Z 0
19 10-9 External interrupts Central processing unit (CPU) 1 2 End of execution of instruction 3 4 EI INTACK Enable-interrupt flip-flop Interrupt acknowledge Interrupt vector address IVAD PC To memory stack
TABLE 9-1. Symbolic Convention for Addressing Modes. Register indirect LDA (R1) ACC M[ R1] Refers to Figure 9-4. Addressing mode. Symbolic convention
T-236 Symbolic Convention for Addressing Modes TABLE 9-1 Symbolic Convention for Addressing Modes Refers to Figure 9-4 Addressing mode Symbolic convention Register transfer Effective address Contents of
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