An Alternative History of the Electronics Manufacturing Industry

Transcription

1 An Alternative History of the Electronics Manufacturing Industry Joseph Fjelstad Verdant Electronics Seattle, WA

2 Inflection Points and Choices Dual Inline Package (DIP) versus Flat Pack Pin in hole versus SMT solution Peripheral leads versus area array solutions Dealing with the electronic parasitic challenge 80% rule versus Single pitch The importance of standards Central Processor versus Multi Computer Chip Powerful processing at very low power using Forth Sequential Design versus Concurrent Design Cacophony versus Symphony Pick and Place versus Assembly by Light Mass assembly paradigm shift Solder assembly versus solderless assembly The impact of simplicity

3 But before we dig in

4 When were the first wearable electronics produced? 1949 perhaps?

5 DIP versus Flat Pack Integrated circuits obviated the need for discrete modules such as those used by IBM

6 Ceramic Flip Chip Module Photo credit IBM

7 DIP versus Flat Pack Integrated circuits obviated the need for discrete modules such as those used by IBM Packaging style chosen would set a standard going forward Fairchild s Buck Rogers came up with the Dual Inline Package while Texas Instruments opted for a flat package with long leads

8 Pioneering IC Packaging

9 DIP versus Flat Pack Integrated circuits obviated the need for discrete modules such as those used by IBM Packaging style chosen would set a standard going forward Fairchild s Buck Rogers came up with the Dual Inline Package while Texas Instruments opted for a flat package with long leads 100 mil centers was chose for the pitch of the DIP leads and most designs were laid out based on the 100 mil grid TI had the surface mount idea right but it was not as amenable to automated assembly as pin in hole technology Holes are a waste of space and SMT allowed for smaller holes and smaller devices Legacy technologies have long lives

10 Peripheral Lead versus Area Array Peripheral leads were a logical fan out solution to start Performance levels and requirements were low

11 Package size Market Demand and Technical Issues Have Driven Packaging Development 1960 to 1980 DIP 1980 to 1990 QFP 1990 to Present and Beyond Faster Lighter Smaller Cheaper Higher I/O BGA CSP Pin count

12 Peripheral Lead versus Area Array Peripheral leads were a logical fan out solution to start Performance levels and requirements were low Packaging formats and JEDEC registered outlines exploded No real standards

13 IC Package Proliferation

14 Peripheral Lead versus Area Array Peripheral leads were a logical fan out solution to start Performance levels and requirements were low Packaging formats and JEDEC registered outlines exploded No real standards Area Array ushered in for microprocessor technology Pin Grid Array (PGA) devices could be plugged into sockets and allowed for easier upgrading There were business issues and tax advantages as well

15 Pin Grid Array

16 Peripheral Lead versus Area Array Peripheral leads were a logical fan out solution to start Performance levels and requirements were low Packaging formats and JEDEC registered outlines exploded No real standards Area Array ushered in for microprocessor technology Pin Grid Array (PGA) devices could be plugged into sockets and allowed for easier upgrading There were business issues and tax advantages as well Ball Grid Array (BGA) technology was less expensive and less inductive than the pin grid array Difficulty in inspecting slowed early adoption

17 The 80% Rule versus Single pitch The desire to have a predictable roadmap for IC packaging resulted in the adoption of the The 80% Rule Each new generation of IC packages, peripherally leaded or with area array terminations, were to have a lead pitch 80% of the previous generation so that designers of assemblies and supporting industries could plan for the future. For I/O terminations a 60% Rule was adopted Every new generation of BGA was to have solder ball terminations 60% the size of the previous generation.

18 80% Design Rule The Unintended Consequences

19 Single pitch versus The 80% Rule The desire to have a predictable roadmap for IC packaging resulted in the adoption of the The 80% Rule Each new generation of IC packages, peripherally leaded or with area array terminations, were to have a lead pitch 80% of the previous generation so that designers of assemblies and supporting industries could plan for the future. For I/O terminations a 60% Rule was adopted Every new generation of BGA was to have solder ball terminations 60% the size of the previous generation. With the predecessor Pin in Hole technology many, if not most, designers used 100 mil grid for board layout Pitch was predicated on the fact that the majority of pin in hole packages (e.g, DIPs) had terminations on 100 mill centers. IBM took the concept to heart through out its manufacturing Single pitch has many advantages and can be of future value

20 Multiple Pitch and Ball Variation

21 Single Lead Pitch Design Advantage

22 Use of a Single Base Grid Pitch Facilitates More Efficient Routing

23 The Logic of Legos

24 CPU versus Multi Computer Chip Early decisions have had a long lasting effect on system architecture Chuck Moore created Forth Programming Language, a simple, efficient, natural computer language in the 1960s-70s The language inspired the design of the first multicore chips and now the multiprocessor chips of Green Arrays

25 Green Arrays Multicomputer Chip Green Arrays Multicomputer chip is a paradigm shifting technology with 144 fully fledged computers on a single chip. Key Performance Metrics : Instruction times picoseconds Power consumption - 7 picojoules of energy per processor in operation Each computers uses less than 100 nanowatts when suspended Near zero wait state between operations Uses Forth a simple programing language allowing user to write their own software for maximum efficiency and utility Forth language and 144 independent computers enables parallel or pipelined programming on an unprecedented scale. Effectively addresses the looming elephant in the room energy problem of IoT.

26 Sequential versus Concurrent Design Historically product or system design has been a sequential process. Schematic to layout to package to board assembly to system There has long been a Throw it over the wall approach leaving those that follow in the chain to try and figure out the problems Previously all that mattered was that the design worked. Today concurrent design is increasingly important. A more holistic approach will assess upfront and try to integrate all elements of the product, IC with Package, Package with Board Design and Assembly with manufacturing efficacy, cost, electrical performance, testability, thermal management, mechanical performance, product safety and reliability and environmental/sustainability concerns taken into consideration and addressed to the extent possible. Design software developers are stepping up to the challenge

27 Component Placement Component assembly has evolved and improved significantly over the decades with automation Yet hand assembly remains as a present method to deal with special components and paradoxically hand soldering is still celebrated as a repair method when soldering technology fails Pick and Place machines are impressive demonstrations of electro-mechanical engineering capable of placing a wide array of different shaped and sized device at high rates

28 The technology has come a long way 1948

29 Component Placement Component assembly has evolved and improved significantly over the decades with automation Yet hand assembly remains as a present method to deal with special components and paradoxically hand soldering is still celebrated as a repair method when soldering technology fails Pick and Place machines are impressive demonstrations of electro-mechanical engineering capable of placing a wide array of different shaped and sized device at high rates Emphasis on ever smaller devices is challenging every aspect of electronic manufacturing technology.

30 Component Placement Component assembly has evolved and improved significantly over the decades with automation Yet hand assembly remains as a present method to deal with special components and paradoxically hand soldering is still celebrated as a repair method when soldering technology fails Pick and Place machines are impressive demonstrations of electro-mechanical engineering capable of placing a wide array of different shaped and sized device at high rates Emphasis on ever smaller devices is challenging every aspect of electronic manufacturing technology. Terecircuits placement technology looks very promising 400K UPH of devices as small as 100 microns square and 25 microns thick

31 Terecircuits - Assembly by light

32 Solder versus solderless After decades of use solder still presents many problems

33 Electronic Soldering Not so Simple Defective Solder Joint Source: Interphase Corporation

34 Solder Related Defects are Numerous Opens and Shorts Insufficient Solder Excessive Solder Solder Cracking. Tin Whiskers Poor Wetting/Dewetting Voids Blowholes Cold Solder Joints Brittle Solder Joints Tomb Stoning Component Cracking Head on Pillow Graping Popcorning Solder Balling Mis-registration Insufficient Cleaning Under Devices

35 Solder also a Prime Causes of PCB Defects Corner Cracking Barrel Cracking Post Separation Hole Wall Pull Away Resin Recession Delamination Pad Cratering Decomposition

36 Solder versus solderless After decades of use solder still presents many problems Solderless assembly reverses the manufacturing process eliminating many process steps Solder paste printing, inspection, reflow, cleaning, re-inspection, rework and repair

37 Solder versus solderless After decades of use solder still presents many problems Solderless assembly reverses the manufacturing process eliminating many process steps Solder paste printing, inspection, reflow, cleaning, re-inspection, rework and repair Elimination of solder and lower temperature processing open doors to many new materials and prospective structures integrating more design elements into the structure including thermal management, ESD and EMI protection and novel structures

38 Current Electronics Manufacturing Steps Design PCB Assembly Fabricate PCB (multilayer) Assemble PCB 1. Create schematic 2. Indentify components 3. Layout circuits 4. Validate signal integrity 5. Validate design DfM 6. Validate design DfR 7. Validate design DfE 1. Verify RoHS compliance 2. Cut core laminas to size & tool 3. Clean and coat with resist 4. Image and develop resist 5. Etch and strip resist 6. Treat exposed copper 7. AOI or visual inspect layers 8. Cut B-stage to size and tool 9. Lay up core and B-stage 10. Laminate 11. X-ray inspect (optional) 12. Drill (stack height varies) 13. Desmear or etchback 14. Sensitize holes 15. Plate electroless copper 16. Clean and coat with resist 17. Image an develop resist 18. Pattern plate copper 19. Pattern plate metal resist 20. Strip plating resist 21. Etch base copper 22. Clean and coat with soldermask 23. Image and develop 24. Treat exposed metal (options) 25. Solder, NiAu, Sn, Ag, OSP, etc. 26. Electrical test 27. Route to shape 28. Package 29. Ship 1. Procure components 2. Verify RoHS compliance 3. Verify component solderability 4. Verify component MSL number 5. Kit components 6. Procure PCBs 7. Verify RoHS compliance 8. Verify PCB solderability 9. Verify PCB High Temp capability 10. Design solder stencil & purchase 11. Develop suitable reflow profile 12. Track component exposure (MSL) 13. (Rebake components as required) 14. Position PCB & stencil solder paste 15. (monitor solder paste) 16. Inspect solder paste results 17. (height and skips) 18. Dispense glue dots (optional) 19. Place components 20. Inspect for missing parts 21. Reflow solder 22. Repeat Steps if two sided assy 23. (second set of fixtures required) 24. Perform hand assembly as required 25. (odd sized or temperature sensitive) 26. Clean flux from surface and under 27. Verify low standoff devices 28. Test cleanliness 29. Underfill critical components 30. X-ray inspect soldered assembly 31. Identify shorts, opens, voids, missing 32. Electrically test 33. Rework and repair as needed 34. Package 35. Ship

39 Manufacturing Steps without Solder Design PCB Assembly Fabricate PCB (multilayer) Assemble PCB 1. Create schematic 2. Indentify components 3. Layout circuits 4. Validate signal integrity 5. Validate design DfM 6. Validate design DfR 7. Validate design DfE 1. Verify RoHS compliance 2. Cut core laminas to size & tool 3. Clean and coat with resist 4. Image and develop resist 5. Etch and strip resist 6. Treat exposed copper 7. AOI or visual inspect layers 8. Cut B-stage to size and tool 9. Lay up core and B-stage 10. Laminate 11. X-ray inspect (optional) 12. Drill (stack height varies) 13. Desmear or etchback 14. Sensitize holes 15. Plate electroless copper 16. Clean and coat with resist 17. Image an develop resist 18. Pattern plate copper 19. Pattern plate metal resist 20. Strip plating resist 21. Etch base copper 22. Clean and coat with soldermask 23. Image and develop 24. Treat exposed metal (options) 25. Solder, NiAu, Sn, Ag, OSP, etc. 26. Electrical test 27. Route to shape 28. Package 29. Ship 1. Procure components 2. Verify RoHS compliance 3. Verify component solderability 4. Verify component MSL number 5. Kit components 6. Procure PCBs 7. Verify RoHS compliance 8. Verify PCB solderability 9. Verify PCB High Temp capability 10. Design solder stencil & purchase 11. Develop suitable reflow profile 12. Track component exposure (MSL) 13. (Rebake components as required) 14. Position PCB & stencil solder paste 15. (monitor solder paste) 16. Inspect solder paste results 17. (height and skips) 18. Dispense glue dots (optional) 19. Place components 20. Inspect for missing parts 21. Reflow solder 22. Repeat Steps if two sided assy 23. (second set of fixtures required) 24. Perform hand assembly as required 25. (odd sized or temperature sensitive) 26. Clean flux from surface and under 27. Verify low standoff devices 28. Test cleanliness 29. Underfill critical components 30. X-ray inspect soldered assembly 31. Identify shorts, opens, voids, missing 32. Electrically test 33. Rework and repair as needed 34. Package 35. Ship

40 Basic Process Steps Build up interconnection layers Coat will polymer Form component cavity Place components

41 Solder versus solderless After decades of use solder still presents many problems Solderless assembly reverses the manufacturing process eliminating many process steps Solder paste printing, inspection, reflow, cleaning, re-inspection, rework and repair Elimination of solder and lower temperature processing opens doors to many new materials and prospective structures integrating more design elements into the structure including thermal management, ESD and EMI protection and novel structures. Reduced size, reduced complexity, reduced cost reduced environmental impact

42 Solder versus solderless After decades of use solder still presents many problems Solderless assembly reverses the manufacturing process eliminating many process steps Solder paste printing, inspection, reflow, cleaning, re-inspection, rework and repair Elimination of solder and lower temperature processing opens doors to many new materials and prospective structures integrating more design elements into the structure including thermal management, ESD and EMI protection and novel structures. Reduced size, reduced complexity, reduced cost reduced environmental impact Redesign exercise illustrates potential

43 Redesign using Occam Concept From this 12 metal layers To this 6 layers Same design rules for lines, spaces and hole sizes ~70% smaller in total area Folded assembly footprint ~15% of original design with minimal increase in height. Using aluminum the total weight of the assembly is projected to be ~55-65% less than the original. Rigid flex design is separates of digital and analog circuity and thus the potential for better control of the energy created by analog devices and power supplies. Design and redesign by Darren Smith, Athena Tech USA

44 Aluminum Core Rigid Flex Assembly

45 So where might we go from here?...

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47 Disruption- Friend or Foe? Cost BPA Time

48 It ain t what you don t know that gets you into trouble. It s what you know for sure that just ain t so Mark Twain Make not your thoughts your prison William Shakespeare

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50 Thank you