ISAAC NEWTON GROUP - DETECTORS. General Arrangement TEMPERATURE COMMAND DETECTOR CONTROLLER DETECTOR SHUTTER FIBER INTERFACE DATA CONTROLLER INTERFACE

Transcription

1 TEMPERATURE COMMAND SHUTTER DETECTOR DETECTOR CONTROLLER DATA FIBER INTERFACE CONTROLLER INTERFACE TEMPERATURE COMMAND SHUTTER DETECTOR DETECTOR CONTROLLER DATA FIBER INTERFACE SCSI-2 FAST WIDE BUS SUN INSTRUMENT CONTROL DISK SYSTEM General Arrangement DAT TAPE

2 RGO FIBER INTERFACE TIM SERIAL - PARALLEL CONVERTER 10 M/SEC FIBER RX SMT 62.5 U FIBER FIBER RX 3 SLOT TIM MOTHER BOARD WITH POWER SUPPLY CONTROL DOUBLE BUFFER RS232 PORT DB-25 RS232 PORT COMM PORT CONTROL LOGIC INTR AD30 AD29 FRAME BUFFER COMM PORT COMM PORT COMM PORT COMM PORT JTAG PORT ADDRESS DECODE AND SELECT LOGIC GLOBAL BUS TMS320C44 DSP SCSI BUS CONTROLLER SCSI DRIVER / TERMINATORS SCSI-2 WIDE BUS MICRO DB-68 EXTENSION CABLE 64 MBYTES EDO MEMORY 512 KBYTES FLASH ROM 4 MBYTES EDRAM A24.. A30 ADDRESS LATCH 32KBYTE PEROM SMT 307B TIM RGO Fiber Interface Block Diagram

3 SDSU FIBER INTERFACE TIM 3 SITE TIM MOTHER BOARD WITH POWER SUPPLY FIBER RX SERIAL - PARALLEL CONVERTER 50 M/SEC FIBER RX SMT 62.5 U FIBER CONTROL DOUBLE BUFFER 4 M/SEC FIBER TX SMT 62.5 U FIBER COMM PORT CONTROL LOGIC FRAME BUFFER COMM PORT COMM PORT COMM PORT COMM PORT JTAG PORT ADDRESS DECODE AND SELECT LOGIC GLOBAL BUS TMS320C44 DSP SCSI BUS CONTROLLER SCSI DRIVER / TERMINATORS SCSI-2 WIDE BUS MICRO DB-68 EXTENSION CABLE 64 MBYTES EDO MEMORY 512 KBYTES FLASH ROM 4 MBYTES EDRAM A24.. A30 ADDRESS LATCH 32KBYTE PEROM SMT 307B TIM SDSU Fiber Interface Block Diagram

4 J12 INTERUPT LOGIC J6 14 PIN HEADER J13 COMM PORT 0 COMM PORT 3 COMM PORT 3 COMM PORT 0 P4 IIOF1,2 /2 /3 IIOF0-2 SCSI PORT /68 J4 68 PIN MICRO D 4M 50M FIBER TX FIBER RX CLKIN JTAG /1 /5 CLKIN JTAG J5 68 PIN MICRO D SDSU FIBER INTERFACE TDO TDI L2 TDI TDO RESET /1 RESET TIM SITE 2 UDP 3-6 PWR&GND J11 /59 /4 PWR&GND J33 GLOBAL MEM /80 MEMORY CONTROL LOGIC UDP 3-6 COMM PORT 0 COMM PORT 3 J23 COMM PORT 4 COMM PORT 1 /32 J7 72 PIN SIMM CONNECTOR 4M 50M FIBER TX FIBER RX SDSU FIBER INTERFACE IIOF1,2 CLKIN JTAG TDO TDI /2 /1 L1 SMT307 TIM J8 72 PIN SIMM CONNECTOR J9 72 PIN SIMM CONNECTOR J10 72 PIN SIMM CONNECTOR RESET /1 TIM SITE 1 PWR&GND /59 TIM SITE 3 RESET LOGIC CRYSTAL OSCILLATOR POWER SUPPLY 3.5 amps 0.5 amp 0.5 amp J1 4 PIN PWR HEADER Logical Scheme

5 300 J1 J21 J22 J23 J TIM SITE 1 TIM SITE 2 TIM SITE J11 J12 J all dimensions in thou's of an inch Mother Board Mechanical Layout

6 write file (scsi ID + lun) command structure SERVICE COMMANDS SCIENCE COMMANDS MAINTENANCE COMMANDS DIAGNOSTIC COMMANDS DOWNLOAD SEQUENCE CODE CHECK SEQUENCE CODE VALIDITY ENABLE DIAGNOSTIC READOUT DISABLE DIAGNOSTIC READOUT REBOOT CONTROLLER LOAD DIAGNOSTICS PING REPLY OPEN SHUTTER CLOSE SHUTTER PREFLASH ON PREFLASH OFF INTEGRATION PAUSE INTEGRATION ADJUST INTEGRATION TIME ABORT INTEGRATION READ N LINES CLEAR ONCE MOVE CHARGE UP N LINES MOVE CHARGE DOWN N LINES ENABLE CONTINOUS CLEAR DISABLE CONTINOUS CLEAR READ IMAGE DATA READ STATUS READ DETECTOR PARAMETERS READ INTEGRATION PARAMETERS READ ENGINEERING PARAMETERS configuration structure DETECTOR PARAMETERS INTEGRATION PARAMETERS ENGINEERING PARAMETERS DETECTOR TEMPERATURE N2 ALARM THRESHOLD TEMP CONTROLLER MODE SHUTTER TYPE SYNCRONIZE MODE TELEMETRY VOLTAGES ENABLE / DISABLE TELEMETRY VOLTAGES ENABLE / DISABLE ALTERNATE TELEMETRY ENABLE / DISABLE ANTIBLOOMING CLOCKS INTEGRATION TIME INTEGRATION TYPE WINDOW DEFINITION X-Y BINNING FACTOR READOUT SPEED READOUT GAIN ENABLE / DISABLE SHUTTER ENABLE / DISABLE PREFLASH ENABLE / DISABLE CLEAR BEFORE INTEGRATE X-Y DIMENSIONS QUADRANT MODE DETECTOR SERIAL NUMBER ENGINEERING PARAMETERS read engineering values INTEGRATION PARAMETERS read integration parameters read file (scsi id, lun) DETECTOR PARAMETERS read detector parameters IMAGE DATA read image memory STATUS compile status snapshot Software Command Set and Hierarchy

7 Power on Hard / Soft Reset SCSI Setup Find Memory, Find Interface Set Configuration controller absent Test communication to controller Set Error status Idle scsi interupt File operation Accept SCSI Command Mode operation control operation Software Logical Structure

8 time SDSU DATA PROTOCOL 16 IMAGE DATA S MSD FIRST 16 IMAGE DATA S MSD FIRST 50 Mbit / sec Scrambled NRZ SDSU MESSAGE PROTOCOL 8 HEADER 24 COMMAND DATA S MSD FIRST 4 Mbit / sec Scrambled NRZ SDSU MESSAGE PROTOCOL 8 HEADER 24 MESSAGE DATA S MSD FIRST 50 Mbit / sec Scrambled NRZ RGO DATA PROTOCOL 8 HEADER 16 IMAGE DATA S MSD FIRST 8 HEADER 16 IMAGE DATA S MSD FIRST Manchester encoded 10 Mbit / sec 8 CHAR LSB FIRST RGO COMMAND PROTOCOL 8 CHAR LSB FIRST... 8 CHAR LSB FIRST RS baud Multi character / variable length 8 CHAR LSB FIRST RGO MESSAGE PROTOCOL 8 CHAR LSB FIRST... 8 CHAR LSB FIRST RS baud Multi character / variable length Software Fiber Protocols

9 20 ns 50 MHZ CLKIN H3 H1 STAT 8 *STRB 9 GLOBAL ADDRESS 9 *RDY R/W GLOBAL DATA Memory Control Timing Diagram *MRAS *MCAS 0 10 MADD ROW ADDR COL ADDR MR/W MDATA DATA VALID

10 RAS30 - RAS33 BANK SELECT RAS20 - RAS23 RAS10 - RAS13 A20 - A23 STAT3 RAS00 - RAS03 A00 - A23 ADDR MUX MA00 - MA11 GLOBAL BUSS CONNECTOR (P3) STAT0 - STAT3 STRB0 - STRB1 LONGRAS SHORTRAS CAS D00 - D31 SIZE0 SIZE1 RAS CAS REFRESH STATUSEN STAT0 - STAT7 R/W Sys Status RAM0 RAM1 RAM2 RAM3 R/W0 - R/W1 CAS0 - CAS3 PAGE0 - PAGE1 TIMING LOGIC PD1 - PD4 RDY0 - RDY1 CE0 - CE1 AE SW0 - SW3 SWITCH BANK stat8 - stat31 NOTES: 1. ALL RAM MODULES MUST BE THE SAME SIZE AND SPEED. DE 2. MAX RAM CAPACITY = 128MBYTES USING 4 X 32MBYTE (8MB X 32) SIMMS. A24 LOCK 3. ACCOMODATES EDO NON PARITY 2MX32, 4MX32, 8MX32 5 VOLT SIMMS. 4. LOCK SIGNAL IS USED BY SOFTWARE REFRESH ACCESS 5. A24 ENABLES MEMORY BANK WHEN 8MX32 SIMMS USED Memory Control Logic Block Diagram

11 SIZE MBYTE ADDRESS SPACE FFFFF FFFFF FFFFF FFFFF 32MBit SIMM J7 16MBit SIMM J7 J8 8MBit SIMM J7 J8 J9 J FFFFF 8A BFFFFF 8C DFFFFF 8E FFFFFF J8 J9 J FFFFF FFFFF FFFFF J FFFFF FFFFF A BFFFFF 9C DFFFFF J E FFFFFF A11 - A22 LONGRAS GLOBAL ADDRESS BUS A10 - A21 MAD00 - MAD11 SHORTRAS Scheme 1. High Speed A00 - A11 CAS 3 x SN74ABT16244 Buss Drivers SCHEME packages 2. Tpd = 6ns. 3. Power = 670 mw SCHEME packages + 2 resistor packs 2. Tpd = 20ns. 3. Power = 250 mw A11 - A22 LONGRAS GLOBAL ADDRESS BUS A10 - A21 MAD00 - MAD11 SHORTRAS A00 - A11 CAS SN74ABT16244 Buffer Scheme 2. Low Power SN74CBT16214 Buss Switch Memory Control Logic Address Mux

12 RAS00 Memory Control Logic Address Decode