44 1 Vol.44 No Journal of University of Electronic Science and Technology of China Jan. 2015

Transcription

1 44 1 Vol.44 No Journal of University of Electronic Science and Technology of China Jan GRT 1 1, ,3 ( ; ; ) GRT GRT802.11a/g/ WiFi TP B doi: /j.issn GRT: a High-Performance Customizable HW/SW Open Platform for Underlying Wireless Networks WU Hao-yang 1, WANG Tao 1,3, CHEN Jia-hua 1, GONG Jian 1, LI Xiao-guang 1, ZHANG Gao-han 1, and LÜ Song-wu 2,3 (1. School of Electronics Engineering and Computer Science, Peking University Haidian Beijing ; 2. Computer Science Department, University of California, Los Angeles Los Angeles CA USA 90095; 3. PKU-UCLA Joint Research Institute in Science and Engineering Haidian Beijing ) Abstract With the rapid development of wireless technology, wireless developers and users for special needs require a high-performance, customizable hardware/software(hw/sw) open platform for underlying wireless networks. This paper describes the design and implement of our proposed GRT platform, which can provide the features of high-performance, highly customizability, compatibility, and openness. As an example, we have implemented a set of SW/HW codes following a/g protocol. The system based on these codes exceeds the maximum data rate of the physical layer specified in the protocol, and can communicate with commodity WiFi devices. Key words customizable; high-performance; open platform; wireless WiFi ABI Research2014WiFi WiFi180 [1] WiFi1999WiFi ac WiFi 6.9 Gbps (PHY MAC ) ( ) (1991 ).

2 (PHY MAC) GRT 31) 2) GRT 3) GRT GRT (SDN) (SDR) [2] IEEE WiFi ac b a/g n20 WiFi2 Mbps Gbps ( ) 1.3 PHY MAC MACCSMA/CA PHY WiFi CPU CPU FFT CPU () GNU Radio [3] GNU Radio CPU GNU Radio 2 Mbps a/g (802.11a/g 54 Mbps)GNU Radio Sora [4] Windows Sora CPU ACK FPGASora a/g 54 Mbps 2*2MIMO117Mbps [5] Sora Sora Windows WiFi MACSora Sora Windows FPGA FPGA

3 1 : GRT 125 FPGA WARP [6] FPGA WARP PC FPGA WARP WARP FPGA DSP GPUDSP ASIC GPU GPU GPU GPU 1.4 GRT GRT GRT GRTHEART 2014 [7] ICFPT 2014 [8] GRT a/g GRT GRT 3 GRT ) 100 Mbps CPU 2) 3) GRT 2.2 GRT GRT GRT1 PCFPGA USRP 3 USRP () FPGA PCIe ( ) PC 1 GRT PC GRT PC TCP/IP MAC TCP/IP PC PHYMAC PCGRT GRT FPGA GRT PHYMAC FPGAFPGA PCIe

4 GRTPCIe FPGA Gbps [9] USRP USRP USRP GRT USRP USRP FPGA USRP PC FPGA USRPPC GRT GRT USRP FPGA 1) GRT FPGA PHY FIFO PHY GRT 2) USRP FPGA1 GRT USRP FPGA USRP FPGA FPGA PCPCUSRP FPGA USRPFPGA USRPPC a/gACK 16 us(sifs) ACK us GRT 1) GRT PCIe 2 PHY 3 FECGRT GRT FEC PCIe FEC FEC 2 FPGAGRTC/C++ (C-to-RTL AutoESLVivado HLS [10] ) 2) FPGAPHY GRT PHY GRT GRT Linux TCP/IP GRT WiFi GRT (SDN)

5 1 : GRT GRT3 PC FPGAUSRP PCLinux FPGA Xilinx ML605 USRP USRP N210 [11] XCVR GRT FPGA PCIe USRP FPGA PC 3.2 GRT a/g GRT a/g GRT a/g PHYPHY PHY PHY 125 Mbps(802.11a/g 54 Mbps) 1 PHY /MHz /Mbps /% CRC IFFT PHY /MHz /Mbps /% FFT Viterbi CRC a/g GRT a/g MACDCF() WiFi 10( GHz) 64-QAM 3/ byte GRT MHz 15 s 4 /Mbps /s M GRT 3 3 /MHz /Mbps /Mbps USRP N MHz 12.5 MHz GRTWiFi a/g20 MHz GRTAP AP SSID GRT_APWiFi SSIDGRT_AP

6 GRT_AP GRT_AP IP5 GRT_AP GRT a/g WiFi GRT n GRT 3.3 MIMO 5 GRT_AP GRT 2*2 MIMO GRT MIMO 6 6 GRT MIMO 7 MIMO4 (H11 H21 H12 H22) H *2 MIMO H11 H21 H12 H22 GRT [1] ABI Research. Wi-Fi Chipset Shipments will near 18 Billion Chipsets during the Next Five Years[EB/OL]. [ ]. abiresearch.com/press wi-fi-chipset-shipmentswill-near-18-billion-chips. [2] MITOLA J I. Software radios-survey, critical evaluation and future directions[c]//aroa and Lron Ym Magazn. [S.l.]: IEEE, [3] GNU Radio. GNU Radio[EB/OL]. [ ]. gnuradio.org. [4] TAN Kun, LIU He, ZHANG Jian-song, et al. Sora: Highperformance software radio using general-purpose multicore processors[j]. Communications of the ACM, 2011, 54(1): [5] FANG Ji, TAN Zhen-hui, TAN Kun. Soft MIMO: a software radio implementation of n based on Sora platform[c]//wireless, Mobile and Multimedia Networks, 4th IET International Conference. Beijing: IET, [6] Mango Communications. Warp v3 Kit[EB/OL]. [ ]. [7] WANG Tao, SUN Guang-yu, CHEN Jia-hua, et al. GRT: A reconfigurable SDR platform with high performance and usability to be published in ACM SIGARCH computer architecture news[j]. ACM SIGARCH Computer Architecture News, 2014, 42(4): [8] CHEN Jia-hua, WANG Tao, WU Hao-yang, et al. A high-performance and high-programmability reconfigurable wireless development platform(demo paper)[c]// International Conference on Field-Programmable Technology(ICFPT). Shanghai: IEEE, [9] GONG Jian, WANG Tao, CHEN Jia-hua, et al. An efficient and flexible host-fpga PCIe communication library[c]// Field Programmable Logic and Applications (FPL). [S.l.]: IEEE, 2014: 1-6. [10] XILINX. Xilinx High-Level Synthesis (HLS)[EB/OL]. [ ]. com/tools/autoesl_ instructions.htm. [11] Ettus Research. USRP N210[EB/OL]. [ ].