Hardware Accelerated SDR Platform for Adaptive Air Interfaces Tarik Kazaz, Christophe Van Praet, Merima Kulin, Pieter Willemen, Ingrid Moerman

Transcription

1 Hardware Accelerated SDR Platform for Adaptive Air Interfaces Tarik Kazaz, Christophe Van Praet, Merima Kulin, Pieter Willemen, Ingrid Moerman 27/01/2016 1

2 Overview Common SDR approach Propposed approach The future of computing Hardware accelerated SDR Example Use case

3 Introduction APP APP APP Controller Controller Control Plane Control Protocols Data Plane

4 Common SDR approach Intensive signal processing is done in host PC Real time processing is hard to achieve Significant power and space consumption (no portability) USRP (N Series)? Host PC FPGA is seriously underutilized!

5 Common SDR approach Transmitter Coding & Interleaving QAM mapping Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

6 Common SDR approach Coding & Interleaving QAM mapping Baseband processing Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

7 Common SDR approach Coding & Interleaving QAM mapping Baseband processing Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

8 Common SDR approach Coding & Interleaving QAM mapping Baseband processing Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

9 Common SDR approach Coding & Interleaving QAM mapping Baseband processing Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

10 Common SDR approach Coding & Interleaving Baseband processing QAM mapping Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

11 Common SDR approach Coding & Interleaving Baseband processing QAM mapping Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

12 Common SDR approach Coding & Interleaving Baseband processing QAM mapping Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF?

13 Proposed approach Txside Coding & Interleaving QAM mapping Pilot Insertion & S/P IFFT P/S & add CP Pulse shaping DAC & RF

14 Proposed approach Rx side RF Rx ADC Timing and Freq Sync CP removal de coding deinterleaving QAM de mapping Equalizer P/S FFT S/P

15 Current Pure Software Computing approach Sources: Marr et al., Scaling Energy Per Operation via an Asynchronous Pipeline ; Koomey et al., Implications of Historical Trends in the Electrical Efficiency of Computing

16 Future computing Hybrid Software & Hardware approach Source: Qualcomm website ( )

17 Future computing Hybrid Software & Hardware approach (1) Source: Intel website ( )

18 Hardware accelerated SDR platform on top of Hybrid FPGA

19 Hardware accelerated SDR platform on top of Hybrid FPGA (1)

20 Hardware accelerated SDR platform on top of Hybrid FPGA (2) SW components GnuRadio with HW acceleration capabilities RFNoC Reconfiguration Capabilities SW HW interface shared memory separate control and data plane interfaces Xilinx Zynq Dual Core ARM Cortex A9 GNU Radio FPGA Accelerated Block Linux Kernel Device Driver RFNoC Router FPGA Accelerator FPGA Fabric

21 Hardware accelerated SDR platform on top of Hybrid FPGA (3) Real time re configurability Partial reconfiguration via PCAP Function A B1 Function B C1 Function C Configuration Port Full Bit File Configuration Port or ICAP Partial Bit Files

22 Hardware accelerated SDR platform on top of Hybrid FPGA (4)

23 Hardware accelerated SDR platform on top of Hybrid FPGA (5) This concept enables Offload of SW Radio blocks to FPGA Frees up processor to perform other tasks

24 Hardware accelerated SDR platform on top of Hybrid FPGA (6) This concept enables Offload of SW Radio blocks to FPGA Frees processor to perform other tasks Whole SDR system should fit on one board

25 Example Scenario Different applications different wireless standards BLE device device g device ac device Our platform should support various existing and future emerging wireless technologies at same time IoT HUB xyz device ah IoT-HUB Download SDR packages from cloud Air Interface as a Service Internet Repository of SDR library and HW ACC

26 Questions? 27/01/