A Software Development and Validation Framework for SDR Platforms
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1 A Software Development and Validation Framework for SDR Platforms
2 Outline IMEC SDR Platform Problem Statement Framework (XMSF) Implementation XMSS server Graphical logger IMEC SDR TCP/IP connection Framework (XMSF) Simulation Results a PHY MAC Platform Exploration Conclusion
3 IMEC SDR Platform: Functional View Reconfigurable Analog Front End Digital Baseband Platform = BEAR Reconfigurable Analog Front End DFE BBE OMD FE I/F Synchro AGC Encoding (De)Interl. (De)Mapping (I)FFT CRC FEC Scrambling 174MHz 6GHz a/b/g/j/n UMTS-TDD/FDD HSDPA 3GPP-LTE DAB/DMB/DVB-H
4 IMEC SDR Platform: BEAR Chip ITCM DTCM ARM MAC S/W PHY HAL RTE RAM DMA1 DMA2 IRC Timer AMBA FECE ASIC Forward Error Correction, (de)scrambling CRC FECE ASIC Forward Error Correction, (de)scrambling CRC BBE1 ADRES Processor Compiled C-code (De)Modulation Encoding BBE2 ADRES Processor Compiled C-code (De)Modulation Encoding DFE ASIP synchronization AGC Analog FE I/F Host I/F
5 Problem Statement: Intention Simulation of native PHY/MAC software code on a specific SDR platform (IMEC SDR) Visualize the impact on the hardware components (DMA, timer, BBE, DFE, OMD ) Existing solution (see next): TLM
6 Problem Statement: TLM ITCM DTCM TLM model of IMEC SDR ARM RAM DMA1 DMA2 IRC Timer AMBA MAC PHY FECE FECE BBE1 BBE2 DFE Host I/F Byte accurate Bus simulations Sw/Hw cosimulations Full Hw validation Runs native code No channel No multiple terminals No TCP/IP No full MAC/PHY s/w validation possible 2 minutes simulation / packet
7 Problem Statement: Requirements Development/ Simulation/ Validation platform for system code (SDR PHY/MAC control software) Multiple terminals connected together Simulate native compiled PHY/MAC code Fast enough for network simulations XMSF (cross layer XL- MAC Simulation Framework)
8 XMSF: XMSS XL MAC Simulation Server (XMSS) Time space model XMSS: Server process that accepts connections from clients Add Events to a global timeline Callback when event elapses Ether bandwidth model Log reflector Perfect Air Interface Model Add complex channel models through dll libraries Centralized logging point Graphical analyzer using logs Client 1 Client 2 Client n
9 XMSF: Implementation of PHY/MAC Simulation of the PHY/MAC using the XMSF Simulation of the PHY/MAC using the XMSF Simulation of the native PHY/MAC code using the XMSF High level Xl MAC (Time Critical Functions) High level Xl MAC (Time Critical Functions) DCF MAC (Time Critical Functions) Low level Xl MAC (PHY Control S/W) Low level Xl MAC (PHY Control S/W) a Software PHY BBE Abstraction BBE DFE Abstraction DFE DMA Abstraction DMA Timer Abstraction Timer OMD Abstraction OMD layer Abstraction BBE layer Abstraction DFE layer Abstraction DMA layer Abstraction Timer layer Abstraction OMD layer Abstraction layer Abstraction layer Abstraction layer Abstraction layer Abstraction layer layer layer layer layer HAL HAL HAL XMSF Interface (API) XMSF Interface (API) XMSF Interface (API) Time space model Ether bandwidth model Log reflector XL MAC Simulation Server (XMSS)
10 XMSF: Integration with TCP/IP Host 1 Host 2 Host 3 Applications Kernel H/W Bridge Appl 1 XMSS Appl 2 Term Bridge Term TCP/IP TCP/IP TCP/IP x.x.2.2 x.x.1.2 x.x.1.1 x.x.2.1 x.x.1.3 TAP ETH ETH TAP ETH
11
12 XMSF Simulation Results
13 XMSF Simulation Results: Energy Profiling Power Consumption (mw)
14 XMSF Simulation Results: Platform Exploration DCF MAC transmit/receive COARSE FUNCTION MODEL preamble/dat a processing synchronize timing (at end) TASK GRAPH BASED TIMING SIMULATION redundant model of environment timing SIMULATION SERVER API
15 XMSF: Other Features Coupling between CoWare ConvergenSC tools (SystemC/VHDL co-simulator), the XMSS server and graphical analyzer. Synchronize the XMSS server with the Spooks streaming video server
16 Future Work GUI for channel model n (MIMO) PHY 3GPP-LTE PHY/MAC Handover Scheduler for multiple streams on SDR
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