EMC2. Prototyping and Benchmarking of PikeOS-based and XTRATUM-based systems on LEON4x4

Size: px
Start display at page:

Download "EMC2. Prototyping and Benchmarking of PikeOS-based and XTRATUM-based systems on LEON4x4"

Transcription

1 EMC2 Prototyping and Benchmarking of PikeOS-based and XTRATUM-based systems on LEON4x4

2 Introduction Multi-core architectures will be adopted in the next generations of avionics and aerospace systems. Integrated Modular Avionics (IMA): mixed-criticality Key requirement: spatial and temporal isolation Virtualization appears to be a promising technique to implement robust software architectures in multi-core avionics platforms. Goal: exploiting virtualization in the prototyping of a multi-core test platform for the aerospace domain. This is a first attempt to exploit paravirtualization on Cobham-Gaisler LEON4, the European Space Agency Next Generation Microprocessor (NGMP).

3 Reference Application Test Software (Test input, analysis and benchmarking) TEST CONSOLE JTAG SERIAL ETHERNET Application Stack: (Telemetry, file transfers) TARGET MULTICORE PROCESSING PLATFORM SPACEWIRE SPACEWIRE REFERENCE SOFTWARE DEMO PLATFORM PERIPHERAL DEVICE 1 PERIPHERAL DEVICE 2 Scenario: various levels of criticality and dependability both at software and hardware level Requirements: reliability, robustness. Overall objectives: Implementation and analysis of a typical mixed-critical aerospace application over a next-gen multicore platform Assessment and analysis of virtualization technologies (isolation) Comparison of different hypervisors (robustness, self-healing)

4 Platform & Tools The target hardware identified is a quad-core architecture based on the Gaisler SPARC-V8 LEON4 processor (ESA s Next Generation MicroProcessor). Two different hypervisors, SYSGO PikeOS and FentISS XtratuM, have been considered for the implementation of the reference application on selected multicore platform. PikeOS is a platform providing RTOS, type I hypervisor and paravirtualization functionalities. XtratuM is an open-source, bare metal hypervisor targeting realtime systems and implementing the paravirtualization principle.

5 Leon4 Platform The LEON4-NGMP-DRAFT device is a system-on-chip featuring a quad core fault-tolerant LEON4 SPARC V8 processor having 4x4 KiB instruction and 4x4 KiB data caches Double precision IEEE-754 floating point units and I/O memory management units Multi-processor interrupt controller with support for ASMP and SMP 256 KiB Level-2 cache SpaceWire router with eight SpaceWire links 2x 10/100/1000 Mbit Ethernet interfaces MIL-STD-1553B interface 2x UART, SPI, Timers and watchdog, 16 pin GPIO Advanced on-chip debug support

6 Software Architecture The prototype software architecture includes various components running on top of the hypervisor: Applications TCTM, File Transfer Cyclic Transaction Manager Packet formatting I/O Manager Low level management of data transactions Device Drivers UART, SpaceWire, Ethernet

7 Time and Space Partitioning Defined software objects have been mapped to separate partitions. The allocation of partitions to different s has been then analyzed, specifically considering functional and timing requirements. 3 2 BACKGROUND TP 1 TP 2 TP 1 TP 2 TP 1 t REAL TIME APP 1 REAL TIME APP 2 REAL TIME APP 1 BACKGROUND REAL TIME APP 2 REAL TIME APP 1 TP 1 TP 2 TP 1 TP 2 TP 1 t 1 I/O MANAGER TP 0 t 0 DEVICE DRIVERS Specific focus has been put in the design of the I/O manager component: Mapping of different types of transactions (Cyclic and Sporadic TCTM transactions, File transfers) on different traffic classes Definition of scheduling rules for an efficient traffic management TP 0 t

8 PikeOS KERNEL MODE USER MODE ARCHITECTURE SUPPORT PACKAGE PIKEOS SYSTEM SOFTWARE PIKEOS SEPARATION MICROKERNEL PLATFORM SUPPORT PACKAGE

9 KERNEL MODE USER MODE XtratuM USER S SUPERVISOR S vcpu0 vcpu0 vcpu1 vcpu0 HYPERCALL INTERFACE XTRATUM MULTICORE PROCESSOR cpu0 cpu1 cpu2 cpu3

10 Partitions and mapping DEVICE DRIVER I/O MANAGER HARD REAL-TIME SOFT REAL-TIME HYPERVISOR

11 PikeOS-based application Real time components Implemented by means of PikeOS native tasks + accurate time management Non-real time components Implemented by means of PikeOS native tasks MailBoxes User level, custom implementation based on circular buffers over Shared Memory I/O MANAGER HARD REAL-TIME SOFT REAL-TIME Device Drivers Kernel Level implementation for the following devices Spacewire UART Ethernet DRIVERS 0 SHARED MEMORY HYPERVISOR 1 2 3

12 XtratuM-based application Device Drivers User Level implementation for the following devices Spacewire UART Ethernet Real time components Implemented using a custom runtime providing user level taskscheduling and intertask communication Non-real time components Implemented using a custom runtime providing user level task-scheduling I/O MANAGER DEVICE DRIVERS HARD REAL-TIME SOFT REAL-TIME MailBoxes Implemented using XtratuM native interpartition communication mechanisms 0 HYPERVISOR 1 2 3

System Impact of Distributed Multicore Systems December 5th 2012

System Impact of Distributed Multicore Systems December 5th 2012 System Impact of Distributed Multicore Systems December 5th 2012 Software Systems Division & Data Systems Division Final Presentation Days Mathieu Patte (Astrium Satellites) Alfons Crespo (UPV) Outline

More information

COMPARISON BETWEEN GR740, LEON4-N2X AND NGMP

COMPARISON BETWEEN GR740, LEON4-N2X AND NGMP Doc..: Date: 2017-08-22 Page: 1 of 11 COMPARISON BETWEEN GR740, LEON4-N2X AND NGMP Doc..: Date: 2017-08-22 Page: 2 of 11 TABLE OF CONTENTS 1 INTRODUCTION... 3 1.1 Scope of the Document... 3 1.2 Reference

More information

XtratuM hypervisor redesign for LEON4 multicore processor

XtratuM hypervisor redesign for LEON4 multicore processor XtratuM hypervisor redesign for LEON4 multicore processor E. Carrascosa, M. Masmano, P. Balbastre and A. Crespo Instituto de Informática Industrial, Universidad Politécnica de Valencia, Camino de Vera

More information

Rad-Hard Microcontroller For Space Applications

Rad-Hard Microcontroller For Space Applications The most important thing we build is trust ADVANCED ELECTRONIC SOLUTIONS AVIATION SERVICES COMMUNICATIONS AND CONNECTIVITY MISSION SYSTEMS Rad-Hard Microcontroller For Space Applications Fredrik Johansson

More information

Next Generation Multi-Purpose Microprocessor

Next Generation Multi-Purpose Microprocessor Next Generation Multi-Purpose Microprocessor Presentation at MPSA, 4 th of November 2009 www.aeroflex.com/gaisler OUTLINE NGMP key requirements Development schedule Architectural Overview LEON4FT features

More information

GR740 Technical Note on Benchmarking and Validation

GR740 Technical Note on Benchmarking and Validation GR740 Technical Note on Benchmarking and Validation Technical Note 2018-08-20 Doc. No Issue 3.0 Date: 2018-08-20 Page: 2 of 15 CHANGE RECORD Issue Date Section / Page Description 2.0 2016-12-28 All 2.1

More information

DEVELOPING RTEMS SMP FOR LEON3/LEON4 MULTI-PROCESSOR DEVICES. Flight Software Workshop /12/2013

DEVELOPING RTEMS SMP FOR LEON3/LEON4 MULTI-PROCESSOR DEVICES. Flight Software Workshop /12/2013 DEVELOPING RTEMS SMP FOR LEON3/LEON4 MULTI-PROCESSOR DEVICES Flight Software Workshop 2013 12/12/2013 Daniel Hellström Presentation does not contain U.S. Export controlled information (aka ITAR) 12/08/13

More information

GR712RC A MULTI-PROCESSOR DEVICE WITH SPACEWIRE INTERFACES

GR712RC A MULTI-PROCESSOR DEVICE WITH SPACEWIRE INTERFACES GR712RC A MULTI-PROCESSOR DEVICE WITH SPACEWIRE INTERFACES Session: SpaceWire Components Short Paper Sandi Habinc, Jiri Gaisler Aeroflex Gaisler, Kungsgatan 12, SE-411 19 Göteborg, Sweden sandi@gaisler.com

More information

GR740 Technical Note on Benchmarking and Validation

GR740 Technical Note on Benchmarking and Validation GR740 Technical Note on Benchmarking and Validation Technical Note 2019-01-29 Doc. No Issue 3.3 Date: 2019-01-29 Page: 2 of 16 CHANGE RECORD Issue Date Section / Page Description 2.0 2016-12-28 All 2.1

More information

ESA Contract 18533/04/NL/JD

ESA Contract 18533/04/NL/JD Date: 2006-05-15 Page: 1 EUROPEAN SPACE AGENCY CONTRACT REPORT The work described in this report was done under ESA contract. Responsibility for the contents resides in the author or organisation that

More information

Title: Configuration and Scheduling tools for TSP systems based on XtratuM.

Title: Configuration and Scheduling tools for TSP systems based on XtratuM. Title: Configuration and Scheduling tools for TSP systems based on XtratuM. Authors: I. Ripoll, M. Masmano, V. Brocal, S. Peiró, P. Balbastre, A. Crespo Affiliation: Instituto de Informática Industrial,

More information

EagleEye TSP Porting to HWIL Configuration (RTB)

EagleEye TSP Porting to HWIL Configuration (RTB) EagleEye TSP Porting to HWIL Configuration (RTB) Final project presentation 12.12.2017 Presenter: Dharma Teja Srungavruksham Overview_ Background Team Goals Execution Results Future Background_ EagleEye

More information

Processor and Peripheral IP Cores for Microcontrollers in Embedded Space Applications

Processor and Peripheral IP Cores for Microcontrollers in Embedded Space Applications Processor and Peripheral IP Cores for Microcontrollers in Embedded Space Applications Presentation at ADCSS 2010 MESA November 4 th, 2010 www.aeroflex.com/gaisler Presentation outline Microcontroller requirements

More information

LEON4: Fourth Generation of the LEON Processor

LEON4: Fourth Generation of the LEON Processor LEON4: Fourth Generation of the LEON Processor Magnus Själander, Sandi Habinc, and Jiri Gaisler Aeroflex Gaisler, Kungsgatan 12, SE-411 19 Göteborg, Sweden Tel +46 31 775 8650, Email: {magnus, sandi, jiri}@gaisler.com

More information

Next Generation Microprocessor Functional Prototype SpaceWire Router Validation Results

Next Generation Microprocessor Functional Prototype SpaceWire Router Validation Results Next Generation Microprocessor Functional Prototype SpaceWire Router Validation Results Jonas Ekergarn, Jan Andersson, Andreas Larsson, Daniel Hellström, Magnus Hjorth Aeroflex Gaisler AB Roland Weigand

More information

GR740 Processor development

GR740 Processor development The most important thing we build is trust ADVANCED ELECTRONIC SOLUTIONS AVIATION SERVICES COMMUNICATIONS AND CONNECTIVITY MISSION SYSTEMS GR740 Processor development Magnus Hjorth, Cobham Gaisler AB Space

More information

Challenges of FSW Schedulability on Multicore Processors

Challenges of FSW Schedulability on Multicore Processors Challenges of FSW Schedulability on Multicore Processors Flight Software Workshop 27-29 October 2015 Marek Prochazka European Space Agency MULTICORES: WHAT DOES FLIGHT SOFTWARE ENGINEER NEED? Space-qualified

More information

Introduction to LEON3, GRLIB

Introduction to LEON3, GRLIB Introduction to LEON3, GRLIB Adi Katav akatav@kaltech.co.il 6201129 4(0) 972+ Ext 101 Introduction to LEON3, GRLIB Few words about KAL: KAL provides professional ASIC consultancy for Digital/Analog ASIC

More information

Multi-DSP/Micro-Processor Architecture (MDPA)

Multi-DSP/Micro-Processor Architecture (MDPA) Multi-DSP/Micro-Processor Architecture (MDPA) Microelectronics Presentation Days 2010 30 March 2010, ESA/ESTEC, Noordwijk T. Helfers; E. Lembke; P. Rastetter; O. Ried Astrium GmbH Content Motivation MDPA

More information

Design of Next Generation CPU Card for State of the Art Satellite Control Application

Design of Next Generation CPU Card for State of the Art Satellite Control Application Design of Next Generation CPU Card for State of the Art Satellite Control Application Deepa. R [M.Tech], Microelectronics & Control Systems Dayananda Sagar College of Engineering Bangalore, 560078 Rajashekar.

More information

Migrating from the UT699 to the UT699E

Migrating from the UT699 to the UT699E Standard Products Application Note Migrating from the UT699 to the UT699E January 2015 www.aeroflex.com/leon Table 1.1 Cross Reference of Applicable Products Product Name: Manufacturer Part Number SMD

More information

Virtualization for Embedded Systems

Virtualization for Embedded Systems Is an open source solution right for you? 6/26/2013 Julia Keffer Page i Table of Contents Table of Contents Introduction... 1 What is Virtualization?... 1 Virtualization Applications... 2 Operating Systems

More information

ESA IPs & SoCs developments

ESA IPs & SoCs developments ESA IPs & SoCs developments Picture courtesy of: Lightwave esearch Laboratory Columbia University NY 1 ESA IP cores portfolio Processor Leon2 FT Fault tolerant Sparc V8 architecture Data handling Interfaces

More information

XtratuM Hypervisor for LEON4 Volume 2: XtratuM User Manual

XtratuM Hypervisor for LEON4 Volume 2: XtratuM User Manual XtratuM Hypervisor for LEON4 Volume 2: XtratuM User Manual Miguel Masmano, Alfons Crespo, Javier Coronel November, 2012 Reference: xm-4-usermanual-047d This page is intentionally left blank. iii/134 DOCUMENT

More information

Virtualización. Apolinar González Alfons Crespo

Virtualización. Apolinar González Alfons Crespo Virtualización Apolinar González Alfons Crespo OUTLINE Introduction Virtualisation techniques Hypervisors and real-time TSP Roles and functions Scheduling issues Case study: XtratuM 2 Conceptos previos

More information

Technical Note on NGMP Verification. Next Generation Multipurpose Microprocessor. Contract: 22279/09/NL/JK

Technical Note on NGMP Verification. Next Generation Multipurpose Microprocessor. Contract: 22279/09/NL/JK NGP-EVAL-0013 Date: 2010-12-20 Page: 1 of 7 Technical Note on NGP Verification Next Generation ultipurpose icroprocessor Contract: 22279/09/NL/JK Aeroflex Gaisler AB EA contract: 22279/09/NL/JK Deliverable:

More information

Abstract. Testing Parameters. Introduction. Hardware Platform. Native System

Abstract. Testing Parameters. Introduction. Hardware Platform. Native System Abstract In this paper, we address the latency issue in RT- XEN virtual machines that are available in Xen 4.5. Despite the advantages of applying virtualization to systems, the default credit scheduler

More information

QorIQ P4080 Software Development Kit

QorIQ P4080 Software Development Kit July 2009 QorIQ P4080 Software Development Kit Kelly Johnson Applications Engineering service names are the property of their respective owners. Freescale Semiconductor, Inc. 2009. QorIQ P4080 Software

More information

Executive Summary Next Generation Microprocessor (NGMP) Engineering Models Product code: GR740

Executive Summary Next Generation Microprocessor (NGMP) Engineering Models Product code: GR740 Executive Summary Next Generation Microprocessor (NGMP) Engineering Models Product code: GR740 Report 06-- Doc. No GR740-EXEC-005 Issue. Contract 00039/5/NL/LF Deliverable D5 GR740-EXEC-005 06-- of 4 TABLE

More information

Integrated Modular Avionics for Space

Integrated Modular Avionics for Space Integrated Modular Avionics for Space IMA4Space ADCSS 2012 J.Windsor ESTEC 23-10-2012 Agenda 1. Introduction 2. Architecture 3. Implementation Status of System Execution Platforms (SEPs) 4. Use Case: (Platform

More information

Virtualization, Xen and Denali

Virtualization, Xen and Denali Virtualization, Xen and Denali Susmit Shannigrahi November 9, 2011 Susmit Shannigrahi () Virtualization, Xen and Denali November 9, 2011 1 / 70 Introduction Virtualization is the technology to allow two

More information

Ensuring Schedulability of Spacecraft Flight Software

Ensuring Schedulability of Spacecraft Flight Software Ensuring Schedulability of Spacecraft Flight Software Flight Software Workshop 7-9 November 2012 Marek Prochazka & Jorge Lopez Trescastro European Space Agency OUTLINE Introduction Current approach to

More information

ARMv8 port of the Jailhouse hypervisor

ARMv8 port of the Jailhouse hypervisor Security Level: ARMv8 port of the Jailhouse hypervisor Antonios Motakis antonios.motakis@huawei.com Version: V1.0(20160321) Huawei Technologies Duesseldorf GmbH Acknowledgements Jan Kiszka, SIEMENS (Upstream

More information

Xen and the Art of Virtualization. CSE-291 (Cloud Computing) Fall 2016

Xen and the Art of Virtualization. CSE-291 (Cloud Computing) Fall 2016 Xen and the Art of Virtualization CSE-291 (Cloud Computing) Fall 2016 Why Virtualization? Share resources among many uses Allow heterogeneity in environments Allow differences in host and guest Provide

More information

The Challenges of X86 Hardware Virtualization. GCC- Virtualization: Rajeev Wankar 36

The Challenges of X86 Hardware Virtualization. GCC- Virtualization: Rajeev Wankar 36 The Challenges of X86 Hardware Virtualization GCC- Virtualization: Rajeev Wankar 36 The Challenges of X86 Hardware Virtualization X86 operating systems are designed to run directly on the bare-metal hardware,

More information

The Study of Register s Window Exception and Vulnerability Analysis Based on SPARC V8

The Study of Register s Window Exception and Vulnerability Analysis Based on SPARC V8 2016 2 nd International Conference on Mechanical, Electronic and Information Technology Engineering (ICMITE 2016) ISBN: 978-1-60595-340-3 The Study of Register s Window Exception and Vulnerability Analysis

More information

ADVANCED ELECTRONIC SOLUTIONS AVIATION SERVICES COMMUNICATIONS AND CONNECTIVITY MISSION SYSTEMS

ADVANCED ELECTRONIC SOLUTIONS AVIATION SERVICES COMMUNICATIONS AND CONNECTIVITY MISSION SYSTEMS The most important thing we build is trust ADVANCED ELECTRONIC SOLUTIONS AVIATION SERVICES COMMUNICATIONS AND CONNECTIVITY MISSION SYSTEMS UT840 LEON Quad Core First Silicon Results Cobham Semiconductor

More information

LEON3-Fault Tolerant Design Against Radiation Effects ASIC

LEON3-Fault Tolerant Design Against Radiation Effects ASIC LEON3-Fault Tolerant Design Against Radiation Effects ASIC Microelectronic Presentation Days 3 rd Edition 7 March 2007 Table of Contents Page 2 Project Overview Context Industrial Organization LEON3-FT

More information

The special radiation-hardened processors for new highly informative experiments in space

The special radiation-hardened processors for new highly informative experiments in space Journal of Physics: Conference Series PAPER OPEN ACCESS The special radiation-hardened processors for new highly informative experiments in space To cite this article: O V Serdin et al 2017 J. Phys.: Conf.

More information

Booting a LEON system over SpaceWire RMAP. Application note Doc. No GRLIB-AN-0002 Issue 2.1

Booting a LEON system over SpaceWire RMAP. Application note Doc. No GRLIB-AN-0002 Issue 2.1 Template: GQMS-TPLT-1-1-0 Booting a LEON system over SpaceWire RMAP Application note 2017-05-23 Doc. No Issue 2.1 Date: 2017-05-23 Page: 2 of 11 CHANGE RECORD Issue Date Section / Page Description 1.0

More information

IO Virtualisation in a Partitioned System

IO Virtualisation in a Partitioned System IO Virtualisation in a Partitioned System M. Masmano, S. Peiró, J. Sánchez, J. Simó, A. Crespo Instituto de Automatica e Informatica Industrial Universidad Politecnica de Valencia, Spain {mmasmano,speiro,jsanchez,jsimo,acrespo}@ai2.upv.es

More information

Security and Performance Benefits of Virtualization

Security and Performance Benefits of Virtualization Security and Performance Benefits of Virtualization Felix Baum mentor.com/embedded Android is a trademark of Google Inc. Use of this trademark is subject to Google Permissions. Linux is the registered

More information

Applying MILS to multicore avionics systems

Applying MILS to multicore avionics systems Applying MILS to multicore avionics systems Eur Ing Paul Parkinson FIET Principal Systems Architect, A&D EuroMILS Workshop, Prague, 19 th January 2016 2016 Wind River. All Rights Reserved. Agenda A Brief

More information

Software Driven Verification at SoC Level. Perspec System Verifier Overview

Software Driven Verification at SoC Level. Perspec System Verifier Overview Software Driven Verification at SoC Level Perspec System Verifier Overview June 2015 IP to SoC hardware/software integration and verification flows Cadence methodology and focus Applications (Basic to

More information

CCSDS Unsegmented Code Transfer Protocol (CUCTP)

CCSDS Unsegmented Code Transfer Protocol (CUCTP) CCSDS Unsegmented Code Transfer Protocol (CUCTP) Marko Isomäki, Sandi Habinc Aeroflex Gaisler AB Kungsgatan 12, SE-411 19 Göteborg, Sweden marko@gaisler.com www.aeroflex.com/gaisler Introduction Time synchronization

More information

V8uC: Sparc V8 micro-controller derived from LEON2-FT

V8uC: Sparc V8 micro-controller derived from LEON2-FT V8uC: Sparc V8 micro-controller derived from LEON2-FT ESA Workshop on Avionics Data, Control and Software Systems Noordwijk, 4 November 2010 Walter Errico SITAEL Aerospace phone: +39 0584 388398 e-mail:

More information

esi-risc Development Suite Getting Started Guide

esi-risc Development Suite Getting Started Guide 1 Contents 1 Contents 2 2 Overview 3 3 Starting the Integrated Development Environment 4 4 Hello World Tutorial 5 5 Next Steps 8 6 Support 10 Version 2.5 2 of 10 2011 EnSilica Ltd, All Rights Reserved

More information

Using a Hypervisor to Manage Multi-OS Systems Cory Bialowas, Product Manager

Using a Hypervisor to Manage Multi-OS Systems Cory Bialowas, Product Manager Using a Hypervisor to Manage Multi-OS Systems Cory Bialowas, Product Manager cory.bialowas@windriver.com Trends, Disruptions and Opportunity Wasn t life simple? Single-OS: SMP OS OS CPU Single Core Virtualization

More information

Network on Chip round table European Space Agency, ESTEC Noordwijk / The Netherlands 17 th and 18 th of September 2009

Network on Chip round table European Space Agency, ESTEC Noordwijk / The Netherlands 17 th and 18 th of September 2009 Network on Chip round table European Space Agency, ESTEC Noordwijk / The Netherlands 17 th and 18 th of September 2009 Ph. Armbruster Head of Data Systems Division European Space Agency - ESTEC 17 th of

More information

ATMEL SPACEWIRE PRODUCTS FAMILY

ATMEL SPACEWIRE PRODUCTS FAMILY ATMEL SPACEWIRE PRODUCTS FAMILY Session: Components Short Paper Nicolas RENAUD, Yohann BRICARD ATMEL Nantes La Chantrerie 44306 NANTES Cedex 3 E-mail: nicolas.renaud@atmel.com, yohann.bricard@atmel.com

More information

Using the MPU with an RTOS to Enhance System Safety and Security

Using the MPU with an RTOS to Enhance System Safety and Security Using the MPU with an RTOS to Enhance System Safety and Security By Stephen Ridley 10 December, 2016 www.highintegritysystems.com WITTENSTEIN WITTENSTEIN high integrity systems: A World Leading RTOS Ecosystem

More information

Software Quality is Directly Proportional to Simulation Speed

Software Quality is Directly Proportional to Simulation Speed Software Quality is Directly Proportional to Simulation Speed CDNLive! 11 March 2014 Larry Lapides Page 1 Software Quality is Directly Proportional to Test Speed Intuitively obvious (so my presentation

More information

Real Safe Times in the Jailhouse Hypervisor Unrestricted Siemens AG All rights reserved

Real Safe Times in the Jailhouse Hypervisor Unrestricted Siemens AG All rights reserved Siemens Corporate Technology Real Safe Times in the Jailhouse Hypervisor Real Safe Times in the Jailhouse Hypervisor Agenda Jailhouse introduction Safe isolation Architecture support Jailhouse application

More information

Development an update. Aeroflex Gaisler

Development an update. Aeroflex Gaisler European SpaceWire Router Development an update Sandi Habinc Aeroflex Gaisler Demand for SpaceWire Router Both European and international customers have shown interest in SpaceWire router with greater

More information

CCSDS Time Distribution over SpaceWire

CCSDS Time Distribution over SpaceWire CCSDS Time Distribution over SpaceWire Sandi Habinc, Marko Isomäki, Daniel Hellström Aeroflex Gaisler AB Kungsgatan 12, SE-411 19 Göteborg, Sweden sandi@gaisler.com www.aeroflex.com/gaisler Introduction

More information

Advanced Computing, Memory and Networking Solutions for Space

Advanced Computing, Memory and Networking Solutions for Space Advanced Computing, Memory and Networking Solutions for Space 25 th Microelectronics Workshop November 2012 µp, Networking Solutions and Memories Microprocessor building on current LEON 3FT offerings UT699E:

More information

RAMP-White / FAST-MP

RAMP-White / FAST-MP RAMP-White / FAST-MP Hari Angepat and Derek Chiou Electrical and Computer Engineering University of Texas at Austin Supported in part by DOE, NSF, SRC,Bluespec, Intel, Xilinx, IBM, and Freescale RAMP-White

More information

Virtualization in Multicore Real-Time Embedded Systems for Improvement of Interrupt Latency

Virtualization in Multicore Real-Time Embedded Systems for Improvement of Interrupt Latency Virtualization in Multicore Real-Time Embedded Systems for Improvement of Interrupt Latency Ivan Pavić, MSc Faculty of Electrical Engineering and Computing University of Zagreb Zagreb, Croatia Email: ivan.pavic2@fer.hr

More information

Task Scheduling of Real- Time Media Processing with Hardware-Assisted Virtualization Heikki Holopainen

Task Scheduling of Real- Time Media Processing with Hardware-Assisted Virtualization Heikki Holopainen Task Scheduling of Real- Time Media Processing with Hardware-Assisted Virtualization Heikki Holopainen Aalto University School of Electrical Engineering Degree Programme in Communications Engineering Supervisor:

More information

EMBEDDED SYSTEMS WITH ROBOTICS AND SENSORS USING ERLANG

EMBEDDED SYSTEMS WITH ROBOTICS AND SENSORS USING ERLANG EMBEDDED SYSTEMS WITH ROBOTICS AND SENSORS USING ERLANG Adam Lindberg github.com/eproxus HARDWARE COMPONENTS SOFTWARE FUTURE Boot, Serial console, Erlang shell DEMO THE GRISP BOARD SPECS Hardware & specifications

More information

Multicore Challenges and Choices: Deciding Which Solution Is Right for You

Multicore Challenges and Choices: Deciding Which Solution Is Right for You Multicore Challenges and Choices: Deciding Which Solution Is Right for You Tomas Evensen Chief Technology Officer, Wind River Table of Contents Executive Summary... 1 Business and Technology Trends...

More information

64 bit Bare Metal Programming on RPI-3. Tristan Gingold

64 bit Bare Metal Programming on RPI-3. Tristan Gingold 64 bit Bare Metal Programming on RPI-3 Tristan Gingold gingold@adacore.com What is Bare Metal? Images: Wikipedia No box What is Bare Metal? No Operating System Your application is the OS Why Bare Board?

More information

Virtualization (II) SPD Course 17/03/2010 Massimo Coppola

Virtualization (II) SPD Course 17/03/2010 Massimo Coppola Virtualization (II) SPD Course 17/03/2010 Massimo Coppola The players The Hypervisor (HV) implements the virtual machine emulation to run a Guest OS Provides resources and functionalities to the Guest

More information

Tile Processor (TILEPro64)

Tile Processor (TILEPro64) Tile Processor Case Study of Contemporary Multicore Fall 2010 Agarwal 6.173 1 Tile Processor (TILEPro64) Performance # of cores On-chip cache (MB) Cache coherency Operations (16/32-bit BOPS) On chip bandwidth

More information

The Quest-V Separation Kernel for Mixed Criticality Systems

The Quest-V Separation Kernel for Mixed Criticality Systems The Quest-V Separation Kernel for Mixed Criticality Systems Ye Li, Richard West, and Eric Missimer Computer Science Department Boston University Boston, MA 02215 Email: {liye,richwest,missimer}@cs.bu.edu

More information

The Actor Model applied to the Raspberry Pi and the Embedded Domain. Omer

The Actor Model applied to the Raspberry Pi and the Embedded Domain. Omer The Actor Model applied to the Raspberry Pi and the Embedded Domain Omer Kilic @OmerK omer@erlang-solutions.com Agenda Current state of Embedded Systems Overview of the Actor Model Erlang Embedded Project

More information

Software Verification for Low Power, Safety Critical Systems

Software Verification for Low Power, Safety Critical Systems Software Verification for Low Power, Safety Critical Systems 29 Nov 2016, Simon Davidmann info@imperas.com, Imperas Software Ltd. Page 1 Software Verification for Low Power, Safety Critical Systems Page

More information

A Boot-Strap Loader and Monitor for SPARC LEON2/3/FT

A Boot-Strap Loader and Monitor for SPARC LEON2/3/FT A Boot-Strap Loader and Monitor for SPARC LEON2/3/FT Les Miklosy PE Software to Spec The SPARC LEON family of processors offer the developer a configurable architecture for 32- bit embedded development

More information

Advanced Concepts and Components for adaptive Avionics

Advanced Concepts and Components for adaptive Avionics Advanced Concepts and Components for adaptive Avionics Ph. Armbruster Head of Data Systems Division ESTEC 03/03/2016 AVIONICS : Cost reduction as a challenge AVIONICS include: Data Handling TM/TC Attitude

More information

Protected mode RTOS: what does it mean?

Protected mode RTOS: what does it mean? Protected mode RTOS: what does it mean? Dr. Bernhard Sputh bernhard.sputh@altreonic.com Altreonic NV Gemeentestraat 61 Bus 1 3210 Linden Belgium August 24, 2015 Dr. Bernhard Sputh (Altreonic) Protected

More information

Real-Time Systems. Real-Time Operating Systems

Real-Time Systems. Real-Time Operating Systems Real-Time Systems Real-Time Operating Systems Hermann Härtig WS 2018/19 Outline Introduction Basic variants of RTOSes Real-Time paradigms Common requirements for all RTOSes High level resources Non-Real-Time

More information

High-Performance, Highly Secure Networking for Industrial and IoT Applications

High-Performance, Highly Secure Networking for Industrial and IoT Applications High-Performance, Highly Secure Networking for Industrial and IoT Applications Table of Contents 2 Introduction 2 Communication Accelerators 3 Enterprise Network Lineage Features 5 Example applications

More information

Characterizing the Performance of SpaceWire on a LEON3FT. Ken Koontz, Andrew Harris, David Edell

Characterizing the Performance of SpaceWire on a LEON3FT. Ken Koontz, Andrew Harris, David Edell Characterizing the Performance of SpaceWire on a LEON3FT Ken Koontz, Andrew Harris, David Edell Introduction SpaceWire is emerging as standard high-performance data interface Recent NASA missions include

More information

Current and Next Generation LEON SoC Architectures for Space

Current and Next Generation LEON SoC Architectures for Space Current and Next Generation LEON oc Architectures for pace Flight oftware Workshop 2012 November 7 th, 2012 www.aeroflex.com/gaisler Presentation does not contain U Export controlled information (aka ITAR)

More information

Authors:M. Masmano, Y. Valiente, P. Balbastre, I. Ripoll, A. Crespo and J.J. Metge

Authors:M. Masmano, Y. Valiente, P. Balbastre, I. Ripoll, A. Crespo and J.J. Metge Title: LithOS: a ARINC-653 guest operating for XtratuM Authors:M. Masmano, Y. Valiente, P. Balbastre, I. Ripoll, A. Crespo and J.J. Metge Affiliation: Instituto de Informática Industrial, Universidad Politécnica

More information

Heterogeneous Real-Time SoC Software Architecture

Heterogeneous Real-Time SoC Software Architecture Heterogeneous Real-Time SoC Software Architecture Presented By Stefano Stabellini Principal System Software Engineer Introduction Stefano Stabellini Xen Project: Founder of the Xen on Arm effort in late

More information

SpaceWire-RT. SpaceWire-RT Status SpaceWire-RT IP Core ASIC Feasibility SpaceWire-RT Copper Line Transceivers

SpaceWire-RT. SpaceWire-RT Status SpaceWire-RT IP Core ASIC Feasibility SpaceWire-RT Copper Line Transceivers SpaceWire-RT SpaceWire-RT Status SpaceWire-RT IP Core ASIC Feasibility SpaceWire-RT Copper Line Transceivers 1 Overview of SpaceWire-RT Project Aims The SpaceWire-RT research programme aims to: Conceive

More information

Building Reliable High-Performance Hardware. Fraunhofer FOKUS. Fraunhofer FOKUS

Building Reliable High-Performance Hardware. Fraunhofer FOKUS. Fraunhofer FOKUS Fraunhofer Institute for Open Communication Systems Kaiserin-Augusta-Allee 31 10589 Berlin, Germany www.fokus.fraunhofer.de 1 Building Reliable High-Performance Hardware Friedrich Schön System Quality

More information

Dramatically Accelerate 96Board Software via an FPGA with Integrated Processors

Dramatically Accelerate 96Board Software via an FPGA with Integrated Processors Dramatically Accelerate 96Board Software via an FPGA with Integrated Processors Glenn Steiner, February 2018 Glenn Steiner, March 2018 Sr. Manager, Xilinx, Inc. Sr. Manager, Xilinx, Inc. Abstract 16:00-16:55,

More information

Projects on the Intel Single-chip Cloud Computer (SCC)

Projects on the Intel Single-chip Cloud Computer (SCC) Projects on the Intel Single-chip Cloud Computer (SCC) Jan-Arne Sobania Dr. Peter Tröger Prof. Dr. Andreas Polze Operating Systems and Middleware Group Hasso Plattner Institute for Software Systems Engineering

More information

Microprocessor Systems

Microprocessor Systems Microprocessor Systems Networks and Embedded Software Module 4.1.1 by Wolfgang Neff Components (1) Microprocessor System Microprocessor (CPU) Memory Peripherals Control Bus Address Bus Data Bus 2 Components(2)

More information

The Quest-V Separation Kernel for Mixed Criticality Systems

The Quest-V Separation Kernel for Mixed Criticality Systems The Quest-V Separation Kernel for Mixed Criticality Systems Ye Li, Richard West, and Eric Missimer Computer Science Department Boston University Boston, MA 02215 Email: {liye,richwest,missimer}@cs.bu.edu

More information

HIGH PERFORMANCE PPC BASED DPU WITH SPACEWIRE RMAP PORT

HIGH PERFORMANCE PPC BASED DPU WITH SPACEWIRE RMAP PORT High Performance PPC Based DPU With SpaceWire RMAP Port HIGH PERFORMANCE PPC BASED DPU WITH SPACEWIRE RMAP PORT Session: SpaceWire Components Short Paper Pekka Seppä, Petri Portin Patria Aviation Oy, Systems/Space,

More information

Digital Control for Space Power Management Devices

Digital Control for Space Power Management Devices Template reference : 100182079N-EN Digital Control for Space Power Management Devices Work conducted under ESA Contract nr.21826/08/nl/lvh DIGITAL POWER CONTROL Management of power devices via digital

More information

On-Board Control Procedures: Autonomous and Updateable Spacecraft Operator Onboard and Beyond

On-Board Control Procedures: Autonomous and Updateable Spacecraft Operator Onboard and Beyond On-Board Control Procedures: Autonomous and Updateable Spacecraft Operator Onboard and Beyond Marek Prochazka / Kjeld Hjortnaes European Space Agency, ESTEC, Software Systems Division. FSW-10, Pasadena

More information

Mission-Critical Space Software For Multi- Core Processors

Mission-Critical Space Software For Multi- Core Processors -UNCLASSIFIED- Mission-Critical Space Software For Multi- Core Processors Steve Crago USC/ISI-East November 6, 2009 FSW-09 Pasadena, CA -UNCLASSIFIED- Outline Introduction Mission Critical Software Summary

More information

Container Adoption for NFV Challenges & Opportunities. Sriram Natarajan, T-Labs Silicon Valley Innovation Center

Container Adoption for NFV Challenges & Opportunities. Sriram Natarajan, T-Labs Silicon Valley Innovation Center Container Adoption for NFV Challenges & Opportunities Sriram Natarajan, T-Labs Silicon Valley Innovation Center Virtual Machine vs. Container Stack KVM Container-stack Libraries Guest-OS Hypervisor Libraries

More information

A Survey of Time and Space Partitioning for Space Avionics

A Survey of Time and Space Partitioning for Space Avionics A Survey of Time and Space Partitioning for Space Avionics Jan Bredereke City University of Applied Sciences Bremen Flughafenallee 10, 28199 Bremen, Germany jan.bredereke@hs-bremen.de Technical Report

More information

GR716 Single-Core LEON3FT Microcontroller. Cobham Gaisler AMICSA 2018

GR716 Single-Core LEON3FT Microcontroller. Cobham Gaisler AMICSA 2018 GR716 Single-Core LEON3FT Microcontroller Cobham Gaisler AMICSA 2018 Introduction Description The GR716 features a fault-tolerant LEON3 SPARC V8 processor, communication interfaces and on-chip ADC, DAC,

More information

CSC 5930/9010 Cloud S & P: Virtualization

CSC 5930/9010 Cloud S & P: Virtualization CSC 5930/9010 Cloud S & P: Virtualization Professor Henry Carter Fall 2016 Recap Network traffic can be encrypted at different layers depending on application needs TLS: transport layer IPsec: network

More information

Integration of Mixed Criticality Systems on MultiCores: Limitations, Challenges and Way ahead for Avionics

Integration of Mixed Criticality Systems on MultiCores: Limitations, Challenges and Way ahead for Avionics Integration of Mixed Criticality Systems on MultiCores: Limitations, Challenges and Way ahead for Avionics TecDay 13./14. Oct. 2015 Dietmar Geiger, Bernd Koppenhöfer 1 COTS HW Evolution - Single-Core Multi-Core

More information

The Actor Model applied to the Raspberry Pi and the Embedded Domain. The Erlang Embedded Project. Omer

The Actor Model applied to the Raspberry Pi and the Embedded Domain. The Erlang Embedded Project. Omer The Actor Model applied to the Raspberry Pi and the Embedded Domain. The Erlang Embedded Project Omer Kilic @OmerK omer@erlang-solutions.com Outline Current state of Embedded Systems Overview of Erlang

More information

Chapter 5 C. Virtual machines

Chapter 5 C. Virtual machines Chapter 5 C Virtual machines Virtual Machines Host computer emulates guest operating system and machine resources Improved isolation of multiple guests Avoids security and reliability problems Aids sharing

More information

S32 SDK for Power Architecture Release Notes Version EAR

S32 SDK for Power Architecture Release Notes Version EAR S32 SDK for Power Architecture Release Notes Version 0.8.0 EAR 2017 NXP Contents 1. DESCRIPTION...3 2. SOFTWARE CONTENTS...4 3. DOCUMENTATION...4 4. EXAMPLES...5 5. SUPPORTED HARDWARE AND COMPATIBLE SOFTWARE...6

More information

Safety and Security for Automotive using Microkernel Technology

Safety and Security for Automotive using Microkernel Technology Informationstag "Das Automobil als IT-Sicherheitsfall" Berlin, 11.05.2012 Safety and Security for Automotive using Microkernel Technology Dr.-Ing. Matthias Gerlach OpenSynergy TwoBirds withonestone Safety

More information

BlueVisor: A Scalable Real-time Hardware Hypervisor for Many-core Embedded System

BlueVisor: A Scalable Real-time Hardware Hypervisor for Many-core Embedded System BlueVisor: A Scalable eal-time Hardware Hypervisor for Many-core Embedded System Zhe Jiang, Neil C Audsley, Pan Dong eal-time Systems Group Department of Computer Science University of York, United Kingdom

More information

OS and Computer Architecture. Chapter 3: Operating-System Structures. Common System Components. Process Management

OS and Computer Architecture. Chapter 3: Operating-System Structures. Common System Components. Process Management Last class: OS and Architecture OS and Computer Architecture OS Service Protection Interrupts System Calls IO Scheduling Synchronization Virtual Memory Hardware Support Kernel/User Mode Protected Instructions

More information

SpaceWire Remote Terminal Controller

SpaceWire Remote Terminal Controller Remote Terminal Controller Presented by Jørgen Ilstad On board Payload Data Section, ESTEC Wahida Gasti, ESA ESTEC Co Authors Sandi Habinc, Gaisler Research Peter Sinander, SAAB Space Slide : 1 Overview

More information

Scalable Sensor Data Processor: Testing and Validation

Scalable Sensor Data Processor: Testing and Validation Scalable Sensor Data Processor: Testing and Validation R. Pinto a, L. Berrojo, L. Gomez, F. Piarrette, P. Sanchez, E. Garcia, R. Trautner b, G. Rauwerda c, K. Sunesen, S. Redant d, S. Habinc e, J. Andersson,

More information

Mixed Criticality in Control Systems

Mixed Criticality in Control Systems Preprints of the 19th World Congress The International Federation of Automatic Control Mixed Criticality in Control Systems Alfons Crespo Alejandro Alonso Marga Marcos Juan A. de la Puente Patricia Balbastre

More information