E F F O RT S T O R E D U C E F P G A & P P C D I E T E M P E R AT U R E S OF THE ROACH2 CHASSIS - HILO TESTING

Transcription

1 Billie Chitwood Date: 01AUG2013 E F F O RT S T O R E D U C E F P G A & P P C D I E T E M P E R AT U R E S OF THE ROACH2 CHASSIS - HILO TESTING 80# FPGA(Die!Temperature(Reduc-on( 70# 60# 0# 10# 60# 70# 80# PPC(Die(Temperature(Reduc-on( 70# 60# 0# 10# 60# 70# Baseline vs Best Practices - FPGA in blue PPC in Red - die temperature dashed, heat sink temperatures in solid

2 Previous Testing & Setup After some initial testing with the ROACH2 unit unclocked earlier (see, SMAwideband/RoachMotel, under topic Hilo testing of ROACH2 temperature dissipation ), Derek Kubo assisted me in obtaining and configuring all of the necessary hardware I needed to utilize the analog to digital converters and exercise the FPGA s F-engine capabilities. The clock source was set at GHz, 3.1 db, and the noise source assembled was at -14 db and drawing approximately 300 mv. I collected my data using the modified versions of the DAQ software I had written earlier, ROACHtempsAll.pl and ROACHtemps.pl, which read both the onboard temperatures from the ROACH2 via a telnet link, and the one-wire temperature sensors on an added harness via an HA7Net device, then logged the data to the Engineering Database, each day s data timestamped under the /ROACH directory as ROACH2-0 data. Establishing Baseline & Rear Vent/Power Supply Baffle Tests Since I already had the rear vent and power supply baffle in place for the earlier unclocked testing, I ran the first test utilizing the clock and noise source in the power supply and rear vents configuration as discussed in the above referenced twiki entry, but now with the noise source and clock inputs. First Figure: PS Vent: The ROACH2 chassis fitted with the 90 baffle to exhaust the power supply s air externally from the side of the chassis.

3 Second Figure: Rear Vent: An additional circular opening made in the left back panel After the completion of that test, I then removed the power supply baffle and rear grate, and taped over the two added vent holes, and ran an active bitcode baseline test. The results of those tests are plotted below. The resulting data are available in the attached Excel workbook file ROACH2-0_ xlsx. 80# Baseline,)PS)Baffle,)&)Rear)Vent) 70# 60# 12:28:48# 12:43:12# 12:57:36# 13:12:00# 13:26:24# 13:40:48# 13:55:12# 14:09:36# While the interior of the chassis showed a considerable drop in temperature ( INT CENTER ), as did the ppc die, there was little change to the fpga die temperature. This led me to believe that there was less than optimal heat transfer from the die to the heat sink.

4 Heat Sink Pad vs Heat Sink Compound Test (FPGA) With the added vents still taped over, I next removed the FPGA heat sink, and scraped off the existing heat sink adhesive pad. I then applied a silicone based heat sink grease, GC Electronics silicone heat sink compound. It appeared as though this change alone lowered the FPGA temperature between C, just from applying the heat sink with heat sink grease rather than an adhesive thermal pad. I then performed another test with the power supply baffle and rear vent configuration, to see the effect of the remounted heat sink. I affixed the heat sink using a cable tie to prevent the heat sink from rotating under the torque of the fan motor. The C drop from refitting the FPGA heat sink was also exhibited in this configuration. I had not used the supplied plastic heat sink clip on the last test, so repeated it with the clip that was unfixed when the heat sink was initially removed. There appeared to be no significant difference in the FPGS cooling with the plastic clip than with my jerry-rigged clip. I then removed the baffle and rear grate, and once again taped over the added vent openings, to run the test again in the original baseline chassis configuration. The results of these tests are plotted below, and details are available in the attached document, ROACH2-0_ b.xlsx. 60# Refi$ed&(Greased)&FPGA&Heat&Sink( 55# 45# 35# 25# 0# 60# 80# 100# # 180# 200#

5 Improved FPGA Heat Sink Fan Tests Paul Yamaguchi needed to use the synthesizer the next day, so I took that opportunity to replace the existing 80 ma 9.68 m 3 /hr) FPGA heat sink fan, with the 240 ma (23.78 m 3 /hr) model sent out from Cambridge. l also reinstalled the rear vent and grating, and the power supply exhaust diverter. I then did an interim test, without the clock or noise inputs. testing the FPGA heat sink with grease & more powerful (240mA) fan, power supply and rear vents - no noise or clock signals. The results for the new fan looked impressive compared to the earlier tests, with FPGA die temperature of 40 C versus 48 C, in the idle unclocked state. Details available in the attached document, ROACH2-0_ xlsx. Big$FPGA$Fan,$PS$Baffle,$&$Rear$Vent$ 45# 35# 25# 14:29:46# 14:32:38# 14:35:31# 14:38:24# 14:41:17# 14:44:10# 14:47:02# 14:49:55# 14:52:48# 14:55:41# 14:58:34# 15:01:26# -me(( When I had access to the synthesizer once more, I reran the test with the active bit code on, noise & clk inputs, both vents, and the more powerful fan. The new larger FPGA heat sink fan pulled another 7 C, and with better coupling to the chip using heat sink grease and no adhesive, and the additional cooling provided by the chassis modifications, this was a 20 C drop from the original baseline. These data are plotted at the beginning of the of the FPGA alternate heat sink testing graph, performed a few days later, as a benchmark, and the combined plot appears at the end of the next section.

6 Alternate Heat Sinks Tests (FPGA & PPC) My next effort was to test alternate heat sink designs on both the FPGA and PPC chips. There are two each of two different types, for both the FPGA and the PPC. For the FPGA, we have a square tower type, similar to what is there now, but deeper, ATS-55425W-C2-RO and a radially splayed type, ATS-51425R-C2-RO. For the PPC, we have the same two types of configurations, the tower type, ATS-55375W-C2-RO, and the radially splayed type, ATS-51375R-C2-RO. I will now refer to these as the R and W types. I removed the as-supplied heat sink, cleaned up the grease, and used the supplied pads to put the W type heat sink on the FPGA. It had an adhesive pad, so I tested it in this configuration initially, as removing it would destroy it for further testing. Ran the test with what I am now calling the new standard chassis configuration, with power supply baffle and rear vent. I was not getting results as good as the current best case, and, in fact, was not even as good as my baseline numbers, 72 C vs. 68 C. It was far off the 48 C mark I had achieved earlier. Next, I removed the W type, attached the R type heat sink. I tried to use the supplied hardware to clip the heat sink to the IC, but due to the proximity of devices around the FPGA, I was not able to clip it across the center, so I took the metal clip from the spare, and used both, fastening it in two spots, away from interfering surface mount devices, as illustrated, below right. Again, I was able tell quickly tell that I was not getting results as good, although it was better than the W-style heat sink. It was at least better than my baseline numbers, and, in fact, was even as good as my original (pre-heat sink re-fit) baseline numbers, 63 C vs. 68 C, and even better than the pre-grease vented numbers, but still not close to the any of the reapplied heat sink temperature of 48 C. Earlier, I had not used a physical clamp with the W-type pad, so decided to re-try it, using the clamp supplied with the R-style, below left.

7 W-Style (left) & R-Style FPGA Heat Sinks with supplied mounts. It appeared to be doing a bit better (-2 C) with the clamp, but not as good as with the higher surface area radial R- type design. Replacing the thermal pad with heat sink grease got me another 5 C (63 to 58 ), about half of what I saw with the original heat sink pad to grease transition. That said, I would have to say that the original design, low profile heat sink with its own fan, is the best, and the only thing I would change is the more powerful 600 ma fan. I decided to retest my configuration with the original heat sink and new fan, with the grease interface, to make sure I still had a good thermal connection, before moving on to my next test, involving the new, more powerful, intake fans. The details are available in the above referenced document, ROACH2-0_ b.xlsx, and the resulting combined plot for comparison is shown below. (Note, these tests were not all performed on 7/18, but later data were added to this workbook for the comparison.) 80# FPGA%Heat%Sink%Tests% (all%with%power%supply%vent%and%rear%vent)% 70# 60# 8:38:24# 9:07:12# 9:36:00# 10:04:48# 10:33:36# 11:02:24# 11:31:12# 12:00:00#

8 Intake Fan Tests I crimped sockets onto the new intake fans and swapped them out for the existing. They are 600 ma, as opposed to the 400 ma originals. We were now measuring 119 W at turn on. Not only did it appear that we did not gain any cooling we were one degree higher. Although, it could have been that much warmer in the lab, or simply that we now exceeded the flow rate that the rear vents can accommodate before back pressure builds. Ran another test to check the back pressure issue. This time, still using the 600 ma fans, but turning the cover crosswise, which provided about ½ gap at the back, for an additional 7.5 square inches of exhaust. Although there was a small improvement, I would have to say that punching extra holes and swapping out the intake fans is too much work for resulting 1 C improvement. Put the original fans back in and ran another test, this time with larger FPGA heat sink fan, heat sink grease, power supply and rear vents. (This test is plotted first in the graph below.) Details are available in the attached document, ROACH2-0_ xlsx. 55# Intake(Fan(Tests( 45# 35# 25# 0# 10# 60# 70# 80#

9 Improved Heat Sink Grease Tests Online searches I conducted confirmed that thermal grease is superior to pads for heat conduction, in high heat load situations. It seems there is a sizable community of individuals who over-clock PCs for added performance, and among their forums, the product of choice appears to be Arctic Silver 5, a high density polysynthetic silver thermal compound, thermally, but non-electrically conductive, available from a wide variety of distributors. I purchased a quantity sufficient to retrofit all of the heat sink mountings, if required. I then pulled the FPGA fan and heat sink assembly, removed the white, GC Electronics silicone heat sink compound I had used in the previous tests, and replaced it with Arctic Silver 5. While I was fitting the heat sink back onto the FPGA, I noticed that the supplied heat sink clamp supplies almost no normal pressure, now that the thickness of the adhesive pad has been removed. Decided to try using one of the clamps supplied with the new heat sinks we ordered. Original FPGA heat sink, improved fan and clip, mounted with Arctic Silver 5 compound It did show some improvement, as illustrated below. Details are available in the attached document, ROACH2-0_ xlsx. FPGA(Heat(Sink(Tests( 45# 35# 25# 0# 60# 80# 100# 1

10 PPC Heat Sink Tests Next, I removed the PPC low-profile heat sink, and replaced it with a W-style heat sink, using its adhesive pad. I was not able to use the R-style on the PPC, as it does not come with an adhesive pad, just a silver colored-interface material. The design of the PPC chip, in terms of how it mounts to the PC board, does not allow for any type of clamp to secure a non-adhesive heat sink. That said, the new, taller, W-style PPC heat sink did show better performance, as plotted below, with another 2 C drop in die temperature, for an overall drop of 8 C for the original chassis configuration. Details are available in the attached document, ROACH2-0_ xlsx. W-Style PPC heat sink with adhesive thermal pad PPC(Heat(Sink(Tests(6(Part(3( 45# 35# 25# 60# 70# 80# 90# Conclusion In regards to the the overall modifications, I think the results of the Hilo testing strongly support the implementation of 1) the PVC power supply baffle, 2) the additional rear vent, and 3) the use of a high quality heat sink grease to the FPGA heat sink, utilizing the exiting FPGA heat sink, but 4) substituting the the more powerful 600mA fan. I will see what the consensus is, as to whether or not we wish to retrofit the PPC heat sink for the added 2 C, if we think there is a a risk PPC overheating becoming an issue.