Automotive 32-bit Microcontroller Technology & Product Roadmap

Transcription

1 Automotive 32-bit Microcontroller Technology & Product Roadmap LIU Shan Lin Marketing Manager, Micro BU ADG Marketing and Application Greater China & South Asia Region STMicroelectronics 2017 年 ST 汽车 MCU 技术日 2017 年 6 月 6 日, 上海 2017 年 6 月 8 日, 深圳 2017 年 6 月 13 日, 北京

2 Automotive MCU Market Drivers 2 Increase Levels of Security Level Increase Processing Increase Levels of Safety Increase Quality levels Market Drivers Increase Product Scalability Increase Networking Capability Ensure Price competitiveness

3 32-bit Automotive Microcontrollers 3 Market coverage Braking EV s Converters (DC-DC) RADAR Engine Management Performance Transmission 2 Wheelers High performance High performance multicores with dedicated timing unit, Security and ASIL-D Safety General Purpose Scalable family to cover car networks, interiors and car body applications with Security and ISO CAN-FD Lighting & Body control units EV s Battery Manag ement General Purpose 1 st Install Access ories Park Pilot & Rear Camera Overthe-air update in-car Gateways Professional Tools and Software Offer Crolles Enabled by an extensive support ecosystem for tools and software More than 200 part numbers Available More than 150M parts shipped Internal Manufacturing Zero ppm target

4 Technology Roadmap

5 Automotive Technology Roadmap 5 Embedded NVM 1-Transistor NOR Flash M10 (90 nm) 0.18 mm 2 Flash cell PRODUCTION M55 (55 nm) mm 2 Flash cell PRODUCTION M40 (40 nm) mm 2 Flash cell RAMP-UP STMicroelectronics, CMOS Headquarters, 200mm/300mm wafer fabs, Crolles, France In-house Embedded NVM Development & Manufacturing in Advanced 300mm Wafer Fab Under Development

6 Small Efficient Pins vs Size Performance R Automotive package roadmap 6 BGA Flip-chip QFP BGA eqfp Wire bonding More I/Os same size Metal-Lid Exposed System in Package Passive integration Higher Freq Better Safety Better Thermal Performance eqfp Up to 4Mbyte Flash in 10x10 64Pin QFN 7x7 Body- 48Pins QFN Dual Row Today Roadmap ST leading the way towards smaller, faster and cooler MCU

7 32-bit Automotive MCU Roadmap

8 32-bit Automotive Microcontroller Roadmap 8 Silicon technology System, software Safety, Security Quality and Reliability Manufacturig CMOSM10 P28 Single to Multicore Full Autosar ISO26262 ASIL A-D / Fail Operational HSM / SHE+ Top ranking Zero Defect Strategy Flexible and Independent Manufacturing SPC56 (90nm) SPC57 (55nm) SPC58 (40nm) Sxx (28nm) In Production In Design / Qualif Conceptual Design

9 Resources & Performance 32-bit Automotive MCU Roadmap 9 Full roadmap view 400MHz 200MHz 180MHz 120MHz 80MHz 64MHz 48MHz 16MB 10MB 6MB 4MB 3MB 2MB 1MB 512k 128k High Performance, Safety critical MCU General Purpose, Body & Gateway MCU HW Security Andorra 150MHz, z4 QFP176/BGA324 Leopard 120MHz, 2x z4 QFP100/144 Monaco 80MHz, z3 QFP144/176 Pictus 64MHz, 2x z0 QFP100/144 Pictus 64MHz, z0 QFP64/100/144 C D S Concept Design Sampling Qualified Bolero 120MHz, z4+z0 QFP176/208 BGA256 Bolero 64MHz, z0 QFP100/144/176 Bolero B 64MHz, z0 QFP64/100/144 Bolero D 64MHz, z0 QFP64/100 Eiger 180MHz, 3 x z4 QFP176/BGA292 KGD K2 160MHz, z4+z2 QFP144/176 KGD Lavaredo 80MHz, z2 QFP80/100 Velvety 80MHz, z0 QFP64/100 Bernina 200MHz, 3x z4 QFP176/BGA292 KGD Sphaero 140MHz, z4 QFP100/144 Chorus 200MHz, 3x z4 D QFP144/176 BGA292/376 Chorus 180MHz, 3x z4 QFP144/176 BGA292 ASIL B Chorus 180MHz, 2x z4 QFP64/100/144/176 BGA292 ASIL B Chorus 120MHz, z4 QFP64/100/144/176 ASIL B Chorus 80MHz, z2 QFP64/100 Extended functionality and increased performance 2 nd Generation+ products recommended for new designs D D S 1 st Generation 2 nd Generation

10 General Purpose - Body & Gateway 32-bit MCUs Roadmap

11 Resources & Performance 32-bit Automotive MCU Roadmap 11 General purpose / body and gateway roadmap view General Purpose, Body & Gateway MCU HW Security C D S Concept Design Sampling Qualified Chorus 200MHz, 3x z4 D QFP144/176 BGA292/376 Chorus 180MHz, 3x z4 QFP144/176 BGA292 Bolero 120MHz, z4+z0 QFP176/208 BGA256 Bolero 64MHz, z0 QFP100/144/176 Bolero B 64MHz, z0 3MB 2MB 1.5MB 1.5MB 1MB 768K 512K 376K ASIL B Chorus 180MHz, 2x z4 QFP64/100/144/176 BGA292 S ASIL B Chorus 120MHz, z4 QFP64/100/144/176 ASIL B Chorus 80MHz, z2 QFP64/100 QFP64/100/144 Bolero D 64MHz, z0 QFP64/ K 256K 128K Extended functionality and increased performance 2 nd Generation+ products recommended for new designs 1 st Generation 2 nd Generation

12 128K 192K 256K 384K 512K 768K 1M 1.5M 2M Bolero Family 12 Product Roadmap B, C, D lines 64/100 PIN QFP 4M 6M 8M 3M Body Access SPC560D e200z0h core (48MHz) 256KB Flash w/ ECC 4x16KB Data Flash (RWW) w/ ECC 16KB SRAM 1x CAN 3x LINFlex 2x SPI 1x 12-bit ADC (S&H) SPC560D40 256K Flash 16KRam Bolero - SPC560B e200z0h core (64MHz) 1.5MB Flash w/ ECC 4x16KB Data Flash (RWW) w/ ECC 96KB SRAM w/ ECC 6x CAN, 10x LINFlex 6x SPI, 1x I²C 1x 10-bit, 1x 12-bit ADC (S&H) SPC560B/C50 512K Flash 32/48KRam SPC560B/C40 256K Flash 24/32KRam SPC560B64 1.5MFlash 96KRam SPC560B60 1MFlash 80KRam SPC560B54 768KFlash 64KRam Bolero(B)& Gateway(C) SPC560B/C e200z0h core (64MHz) 512KB Flash w/ ECC 4x16KB Data Flash (RWW) w/ ECC 48KB SRAM w/ ECC 6x CAN, 4x LINFlex 3x SPI, 1x I²C 1x 10-bit ADC (S&H) SPC564B70 2MFlash 256KRam SPC564B64 1.5MFlash 128KRam SPC56EC74 3MFlash 256KRam SPC56EC70 2MFlash 256KRam SPC56EC64 1.5MFlash 192KRam Bolero(B)&Gateway(C) SPC564B/EC e200z4d core (120MHz) e200z0h as second core (80MHz) 3MB Flash w/ ECC 4x16KB Data Flash (RWW) w/ ECC 256KB SRAM 1x 10-bit, 1x 12-bit ADC (S&H) 6x FlexCAN, 10xLINFlex FlexRay Ethernet Cryptographic Services Engine (CSE) SPC560D30 128K Flash 12KRam LQFP64 /LQFP100 64/100/144 LQFP100 PIN / LQFP /144/176 / LQFP176QFP QFP176 LQFP176 /208 BGA256 / LQFP208 / LBGA256

13 Product Roadmap Chorus Family K 768K 1M 1.5M 2M 3M 4M 6M 8M SPC58NH92 1M 1.5M 2M 3M 4M 6M 8M 10M SPC582B60 z2 64Kdata flash COM: 7 / 6 / 0 / 0 / 4 ASIL-B QFN48 / QFP64 / 100 SPC582B60 1MFlash / 96KRAM SPC582B54 768KFlash / 80KRAM SPC584B70 z4 64Kdata flash COM: 8 / 14 / 1 / 0 / 7 HSM (Evita Medium) ASIL-B QFP64 / 100 / 144 / 176 SPC584B70 2MFlash / 192KRAM SPC584B64 1.5MFlash / 160KRAM SPC584B60 1MFlash / 128KRAM SPC58EC80 SPC58EC80 4MFlash / 512KRAM SPC58EC74 3MFlash / 416KRAM SPC58EC70 2MFlash / 320KRAM 2x z4 128Kdata flash COM: 8 / 18 / 1 / 1 / 8 HSM (Evita Medium) ASIL-B QFP64 / 100 / 144 / 176 BGA292 SPC58NG84 SPC58NG84 6MFlash / 768KRAM SPC58NG80 4MFlash / 768KRAM 3x z4 256Kdata flash COM: 8 / 18 / 2 / 1 / 10 HSM (Evita Medium) ASIL-D QFP144 / 176 / BGA292 SPC58NH92 10MFlash / 1,28MRAM SPC58NH90 8MFlash / 1MRAM SPC58NH84 6MFlash / 768KRAM 3x z4 256Kdata flash COM: 12 / 28 / 2 / 1 / 10 Gigabit Ethernet OTA (flash context switch) emmc / HyperFlash USB (no PHY) HSM (Evita Full) ASIL-D QFP144 / 176 BGA292 / 376 SPC582B50 512KFlash / 64KRAM COM: CAN / LIN / ETH / FR / SPI 80MHz 120MHz 2x 180MHz 3x 180MHz 64/100 PIN QFP 64/100/144 PIN QFP 100/144/176 QFP QFP176 /208 BGA256 3x 200MHz

14 Chorus family designed in more than 50% of new gateway generation Chorus Family 14 Number 1 in Gateway Market Advanced in-car networking Gateway MCU emmc 1Gbyte Gateway + OTA storage MCU Vehicle Software Update over-the- air FOTA Body Units Networking Package Options Scalability BGA292/376 eqfp QFN48 Single, dual and triple cores Up to 200MHz operation Memory from 512Kbyte to 10Mbyte Security & Safety Evita Medium/Full ASIL-B / ASIL-D

15 Chorus Family System Integration 15 Embedded Memory and performance up to 10M flash / 1.28MRAM Single core, dual core and triple core platform up to 200MHz Data and instruction cache as well as local data RAM to avoid waitstates at max freq. Rich set of automotive network protocols Up to 12x CAN with ISO CAN FD 2x Ethernet 10/100Mb/1Giga bit/s FlexRay dual channel Up to x 28 LIN interfaces Peripherals emios timer with 96ch combined with Cross Triggering Unit ADC: 4x 12-bit / 1x 12-bit supervisor / 1x 10-bit Standby Up to 10 SPI Miscellaneous Security: HSM up to Evita Full FOTA: Flash context switching External memory interface: emmc, HyperFlash, Fast SPI

16 Chorus Family Scalability & Compatibility 16 Chorus provides extended scalability within the family by offering Wide range of packages from QFN48 to etqfp176 and BGA376 Compatible pinout from 512kB Flash up to 10MB Flash devices Aligned cores and platform architecture Common peripherals set and memory mapping Easy migration path from Bolero products Reuse of well adopted Bolero peripherals like emios/ctu, LINFlex, DSPI Maintained Low concept with the Mode Entry and Standby domain Extended standby capability with the Smart Standby Unit for autonomous Contact Monitoring handling Development and Programming Tools Compiler, debugger and programmers can be reused 2-pin JTAG supported with backwards compatibility in 5-pin mode as for Bolero

17 Chorus 1M SPC582B60 18 Block Diagram (superset) Core 80 MHz ISA e200z2 Core (VLE) Single Issue Core with Floating Point Unit I/O 7 x MCAN / ISO CAN-FD 6 x LINFlex 4 x DSPI 1 x I2C 1x 32ch emios 32ch CTU (Cross Triggering Unit) 32 channel ADC 1x 12-bit ADC Available Debug JTAG Nexus IEEE-ISTO eDMA e200z2 FPU VLE STM SWT Memory 1M byte RWW Flash with ECC 4x16k Data Flash with ECC 96k RAM with ECC System FM-PLL MPU 16 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit 8 x PIT / 1x STM / 1x RTC/API Nexus IEEE-ISTO Class 2+ FMPLL 8x PIT 1x 12bit ADC RTC/API CTU 32ch FCCU emios 32ch Crossbar Switch Memory Protection Unit 6x LINFlex 4x DSPI 7x MCAN 2x CRC AIPS 1x I2C 96k S-RAM 1M 64k Data System Platform Memory Timer Peripherals Freq. max Voltage Temp. ASIL I/O Package 80MHz 5V / 3.3V -40 / +125 C B /64/100

18 Chorus 2M SPC584B70 19 Block Diagram (superset) Core 120 MHz ISA e200z4 Core (VLE) Dual Issue Core with Floating Point Unit 8k-Instruction, 4k-Data 64k Local d-ram I/O 8 x MCAN / FD-CAN 14 x LINFlex 1 x Ethernet (100Mb/s, time stamping, AVB, IPv4 Checksum) 7 x DSPI 1 x I2C 2x 32ch emios 64ch CTU (Cross Triggering Unit) 64 channel ADC 1x 12-bit ADC 1x 12-bit ADC Supervisor Design HSM Debug JTAG Nexus IEEE-ISTO ETH 32eDMA Crossbar Switch Memory Protection Unit e200z4 8k-I/4k-D FPU VLE STM SWT D-RAM Memory 2M byte RWW Flash with ECC 4x16k Data Flash with ECC 192k RAM (128k SRAM, 64k Local d-ram) with ECC System SSWU (Smart Standby Wakeup) Security Module: HSM (Evita Medium) FM-PLL MPU 32 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit 6 x PIT / 1x STM / 1x RTC/API Nexus IEEE-ISTO Class 3+ FMPLL ADC 1x 12-bit 6x PIT ADC Supervisor System Platform RTC/API CTU 64ch FCCU emios 32ch emios 32ch AIPS 2x CRC 8x MCAN 7x DSPI 12x LINFlex 1x I2C 128k S-RAM 2M 64k Data Memory Timer Peripherals Freq. max Voltage Temp. ASIL I/O Package 120MHz 5V / 3.3V -40 / +125 C B /100/144/176

19 Chorus 4M SPC58EC80 20 Block Diagram (superset) Core 180MHz ISA e200z4 Core (VLE) Dual Issue Core with Floating Point Unit 8k-Instruction, 4k-Data 64k Local d-ram 180MHz ISA e200z4 Core (VLE) Dual Issue Core with Floating Point Unit 8k-Instruction, 4k-Data 64k Local d-ram I/O 8 x MCAN / FD-CAN 18 x LINFlex 1 x Ethernet (100Mb/s, time stamping, AVB, IPv4 Checksum) Dual Channel FlexRay (10MB/s, 128 buffers ) 8 x DSPI, 1 x I2C 2x 32ch emios 64ch CTU (Cross Triggering Unit) 95 channel ADC 3x 12-bit ADC 1x 12-bit ADC Supervisor 1x 10-bit Standby ADC Available e200z4 8k-I/4k-D FPU VLE STM SWT D-RAM Debug JTAG Nexus IEEE-ISTO HSM Crossbar Switch ETH Memory Protection Unit FlexRay 64 edma e200z4 8k-I/4k-D FPU VLE STM SWT D-RAM Memory 4M byte RWW Flash with ECC 4x32k Data Flash with ECC 512k RAM (384k SRAM, 2x 64k Local d-ram) with ECC System SSWU (Smart Standby Wakeup) Security Module: HSM (Evita Medium) FM-PLL MPU 64 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit (incl. error pin) 8x PIT / 1x STM / 1x RTC/API Nexus IEEE-ISTO Class 3+ FMPLL ADC(STBY) 1x 12-bit 8x PIT ADC Supervisor System Platform CTU 64ch FCCU emios 32ch AIPS emios 32ch AIPS ADC 3x 12-bit 2x CRC 8x MCAN 8x DSPI 16x LINFlex 256k S-RAM 1x I2C 128k S-RAM Freq. max Voltage Temp. ASIL I/O Package 4M 128k Data Memory Timer Peripherals 180MHz 5V / 3.3V -40 / +125 C B /100/144/176/292

20 ASIL-D Core 180MHz ISA e200z4 Core (VLE) Floating Point Unit 8k-Instruction, 4k-Data 16k Local i-ram, 64k Local d-ram Lock Step (optional) 180MHz ISA e200z4 Core (VLE) Floating Point Unit 8k-Instruction, 4k-Data 16k Local i-ram, 64k Local d-ram 180MHz ISA e200z4 Core (VLE) Floating Point Unit & LSP(DSP) 8k-Instruction 16k Local i-ram, 32k Local d-ram Memory 6M byte RWW Flash with ECC 4x64k Data Flash with ECC 768kRAM (608k SRAM + 160k d-ram) with ECC Including 256k Standby I/O 8 x MCAN / FD-CAN 18 x LINFlex 2 x Ethernet (100Mb/s, time stamping, AVB, IPv4 Checksum) Dual Channel FlexRay (10MB/s, 128 buffers) 10 x DSPI, 1 x I2C 2x 32ch emios 64ch CTU (Cross Triggering Unit) 86 channel ADC 4x 12-bit ADC 1x 12-bit ADC Supervisor 1x 10-bit Standby ADC System SSWU (Smart Standby Wake-up) Security Module: HSM (Evita Medium) FM-PLL MPU 64 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit (incl. error pin) 8 x PIT / 1x STM / 1x RTC/API 1x LFAST (Interprocessor bus) Nexus IEEE-ISTO Chorus 6M SPC58NG84 21 e200z4 8k-I FPU VLE LSP ADC (STBY) 1x 10-bit FMPLL Available STM SWT I-RAM D-RAM HSM LFAST Crossbar Switch 2x ETH Memory Protection Unit 8x PIT ADC 4x 12-bit RAM Ctrl 320k S-RAM ADC Supervisor System Platform AIPS CTU AIPS Block Diagram (superset) JTAG/Debug Nexus IEEE-ISTO FlexRay MEMU 64 edma Cont. emios 32ch FCCU emios 32ch 6M 256k Data e200z4 8k-I/4k-D FPU VLE Cont. 2x CRC 2xTsens 8x M-CAN Crossbar Switch 7x DSPI STM SWT I-RAM D-RAM 18x LINFlex e200z4 e200z4 8k-I/4k-D FPU VLE Memory Protection Unit 2x µsb RAM Cont. 288k S-RAM Class 3+ (Aurora interface) Freq. max Voltage Temp. ASIL I/O Package 180MHz 5V / 3.3V -40 / +125 C D /176/292 1x I2C STM SWT I-RAM D-RAM Memory Timer Peripherals

21 High Performance - Safety Critical 32-bit MCUs Roadmap

22 Resources & Performance 32-bit Automotive MCU Roadmap 23 High Performance - Safety Critical MCUs High Performance, Safety critical MCU C D Concept Design S Sampling 4MB 3MB 2MB 2MB 1MB 768K 1.5MB 1MB HW Security Andorra 150MHz, z4 QFP176/BGA324 Leopard 120MHz, 2x z4 QFP100/144 Monaco 80MHz, z3 Qualified 6MB 4MB 2.5MB 2MB 1.5MB 1MB Eiger 180MHz, 3 x z4 QFP176/BGA292 KGD K2 160MHz, z4+z2 QFP144/176 KGD Lavaredo 80MHz, z2 QFP80/100 Bernina 200MHz, 3x z4 QFP176/BGA292 KGD Sphaero 140MHz, z4 QFP100/144 6MB 4MB D 1.5MB 1MB D 1MB 768K QFP144/176 Pictus 64MHz, 2x z0 512k 256k Velvety 80MHz, z0 QFP64/100 QFP100/ K 376K 192K Pictus 64MHz, z0 QFP64/100/144 Extended functionality and increased performance 2 nd Generation+ products recommended for new designs 1 st Generation 2 nd Generation

23 192K 256K 384K 512K 768K 1M 1.5M 2M 3M 4M High Performance - Safety Critical MCUs 24 Product Roadmap P, L lines Leopard - SPC56EL/4L Pictus - SPC560P up to 64 MHz Architecture e200z0h core 512KB Program Flash with ECC 4x16KB EEPROM Flash with ECC 40KB SRAM with ECC 2 x CAN 1 x FlexRay 2 x LINFlex 4 x SPI 2 x 10-bit ADC (S&H) Pictus - SPC56AP/0P SPC560P60 1MFlash / 80KRam SPC560P54 768KFlash / 64KRam Double Core SPC56AP60 1MFlash / 80KRam SPC56AP54 768KFlash / 64KRam SPC564L70 2MFlash / 192KRam SPC564L60 1MFlash / 128KRam SPC564L54 768kFlash / 96KRam SPC56EL70 2MFlash / 192KRam Dual Core Safety ASIL level D SPC56EL60 1MFlash / 128KRam SPC56EL54 768kFlash / 96KRam SPC560P50 512KFlash / 40KRam SPC560P44 384KFlash / 40KRam SPC560P40 256KFlash / 20KRam up to 64 MHz Architecture Single and Dual e200z0h core 1MB Program Flash with ECC 4x16KB EEPROM Flash w ECC 80KB SRAM with ECC 3 x CAN 1 x FlexRay 2 x LINFlex, 5 x SPI 2x 10 Bit ADC (S&H) up to 120MHz Architecture Single (4L) and Dual (EL) e200z4d core Lock Step and Decoupled Parallel modes 2MB RWW Flash with ECC 192KB SRAM with ECC EE emulation 3 x CAN, 1 x FlexRay, 2 x LINFlex, 3 x SPI 2 x 12-bit ADC (S&H) SPC560P34 192KFlash / 20KRam LQFP64 /LQFP100 64/100/144 PIN QFP 100/144/176 QFP LQFP100 / LQFP144 QFP176 /208 LQFP100 BGA256/ LQFP144

24 192K 256K 384K 512K 768K 1M 1.5M 2M 3M 4M High Performance - Safety Critical MCUs 25 Product Roadmap M, A lines Monaco - SPC563M Andorra - SPC564A e200z4d core (150MHz) 4MB RWW Flash with ECC 209KB SRAM with ECC 3x CAN 3x SCI 3x SPI FlexRay 2x 12-bit ADC (S&H) SPC564A80 4MFlash / 192K+17kRam SPC564A74 3MFlash / 160K+17kRam SPC564A70 2MFlash / 128K+17kRam SPC563M64 1.5MFlash/94K+17kRam SPC563M60 1MFlash/64K+17kRam e200z3 core (80MHz) 1.5MB RWW Flash with ECC 111KB SRAM with ECC 2x CAN 2x SCI 2x SPI 2x 12-bit ADC (S&H) LQFP144 / 64/100/144 LQFP176 PIN QFP 100/144/176 QFP LQFP176 QFP176 / PBGA324 /208 BGA256

25 2*DSPI 1* LINFlex 1* FlexCAN 2*eTimer 2*eTimer 1* FlexCAN 1* LINFlex 1*DSPI ASIL-D Velvety 0.5M SPC570S50 26 Superset Block Diagram Core Up to 80 MHz ISA e200z0 Core (VLE) ASILD SEooC I/O 2x FlexCAN with 32MB 2 x LINFlex 3x DSPI 4 x etimer (6ch each) ADC 1+1 x 12Bit, up to 16Ch. fast 10Bit conversion & supervisor ADC concept 1 x ADC cross triggering unit (CTU) Debug JTAG Nexus Qualified 16eDMA e200z0 VLE SWT STM Crossbar Switch Memory Protection Unit Memory 512k byte Flash with ECC 4x8k Data Flash with ECC (1 RWW partition) 48k SRAM with ECC Crossbar with MPU (8 regions) w. process ID support System 16ch edma (lockstep) CRC Unit (2Ch.) Fault Collection & Control Unit Software watchdog timer (inc. window mode, flow monitoring) Temperature Sensor 3.3V or 5Vsingle supply FM-PLL and 16MHz internal RC OSC Nexus Class 3 / JTAG (2 pin or 5 pin) / Trace Port (4MDO) 64/100 pins LQFP package epad -40 o C C Tj / 165 C Tj MEMU FMPLL IRC System / Platform Periph. Bridge CRC TSENS CTU 48K SRAM 1 * PIT 1* ADC superv. 512K 4x 8k TSENS Periph. Bridge FCCU Product / Application Specific Memory Connectivity

26 2*DSPI 2* LINFlex 2* MCAN 2*FlexPWM 2*eTimer 2*FlexPWM 2*eTimer 1* MCAN 2* LINFlex 2*DSPI ASIL-D Sphaero 1.5M SPC574S64 27 Superset Block Diagram Core Up to 140 MHz ISA e200z4 Core (VLE) Dual Issue Core with Floating Point Unit 12k (8k-Instruction, 4k-Data ) 32k TCM (32k d-ram) ASILD SEooC Memory 1.5Mbyte + 4x16k Flash with ECC (1 RWW ) 128k RAM with ECC (96k SRAM + TCM) Crossbar with MPU (16 regions) I/O 1 x FlexRay Dual Channel with 128MB (optional) 3x ISO CAN FD 4 x LINFlex (3x master only) 4 x DSPI 2 x SENT (2x3ch overall) 2 x FlexPWM (4x3ch each) + 2 x FlexPWM (2ch each) 4 x etimer (6ch each) ADC 2x (3+1)x 12Bit, 18/32/33Ch. (on QFP100/144/BGA) fast 10Bit conversion & supervisor ADC concept 2 x ADC enh d cross triggering unit (ectu) System 16Ch edma CRC Unit Fault Collection & Control Unit Software watchdog timer (inc. window mode, flow monitoring) 3.3V or 5V advanced supply (internal or external logic supply) FM-PLL, FlexRay PLL and 16MHz internal RC OSC Nexus Class 3+ / JTAG (2 pin or 5 pin) pins LQFP package (0.5mm pitch) -40 o C o C Tj Debug JTAG Nexus MEMU FMPLL IRC 1* SENT Qualified 1*FlexRay System / Platform 16eDMA Periph. Bridge CRC 8k-i TSENS ectu e200z4 VLE FPU CMPU Crossbar Switch Memory Protection Unit 96K SRAM 4k-d 1 * PIT superv. 1.5M 4x 16k PWM Synch. 3* ADC 32k-d TCM SWT STM 3* ADC superv. ectu Periph. Bridge FCCU 1* SENT Product / Application Specific Memory Connectivity

27 Lavaredo 1.5M SPC572L64 28 Superset Block Diagram Core 80 MHz ISA e200z2 Core (VLE) Floating Point Unit & LSP(DSP) I/O Generic Timer Module (Mid-End Version) 16 Inputs, 56 Outputs 2 x M-CAN 3 x LINFlex, 2 x DSPI including 1 x μsb 1 x Ethernet 4 x SENT 24 channel ADC 3 SAR ADC, 12-bit, TUE ±4LSB 1 Σ-Δ ADC with OSR x32-64 Decimation filters (4th ord. IIR or 8th ord. FIR with prog.coeff.) Qualified LFAST Debug JTAG Nexus IEEE-ISTO Ethernet 32eDMA STM SWT Crossbar Switch Memory Protection Unit Cont. e200z2 FPU VLE DSP RAM Cont. Memory 1.5M byte RWW Flash with ECC +2x16k Data Flash with ECC 64k RAM with ECC +19k SRAM on Timer Module +8k Overlay RAM System PLL MPU 16 Channel edma Controller 5 x PIT 1 x LFAST (Interprocessor bus) Nexus Class 3+ Designed for etqfp80, etqfp100 PLL 19k SRAM I/O Bridge GTM (Low-End Version) 3x 12b ADC 1.5M 32k Data 1x Σ-ΔADC 8k Overlay RAM 2x M-CAN 2x DSPI 1x µsb 64k S-RAM 3x LINFlex Tsens 4x SENT System Platform Memory Timer Peripherals

28 ASIL-D K2 2.5M SPC574K72 29 Superset Block Diagram Core 160 MHz ISA e200z4 Core (VLE) Floating Point Unit 4k-Instruction, 2k-Data 16k Local i-ram, 64k Local d- RAM 1x Lock Step configuration 80 MHz ISA e200z2 Core (VLE) Floating Point Unit & LSP(DSP) 16k Local i-ram, 48k Local d- RAM Memory 2.5M byte RWW Flash with ECC +4x16k Data Flash with ECC 176k RAM (64k SRAM, 112k Local d-ram) with ECC +26k SRAM on Timer Module +16k Overlay RAM I/O Generic Timer Module (Mid-End Version) 24 Inputs, 64 Outputs Dual Channel FlexRay (10MB/s), 128 buffers 3 x ISO CAN FD 4 x LINFlex, 5 x DSPI including 2 x μsb 1 x Ethernet, 1 x I2C 6 x SENT, 2 x PSI5 48 channel ADC 5 SAR ADC, 12-bit, TUE ±4LSB 2 Σ-Δ ADC with OSR x32-64 System FM-PLL MPU 32 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit (incl. error pin) 6 x PIT 1x LFAST (Interprocessor bus) Nexus Class 3+ EBI only for Calibration (High speed debug interface) Designed for etqfp144, elqfp176 e200z2 FMPLL 26k SRAM FPU VLE DSP I/O Bridge Qualified STM SWT I-RAM D-RAM LFAST Crossbar Switch Debug JTAG Nexus IEEE-ISTO Memory Protection Unit GTM (Mid-End Version) I/O Bridge Ethernet System Platform FlexRay 32eDMA 5x 12b ADC 2.5M 64k Data 2x Σ-ΔADC STM SWT I-RAM D-RAM Cont. 16k Overlay RAM 1xM-TTCAN e200z4 e200z4 4k-I/2k-D FPU VLE 2x M-CAN Crossbar Switch Memory Protection Unit MEMU 5x DSPI FCCU 2x µsb RAM Cont. 64k S-RAM 4x LINFlex Memory Timer Peripherals 1x I2C 2xTsens 2x CRC 6x SENT Cal Bus 2x PSI5

29 ASIL-D Eiger 6M SPC58NE84 30 Superset Block Diagram Core 2x 180 MHz ISA e200z4d Core (VLE) Dual Issue Core with Floating Point Unit 2x (8k-Instruction, 4k- Data ) 2x (16k Local i-ram, 64k Local d-ram) 1x Lock Step configuration 180 MHz ISA e200z4 Core (VLE) Dual Issue Core with Floating Point Unit & LSP(DSP) 8k-Instruction 16k Local i-ram, 32k Local d- RAM Memory 6M byte RWW Flash with ECC +4x64k+2x16k Data Flash with ECC 768k RAM (608k SRAM, 160k Local d-ram) with ECC +61k SRAM on Timer Module +32k Overlay RAM I/O Generic Timer Module (High-End Version) Dual Channel FlexRay (10MB/s), 128 buffers 7 x (FD)M-CAN, 1 x (FD)M-TTCAN 18 x LINFlex, 10 x DSPI including 2 x μsb 2 x Ethernet, 1 x I2C 15 x SENT, 2 x PSI5, 1 x PSI5-S 86 channel ADC 5 SAR ADC, 12-bit, 1.5us conversion time, TUE ±4LSB 3 SAR ADC, 10-bit, 1us conversion time, TUE ±2LSB 6 Σ-Δ ADC with OSR x32-64 System Security Module (HSM) FM-PLL MPU AMU 96 Channel edma Controller 2 x CRC Unit Fault Collection & Control Unit (incl. error pin) 8 x PIT 1x LFAST (Interprocessor bus) Nexus Class 3+ EBI only for Calibration (High speed debug interface) Designed for elqfp176, LFBGA292 and KGD e200z4 e200z4d FMPLL 61k SRAM 8k-I FPU VLE DSP I/O Bridge STM SWT I-RAM D-RAM HSM LFAST Crossbar Switch System Platform Debug JTAG Nexus IEEE-ISTO Memory Protection Unit RAM Cont. 320k S-RAM Available I/O Bridge Generic Timer Module (40 Inputs / 104 Outputs) Ethernet FlexRay 3x 10b ADC 64eDMA 64eDMA Cont. 16k Overlay RAM 5x 12b ADC 6M 256k Data 6x Σ-ΔADC STM SWT I-RAM D-RAM Cont. 16k Overlay RAM 1xM-TTCAN 7x M-CAN e200z4 e200z4d 8k-I/4k-D FPU VLE 10x DSPI 32eDMA 32eDMA Crossbar Switch Memory Protection Unit MEMU FCCU 2x µsb Memory Timer Peripherals e200z4d 8k-I/4k-D 18x LINFlex FPU VLE RAM Cont. 288k S-RAM 1x I2C Tsens 15x SENT STM SWT I-RAM D-RAM 2x CRC Cal Bus 3x PSI5

30 Please find more SPC5 information from ST Website