Reflow Techniques for Void Reduction BTC Void Reduction For Yield and Performance Enhancement. Dave Heller CEO, Heller Industries September 29, 2016

Transcription

1 Reflow Techiques for Void Reductio BTC Void Reductio For Yield ad Performace Ehacemet Dave Heller CEO, Heller Idustries September 29, 2016

2 Elimiate Voids Improve Performace Improve heat dissipatio of compoets or solder joit structures (i.e., curret desity icreases with voidig) Improve log-term stability ad reliability of solder joit agaist heat dissipatio ad vibratio/shock May improve chip performace i high frequecy applicatios

3 Void Reductio Reflow Techique 1 Vacuum assisted reflow

4 Vacuum Assisted Reflow Vacuum-assisted reflow has bee show to reduce the voids i a solder joit by 99% Pressure is dropped to 5-20 Torr durig liquidus of the solderig process Existig voids escape exterally through the solder whe vacuum is applied. Trapped gas bubbles icrease i size as pressure is reduced Larger bubbles are more likely to collide with other bubbles ad ultimately collide with the edge of liquid solder to escape Larger bubbles are accelerated by stroger buoyacy forces makig them more likely to escape

5 Vacuum Assisted Reflow Stadard Reflow Vacuum Assisted Reflow Prited Solder Paste Reflow Liquid Solder Reflow Vacuum Coolig Solid Solder Pressure iside trapped gas bubble chages accordig to YougLaplace Equatio Pbubble = Pambiet + 2g / r (where g is surface tesio ad r is the radius of the bubble) Bubble size is the determied by ideal gas law usig Pbubble

6 Covectio Reflow with Vacuum Module Heller Idustries has developed a vacuum module that iserts directly i its reflow ove lie Vacuum module is iserted i zoe directly after reflow peak (liquidus) has occurred Vacuum module icorporates IR heatig to allow for liquidus after vacuum is achieved Covectio reflow with vacuum module is cotiuous ad allows thermal profiles to be directly ported from o-vacuum reflow applicatios Cotiuous operatio facilitates low COO ad high UPH

7 Ilie Vacuum Reflow System

8 Ilie Vacuum Reflow System - Layout Heat Zoes Stagig Coveyors Vacuum Chamber Coolig Zoes

9 Reflow Profile with Vacuum

10 Vacuum Assisted Reflow Customer Test March 10, 2013

11 Test Coditios Sample # Vacuum Level [torr] Dwell Time [sec] Oxyge [PPM] Atmospheric ** Should be 60 secods but mistakely set to 120secods. Die size = 7, 10mm square Liquidus peak = 250oC Alloy type SAC 305 (217oC Melt Poit) Remark **

12 Test Results Void Ratio(Worst Case), [%] Sample Vacuum Level [torr] Dwell Time [sec] Worst Case [%] Atmospheric

13 Test #7 Details-No Vacuum

14 Test #1 w/ 5 Torr for 30 secods 0.21% worst case voids

15 Results Stecil Desig #2 1. QFN MLF 100 of With Vacuum & Without Vacuum # Type 2 # without Vacuum # with Vacuum ( 5torr 60sec )

16 Results ENIG ( 20torr / 30sec ) Object Cout Object Area Total Area Total Area Ratio AOI Area AOI Area Ratio ENIG ( 20torr / 60 sec ) % % Object Cout Object Area Total Area Total Area Ratio AOI Area AOI Area Ratio % %

17 Vacuum Reflow Devoidig Summary Heller Idustries ow offers vacuum-assisted reflow through the iclusio of a vacuum module i its reflow ove lie Vacuum-assisted reflow with covectio heatig utilizes cotiuous operatio thermal profiles for low COO ad high UPH. Heller Idustries utilizes advaced pumpig package with high capacity for fast pump-dow time. Recet customer demostratio showed 10X reductio i voids, meetig spec of <1% total void area Reflow time uder vacuum of 15 secods was able to achieve <1% total void area spec. All pressures tested < 20 Torr met <1% total void area spec

18 Void Reductio Reflow Techique 2 Ultrasoics VOID reducig reflow

19 Overview Heller Idustries is workig o solder devoidig solutio that utilizes ultrasoics applicatio to prited circuit board durig solder reflow Ultrasoics are applied whe solder is i liquid state Cavitatio (i theory) works to i. Stretch voids/bubbles so they combie with other voids ad touch outer surface of solder to devoid ii. Shocks bubbles durig compressio so that bubbles break i to umerous very small bubbles Ultrasoics also creates movemet ad mixig of bubbles which ehaces coalescece ad subsequet elimiatio

20 Ultrasoics Statio i Covectio Ove Ultrasoics Statio

21 Ultrasoics Test Reflow Profile Sample # 4 vibratio duratio (s) 10 Soak time (s) (160<T<180) 60 time above meltig poit (s) Maximum temperature Total time T>217 C ( c) (s) Ultrasoics ON for 10 sec

22 Void Results No Ultrasoics Sample # 1 vibratio duratio (s) 0 Soak time (s) (160<T<180) 50 3 Total void% =25.18 Largest void% =4.14 time above meltig poit (s) Maximum temperature Total time T>217 C ( c) (s) Total void% =13.16 Largest void% = Total void% =14.03 Largest void% =2.08

23 Void Results Ultrasoics ON for 10 sec Sample # 3 vibratio duratio (s) 10 Soak time (s) (160<T<180) 46 3 Total void% =4.26 Largest void% =0.15 time above meltig poit (s) Maximum temperature Total time T>217 C ( c) (s) Total void% =3.77 Largest void% = Total void% =4.53 Largest void% =0.58

24 Ultrasoics Devoidig Reflow Summary Ultrasoics applied to PCB s after solder liquidus has demostrated sigificat reductio i voids both size ad total percet Ultrasoics are applied to PCB s at very low levels ad for very short duratios i.e., 10 sec ad micros of displacemet. Heller Idustries is curretly egieerig ultrasoics coupler statios ito its covectio reflow oves to facilitate solder