Timing Generation and Measurements

Transcription

1 Timing Generation and Measurements Lab #7 Robert McManus & Junsang Cho April 2, 2004

2 Timing Generation and Measurements 1. Objective To gain experience using input capture to measure pulse width. To gain experience using output compare to do width modulation 2. Tasks a. Write assembly code for a program that measures pulse width. Each time the pulse width changes, it should transmit the measurement out the serial port. b. Write assembly code for a program that reads a desired pulse width in number of cycles from the keypad terminated with a # sign. After receiving the # sign, it should output a signal with this pulse width. The main program should be able to accept a new pulse width on the keypad at any time. 3. Test Procedures a. Use a frequency generator to test our pulse width measurement code. b. Use an oscilloscope to test your pulse width modulation code. c. Connect our circuit with the pulse width measurement code loaded to another group circuit with the pulse width modulation code loaded, and check the result. d. Swap codes and check again. 4. Hardware

3 5. Write up The assembly code is attached at the end of this report. 6. Conclusion The lab ended up being several in terms of the amount of coding that was done. Although there was code from Lab2 and Lab5 that could be used, most of it had to be rewritten due to size constraints on the chip and because of incompatibility of the modules. In the construction of the receiver we encountered only one critical problem. Whenever we attempted to send data from the port the chip would freeze. Initially, we simply made a gadly loop that would output the character and return when the character was sent. We assume that the complication was due to some incompatibility of the input capture interrupts and the simple serial output. To resolve this we converted the serial output to a serial interrupt method with a queue system. This prevented the chip from crashing, but would output corrupted data. We realized the issue was with the queue and also with the interference from the input interrupts. After debugging the queue and turning off the interrupts while in the serial interrupt, the program worked flawlessly. The sender had to be coded from scratch for room and because of special characters. A converter module was created to read the input and translate it to a hexadecimal value for output. Programming of the code itself was quick and easy; however, debugging was a nightmare. The program would accept inputs and would output a proper wave response, but only for a split second. We finally got it working by placing a delay function near the end of the output to check the chip step by step. After the placement of the delay function, the program worked flawlessly. We suspect that during the release of the keypad, there is a debouncing issue that triggers the output again with a value of 0. The curious thing however is that we have a debouncing routine built into the input which works for all other keys. Overall, the design of the program was quite challenge and rewarding when it was finally completed.

4 7. Assembly Code This is made by Junsang Cho and Robert McManus on April 2,2004 ECE3720 Lab#7 PulseWidth to serial communication PortA EQU $1000 ;Address for port A PortB EQU $1004 ;Address for port B PortC EQU $1003 ;Port C for input from keypad: PC7-PC0 PortE EQU $100A PACTL EQU $1026 ;Port A control reg. DDRC EQU $1007 TCNT EQU $100E ;Internal counter clock TMSK1 EQU $1022 TMSK2 EQU $1024 TFLG1 EQU $1023 TIC1 EQU $1010 TIC3 EQU $1014 TCTL1 EQU $1020 TCTL2 EQU $1021 BAUD EQU $102B SCCR1 EQU $102C SCCR2 EQU $102D SCSR EQU $102E SCDR EQU $102F LINE_FEED EQU $0A FifoSize EQU 10 Public variables:: org $0100 tx1 rmb 1 tx2 rmb 1 temp rmb 1 ttemp rmb 1 PWidth rmb 2 ;Current Pulse Width OPWidth rmb 2 ;Old Pulse Width

5 Ulimit rmb 2 Llimit rmb 2 NewValue rmb 1 PutPt rmb 2 ;Pointer of where to put next GetPt rmb 2 ;Pointer of where to get next Fifo rmb FifoSize ;The statically allocated fifo data Size rmb 1 ;size of Fifo Interrupt Tables:: ORG $B600 Vector for interrupt PG226 ldaa #$7E ;handler table for SCIhdlr handler staa $00C4 ldx #SCIhdlr stx $00C5 ldaa #$7E ;handler table for IC1I handler staa $00E8 ldx #IC1 stx $00E9 ldaa #$7E ;handler table for IC3I handler staa $00E2 ldx #IC3 stx $00E3 Initialize all necessary resources. ldaa #$00 ;Sets TCNT to 500ns per cycle staa TMSK2 ldaa #$00 ;Change port A to input staa PACTL ldaa #$00 staa TCTL1 Set so that IC1 is triggered on rising edge, and IC2 is triggered on falling ldaa #$12 staa TCTL2 ;Note: Both IC1 and IC2 share the same input wire.

6 ldd #$0500 ;Default value stored into PWidth std PWidth std OPWidth ldaa #$30 ;set 9600 baud staa BAUD ldaa #$00 ;mode staa SCCR1 ldaa #$08 ;Arm TE ( disable Transmit ) staa SCCR2 Test ;Led test Init Main Function - Main ldd OPWidth addd #$0005 std Ulimit ldd OPWidth subd #$0005 std Llimit ldd cpd bge ldd cpd ble bra PWidth Ulimit OUTPUT PWidth Llimit OUTPUT Main TEST:: Turn on all LEDs Test ldaa #$FF staa PortB Wait Wait Wait Init:: Initialize Fifo and interrupt registers

7 Init clra clrb InitFifo ldaa #$04 ;arm IC1I = 1 staa TMSK1 ldaa staa #$04 Clears TFLG1 Flag, initializes input interrupts. TFLG1 cli Interrupt Handler:: Interrupt sub-routines This interrupt is triggered upon a rising edge on the input. Clears input interrupt flag IC1F IC1 ldaa #$01 staa PortB ldaa #$1 ;arm IC3I = 1 staa TMSK1 ldaa #$1 ;clear IC3F staa TFLG1 rti This interrupt is triggered upon a falling edge on the input. IC3 ldaa #$02 staa PortB equal ldd TIC1 cpd TIC3 blt SKIP ldd #$FFFF In the advent of an overflow, TIC1 will be greater than TIC3 subd TIC1 To compensate, we calculate the time difference by subtracting addd #$0001 TIC1 from #$10000, however, since that is larger than 16 bits addd TIC3 we do the subraction to #$FFFF and add the #$0001 later to make it std PWidth to #$10000, TIC3 is then added and the right PWidth difference is found. bra RETURN Note, this does not support PulseWidths greater than SKIP ldd TIC3 subd TIC1 std PWidth

8 RETURN ldaa #$04 ;arm IC1I = 1 staa TMSK1 ldaa #$4 ;clear IC1F staa TFLG1 rti ISR for Serial communication port SCIhdlr ldaa #$00 ;disable IC1I & IC3I staa TMSK1 ldab stab #$F PortB ldab SCSR ;Status bitb #$80 ;tdre? beq SCIhdlr ldx #temp GetFifo ldaa temp staa SCDR ldaa Size cmpa #$0 bne Done Done ldaa #$08 ;Remove the arming bit of TIE ( disable Transmit ) staa SCCR2 ldaa #$1 ;arm IC3I = 1 staa TMSK1 rti Output:: Loads PWidth and sends the two bytes out to the serial port. May need to do a conversion to ASCII codes Doesn't need to measure while it's outputting. OUTPUT ldaa #$04 staa PortB ldd std staa lsra lsra Wait PWidth OPWidth tx2

9 lsra lsra anda staa ldab ldab andb ldd stab lsrb lsrb lsrb lsrb andb ldab andb ldaa #$0F tx1 tx1 CVRT PutFifo tx2 #$0F CVRT PutFifo OPWidth tx2 #$0F CVRT PutFifo tx2 #$0F CVRT PutFifo LINE_FEED PutFifo ldaa #$88 ;Arm TIE & TE ( enable Transmit ) staa SCCR2 ;enable SCI ldd std jmp PWidth OPWidth Main Convert table:: Input - RegB CVRT cmpb #$09 bgt ALPHA addb #$30 stab temp ldaa temp

10 ALPHA addb #$37 stab temp ldaa temp Wait ldx #$FFFF ;Delay value. Delay dex ;X = X - 1 bne Delay DEBNC ldd #5712 ;wait for 20ms addd TCNT ;time at the end of delay Loop cpd TCNT ;wait for (Endt - TCNT) > 0 bpl Loop FIFO Init function - Initialization of a two pointer FIFO. input:: No parameters output:: application is quit. FIFO is empty if PutPt = GetPt FIFO is full if PutPt+1 = GetPt (with wrap) InitFifo ldx #Fifo tpa sei ;make atomic, entering critical section stx PutPt stx GetPt ;Empty when PutPt=GetPt clrb ;reset the size varialbe stab Size tap ;end critical section, restore CCR FIFO PutFifo function - put a byte into the FiFo Input :: RegA contains 8 bit data to put Output:: RegA is -1 if successful, 0 if data not stored

11 PutFifo psha tpa tab pula pshb ;save old CCR sei ;make atomic, entering critical section ldx PutPt ;RegX is Temporary put pointer staa 0,x ;Try to put data into fifo inx ;x++ cpx #Fifo+FifoSize bne PutNoWrap1 ;skip if no wrapping needed ldx #Fifo ;Wrap PutNoWrap1 clra ;assume it will fail cpx GetPt ;Full if now the same beq PutDone1 coma ;RegA=-1 means OK stx PutPt ldab Size ;RxSize++ incb stab Size PutDone1 tab ;end critical section pula tap ;restore CCR to previous value tba FIFO GetFifo function - Get a byte from the FiFo Input :: RegX points to place for 8 bit data from Get Output:: RegA is -1 if successful, 0 if Fifo was empty when called. Return a byte in RegX GetFifo tpa psha ;save old CCR sei ;make atomic, entering critical section clra ;assume it will fail ldy GetPt cpy PutPt ;Empty if initially the same beq GetDone1 coma ;RegA=-1 means OK ldab 0,y ;Data from FIFO stab 0,x ;Return by reference

12 ldab Size ;RxSize-- decb stab Size iny cpy #Fifo+FifoSize bne GetNoWrap1 ;skip if no wrapping needed ldy #Fifo ;Wrap GetNoWrap1 sty GetPt GetDone1 tab ;end critical section pula tap ;restore CCR to previous value tba ;Transfer from B to A

13 This is made by Junsang Cho and Robert McManus on March. 28,2004 ECE3720 Lab#7 Keypad to pulse modulation PortA EQU $1000 ; Address for port A PortB EQU $1004 ; Address for port B PortC EQU $1003 ;Port C for input from keypad: PC7-PC0 PortE EQU $100A PACTL EQU $1026 ; Port A control reg. DDRC EQU $1007 TCNT EQU $100E ;Internal counter clock PIOC EQU $1002 FifoSize EQU 20 Output Compare Pg 320 TOC2 EQU $1018 ; OC2F set when TOC2=TCNT (Also runs interrupt) TMSK1 EQU $1022 TMSK2 EQU $1024 TFLG1 EQU $1023 OC1M EQU $100C ; Port A alternate function reg.s OC1D EQU $100D TCTL1 EQU $1020 org $0100 PutPt RMB 2 ;Pointer of where to put next GetPt RMB 2 ;Pointer of where to get next Fifo RMB FifoSize ;The statically allocated fifo data Value rmb 1 QCOUNT rmb 1 NewValue rmb 1

14 PWidth rmb 2 CurrentValue rmb 2 TempV rmb 2 Key rmb 2 Oldkey rmb 2 Main Function - ORG $B600 ldaa #$00 staa TMSK2 Vector for interrupt ldaa #$7E staa $00DC ldx #OC2 stx $00DD ; JUMP to OC2 ldaa #$FF ; Change port A to output staa PACTL clra staa DDRC ; All pins on Port C are input ldaa #$40 Sets OC2 interrupt on. Connects to PA6 staa TMSK1 ldaa #$40 staa TCTL1 Sets it so that everytime the OC2 interrupt is hit, it toggles ldd std #$03E8 Test value stored for pulse width PWidth ldd TCNT TOC2=TCNT+PWidth addd PWidth std TOC2

15 clra clrb staa staa OC1M OC1D Turns off OC1 InitFifo Init clra clrb std std std staa QCOUNT Key Oldkey CurrentValue ldaa #$40 Clears TFLG1 Flag staa TFLG1 cli Main KEYIN ldd Key cpd #$0000 bne Main2 ldd #$0000 std Oldkey bra Main2 bra Main LOADQ Main This module is activated everytime TOC2=TCNT OC2 ldd TCNT TOC2=TCNT+PWidth addd PWidth std TOC2 ldaa #$40 Clears TFLG1 Flag staa TFLG1 rti

16 This module will use the modules KEYIN and CONVERT and place a value into the Queue if the key read is not the same key that was read before. Note: This does not support rollovers. LOADQ DEBNC Debounces for 20 ms ldx cpx beq KEYIN Key Oldkey RETURN cpx #$0000 beq RETURN CONVERT ldaa Value Send Value into Queue cmpa #$0B Checking for Pound Sign bne Next Jumps to GETT to set pulse width GETT Next cmpa #$0C Resets value typed in so far if input is beq Init ldx stx Key Oldkey ldaa Value Send Value into Queue PutFifo ldaa QCOUNT Loads Count and increments by 1 inca staa QCOUNT staa PortB RETURN This module reads the contents of the queue and conve the stored values in the queue into the pulse width GETT ldad #$0000

17 std CurrentValue GETT2 ldd CurrentValue Multiply by 10 std TempV lsld Multiply by 8 lsld lsld std CurrentValue ldd TempV Mulitiply by 2 lsld std TempV addd CurrentValue Add to multiply by 10 std CurrentValue End of multiply by 10 ldx #NewValue GetFifo ldaa #$00 ldab NewValue addd std CurrentValue CurrentValue Assumption that value will never be greater than 16 bits ldaa QCOUNT Goes through Queue. deca staa QCOUNT cmpa #$00 bne GETT2 ldd CurrentValue std PWidth stab PortB Wait For some reason...this makes it work. jmp Init Without this, the program will eventually freeze and report wrong data. This module will read the keyboard and return a value into Key Keys pressed on the board return a 0 when pressed, thus the po are inverted here to produce a 1. KEYIN ldaa PortE ldab PortC eora #$0F Inve the bits of input.

18 anda eorb stad #$0F #$FF Key Port E contains 741 and Port C will contain 0852#963 This will be inputted into a variable called key key will be a 16 bit variable and will correspond by the following table Look up table code This module will take the value of Key and convert it into a hexidecimal value The results will be returned in the variable Value [][][][][][7][4][1][0][8][5][2][#][9][6][3] # is designated by 11 is designated by a 12 CONVERT ldx Key ldaa #$00 cpx #$0001 See if key is 3 bne CH1 ldaa #$03 CH1 cpx #$0002 See if key is 6 bne CH2 ldaa #$06 CH2 cpx #$0004 See if key is 9 bne CH3 ldaa #$09 CH3 cpx #$0008 See if key is # bne CH4 ldaa #$0B CH4 cpx #$0010 See if key is 2 bne CH5 ldaa #$02

19 CH5 cpx #$0020 See if key is 5 bne CH6 ldaa #$05 CH6 cpx #$0040 See if key is 8 bne CH7 ldaa #$08 CH7 cpx #$0080 See if key is 0 bne CH8 ldaa #$00 CH8 cpx #$0100 See if key is 1 bne CH9 ldaa #$01 CH9 cpx #$0200 See if key is 4 bne CH10 ldaa #$04 CH10 cpx #$0400 See if key is 7 bne CH11 ldaa #$07 CH11 cpx #$0800 See if key is bne DONE ldaa #$0C DONE staa Value Wait ldx #$FFFF ; Delay value. Delay dex ; X = X - 1 bne Delay FIFO Init function - Initialization of a two pointer FIFO. input:: No parameters output:: application is quit. FIFO is empty if PutPt = GetPt FIFO is full if PutPt+1 = GetPt (with wrap) InitFifo

20 ldx tpa sei stx stx tap #Fifo ;make atomic, entering critical section PutPt GetPt ;Empty when PutPt=GetPt ;end critical section, restore CCR FIFO PutFifo function - put a byte into the FiFo Input :: RegA contains 8 bit data to put Output:: RegA is -1 if successful, 0 if data not stored PutFifo psha tpa tab pula pshb ;save old CCR sei ;make atomic, entering critical section ldx PutPt ;RegX is Temporary put pointer staa 0,x ;Try to put data into fifo inx cpx #Fifo+FifoSize bne PutNoWrap ;skip if no wrapping needed ldx #Fifo ;Wrap PutNoWrap clra ;assume it will fail cpx GetPt ;Full if now the same beq PutDone coma ;RegA=-1 means OK stx PutPt PutDone tab ;end critical section pula tap ;restore CCR to previous value tba FIFO GetFifo function - Get a byte from the FiFo Input :: RegX points to place for 8 bit data from Get Output:: RegA is -1 if successful, 0 if Fifo was empty when called

21 GetFifo tpa psha sei clra ldy GetPt cpy PutPt beq GetDone coma ldab 0,y stab 0,x iny ;save old CCR ;make atomic, entering critical section ;assume it will fail ;Empty if initially the same ;RegA=-1 means OK ;Data from FIFO ;Return by reference cpy #Fifo+FifoSize bne GetNoWrap ;skip if no wrapping needed ldy #Fifo ;Wrap GetNoWrap sty GetPt GetDone tab ;end critical section pula tap ;restore CCR to previous value tba ;Transfer from B to A DEBNC ldd #5712 ;wait for 20ms addd TCNT ;time at the end of delay Loop cpd TCNT ;wait for (Endt - TCNT) > 0 bpl Loop