EE319 K Lecture 3. Introduction to the 9S12 Lab 1 Discussion Using the TExaS simulator. University of Texas ECE

Transcription

1 EE319 K Lecture 3 Introduction to the 9S12 Lab 1 Discussion Using the TExaS simulator University of Texas ECE

2 Introduction (von Neumann architecture) processor Bus Memory Mapped I/O System Input Devices Input Signals RAM ROM Output Devices Output Signals 9S12C32 MC68HC812A4 I/O $0000 to $03FF I/O $0000 to $01FF Ports AD, M, S, T Ports A,B,C,D,E,F,H,J,S,T,AD 2K RAM $3800 to $3FFF 1K RAM $0800 to $0BFF 32K ROM $4000 to $7FFF 4K ROM $F000 to $FFFF $8000 to $FFFF

3 Harvard Architecture Intel x86 processor Memory Control Isolated I/O System I/O Control IOR, IOW Input Devices Input Signals RAM MEMR, MEMW ROM Output Devices Address, Data Output Signals Memory mapped ldaa 0 staa M staa 1 I/O Mapped in al,0 mov M,al out 1,al input port save in memory output port

4 Architecture terms bus address where or which module data what control when and direction processor RAM data ROM CPU Read Cycle input devices output devices Bus input signals output signals processor RAM ROM data CPU Write Cycle input devices output devices Bus input signals output signals

5 9S12 architecture processor registers CCR A:B X Y SP PC bus interface unit EAR control unit IR ALU control address data The bus interface unit (BIU) reads data from the bus during a read cycle, writes data onto the bus during a write cycle. always drives the address bus and the control signals effective address register (EAR) contains the data address The control unit (CU) orchestrates the sequence of operations issues commands to ALU, BIU instruction register (IR) contains the op code

6 9S12 architrecture The registers high-speed storage devices located in the processor do not have addresses like regular memory specific functions explicitly defined by the instruction Accumulators contain data (A, B, D) Index registers contain addresses (X, Y) Program counter (PC) points to instruction to execute next Stack pointer (SP) points to the top element on the stack context switch when calling and returning from a function pass parameters save temporary information implement local variables

7 Condition code register (CCR) the status of the previous 7 0 operation S X H I N Z V C CC 15 Register A 8 Register B 8 bit condition code D two 8 bit accumulators X 16 bit index register Y 16 bit index register SP 16 bit stack pointer PC 16 bit program counter CC S X H I N Z V C Carry/borrow or unsigned overflow Signed overflow Zero Negative IRQ Interrupt Mask Half Carry from bit 3 XIRQ Interrupt Mask Stop disable

8 9S12 architecture The arithmetic logic unit (ALU) Arithmetic operations Addition Subtraction Multiplication Division Logic operations And Or Exclusive or Shift The simplified execution has five phases: Phase Function R/W Address Comment 1 Op code fetch read PC++ Put data into IR, 2 Operand fetch read PC++ Immediate or calculate EA 3 Data read read SP,EAR Data passes through ALU, 4 Free cycle read PC/SP/$FFFF ALU operations, set CCR 5 Data store write SP,EAR Results stored in memory

9 Lab 1. Logic Function The specific function you will implement is T M & A This means the LED will be on if and only if the M switch is pressed and the A switch is not pressed, as shown below

10 Lab 1 void main(void){ ATD0DIEN = 0xFF; // make Port AD0 digital input DDRM = 0x00; // make Port M an input, PM2 is M DDRT = 0xFF; // make Port T an output, PT2 is T while(1){ PTT = (~PORTAD0)&PTM; // LED on iff PAD2=0 and PM2=1 } } The first C program to illustrate Lab 1. ;****************** Lab1.RTF *************** ; Program written by: Your Name ; Date Created: 8/19/2007 6:34:15 PM ; Last Modified: 8/19/2007 6:34:19 PM ; Section 1-2pm TA: Robin Tsang ; Lab number: 1 ; Brief description of the program ; The overall objective of this system is a digital lock ; Hardware connections ; PM2 is switch input M ; PAD2 is switch input A ; PT2 is LED output T (on means unlocked) ; The specific operation of this system ; unlock if A is not pressed and M is pressed ;I/O port definitions ATDDIEN equ $008D ; ATD Input Enable Mask Register PTM equ $0250 ; Port M I/O Register PTAD equ $0270 ; Port AD I/O Register on the 9S12C32 PORTAD0 equ $008F ; Port AD I/O Register on the 9S12DP512 PTT equ $0240 ; Port T I/O Register DDRM equ $0252 ; Port M Data Direction Register DDRAD equ $0272 ; Port AD Data Direction Register (skip this on the 9S12DP512) DDRT equ $0242 ; Port T Data Direction Register org $3800 ; RAM ($0800 if 9S12DP512) ; Global variables (none required for this lab) org $4000 ; flash EEPROM main ldaa #$04 staa DDRT ; PT2 is output to LED T staa ATDDIEN ; PAD2 is input from switch A ldaa #$00 staa DDRM ; PM2 is input from switch M staa DDRAD ; skip this on DP512 loop ldaa PTAD eora #$04 ; bit 2 is ~A anda PTM ; bit 2 is (~A)&M staa PTT ; output bit 2 to PT2 bra loop org $FFFE fdb main ;Starting address

11 TExaS Editor Source code PORTA equ $0000 DDRA equ $0002 org $0800 cnt rmb 2 org $F000 main lds #$0C00 movb #$80,DDRA off bclr PORTA,#$80 look ldd #4444 std cnt loop ldaa PORTA anda #$7F cmpa key bne off ldx cnt dex stx cnt bne loop bset PORTA,#$80 bra look key fcb % org $FFFE fdb main Assembler TExaS Object code $F000 CF0C00 $F B $F008 4D0080 $F00B CC115C $F00E 7C0800 $F $F F $F015 B1F028 $F018 26EE $F01A FE0800 $F01D 09 $F01E 7E0800 $F021 26EE $F023 4C0080 $F026 20E3 $F $FFFE F000 Loader Simulated Microcomputer processor RAM ROM I/O Simulated External circuits and devices

12 TExaS A1.5. Tutorial A1. Getting started The purpose of this tutorial is to introduce the first time user to TExaS. 1) how to launch the simulator, 2) how to modify input switches, 3) how to edit, assemble, and run a 9S12 program, 4) how to modify display format in the ViewBox, 5) how to move and resize windows, 6) how to get on-line help. visualize four places information can be stored on a computer. 1) external switches are input devices that hold information, 2) registers are high-speed temporary storage inside the processor, 3) global variables can hold information that is easy to access, 4) external LEDs are output devices that hold information.