Minimization of NBTI Performance Degradation Using Internal Node Control
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1 Minimization of NBTI Performance Degradation Using Internal Node Control David R. Bild, Gregory E. Bok, and Robert P. Dick Department of EECS Nico Trading University of Michigan 3 S. Wacker Drive, Suite 900 Ann Arbor, MI 4809, USA Chicago, IL 60606, USA This work was performed while the authors were with the Department of Electrical Engineering and Computer Science, Northwestern University, Evanston IL 60208, USA. April 2, 2009
2 Outline Introduction. Introduction 2. NBTI Internal Node Control 3. MILP 4. Algorithm 2 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
3 Outline Introduction. Introduction D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
4 What is NBTI Introduction Negative Bias Temperature Instability Breakdown of Si H bonds which leads to increased threshold voltage Reduction in transconductance and thus switching speed Significant for PMOS transistors under negative bias Partially recovers when negative bias is removed 4 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
5 Contributions Introduction Internal Node Control Input Vector Control (IVC) control the primary inputs Internal Node Control (INC) extend control to internal nodes Contributions Analyzed the potential benefit of using INC to reduce static NBTI degradation Results Developed a fast, near-optimal heuristic for the application of INC INC Average 26.7% improvement relative to IVC only INC+IVC Average 5.3% decrease in NBTI-induced delay 5 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
6 Outline Introduction NBTI Internal Node Control. Introduction D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
7 Section outline Introduction NBTI Internal Node Control 2. NBTI Internal Node Control 7 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
8 Physical Process Introduction NBTI Internal Node Control Reaction-Diffusion Model Reaction: Electric-field dependent disassociation of Si-H bonds at Si/SiO 2 interface Creation of interface traps, dangling bonds, oxide charges Diffusion: H or H 2 diffuses into the oxide Recovery Effect Stress is removed Hydrogen diffuses back towards the interface Re-bonds with Si 8 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
9 Analytical Models Introduction NBTI Internal Node Control Types of Stress Static: Continuously applied stress (e.g., idle functional unit) Dynamic: Alternating stress and recovery (e.g., operating functional unit) Models Cycle-based, transistor-level simulation is too slow Analytical models have been developed Overestimate degradation for static stress Our Model Aggregate, long-term effect of static stress Assume 0% increase in delay after 0 years (Paul et. al) 9 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
10 Managing NBTI Introduction NBTI Internal Node Control Compensating Techniques Guardbanding Gate sizing V dd tuning V th tuning Mitigating Techniques Power gating Clock gating Input Vector Control (IVC) 0 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
11 Input Vector Control Introduction NBTI Internal Node Control Wang et al. in DATE 2006 In sleep mode, set the primary inputs to minimize the impact on circuit delay Implement with MUXes, scan-chains, or modified registers Con: Limited effectiveness on deeper levels of logic Example Sleep PI PI2 PI3 0 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
12 Section outline Introduction NBTI Internal Node Control 2. NBTI Internal Node Control 2 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
13 INC Implementation Introduction NBTI Internal Node Control Power Minimization Proposed by Abdollahi, Fallah, and Pedram Add INC to some internal gates Force the output value with sleep signal INC Implementation Pull Up in Pull Down out sleep in Pull Up Pull Down out sleep 3 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
14 Potential for NBTI Introduction NBTI Internal Node Control Inverting Logic All inputs high leads to low output Would have to force all outputs high to eliminate all stress Focus on critical path transistors instead NOR Gate Stack Vdd Vdd Vss Stressed Vdd Not Stressed Vdd Vth Vss Stressed Vss Not Stressed out out Pull Down Pull Down 4 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
15 Introduction Example Insertion Scenario I NBTI Internal Node Control Inline 0 0 INC Insertion 0 0 INC 5 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
16 Introduction Example Insertion Scenario II NBTI Internal Node Control NOR Stack 0 0 INC Insertion 0 0 INC 6 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
17 Introduction Example Insertion Scenario III NBTI Internal Node Control Offpath INC Insertion 0 0 INC D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
18 Introduction Formal Problem Definition NBTI Internal Node Control Given A combinational circuit For each gate, the basic delay, INC delay, and NBTI delay Find Input vector INC insertion points Such That The critical path delay (post-nbti) is minimized 8 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
19 Complexity Introduction NBTI Internal Node Control N P-complete The problem is in N P by polynomial-time checking Prove N P-hard via reduction from circuit-sat Circuit-SAT Reduction Circuit Gadget 9 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
20 Outline Introduction MILP. Introduction D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
21 Section outline Introduction MILP 3. MILP 2 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
22 Introduction MILP MILP MILP formulation Solved using Symphony open-source solver Gate Library 7 gate library in 65 nm Characterized timing (for INC and non-inc) using SPICE Verified against TSMC library Benchmarks ISCAS85 benchmarks Synthesized using Synopsys Design Compiler 22 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
23 Section outline Introduction MILP 3. MILP 23 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
24 Introduction Optimal I MILP 00 Percent Improvement in Delay 80 % Decrease in Delay c432 c499 c880 c355 c908 c2670 c3540 c D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
25 Introduction Optimal II MILP Summary 26.7% average improvement relative to optimal IVC 5.3% average improvement relative to average IVC 25 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
26 Outline Introduction Algorithm. Introduction D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
27 Section outline Introduction Algorithm 4. Algorithm 27 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
28 Motivation Introduction Algorithm Complexity Problem is N P-hard For small benchmarks, can only generate upper and lower bounds on optimal Overview Linear-time Tree-partitioning and dynamic programming Based on work by Cheng, Chen, and Wong 28 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
29 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
30 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
31 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
32 Dangling Inputs Introduction Algorithm Tree 0 DAG Circuit Key: Primary Input Tree Dangling Input 30 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
33 Partitioning Introduction Algorithm Partitioning for Other Problems Proposed for other problems (e.g., leakage power minimization, tech mapping) Additive cost function in these cases Maintain large partitions Partitioning for INC Maximum cost function Maintain critical path in a single partition Keep connections with lowest slack 3 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
34 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
35 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
36 Dangling Inputs Introduction Algorithm Tree 0 DAG Circuit Key: Primary Input Tree Dangling Input 33 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
37 Initial Assignment Introduction Algorithm Initial Assignment Apply dynamic programming algorithm to the full DAG circuit When conflicting assignments occur, choose the majority Choose when ties occur 34 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
38 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
39 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
40 Introduction Dynamic Programming Algorithm Forward Pass Compute input combination and INC state with 0 output and minimal arrival time Compute input combination and INC state with output and minimal arrival time Backward Pass Choose output value with minimal arrival time for output Back-propagate the values 36 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
41 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
42 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
43 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
44 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
45 Require: circuit G Require: maximum number of iterations, N : partition circuit into trees 2: select initial values for dangling inputs 3: for i = 0 to N do 4: for all partitions do 5: choose IVC and INC using dynamic programming 6: end for 7: update dangling input values 8: if solution is the same as previous then 9: break {Check for convergence} 0: end if : if oscillation is detected then 2: repartition the circuit 3: end if 4: end for 5: greedily remove INCs that do not affect delay 6: return input vector and INC placements
46 Runtime Introduction Algorithm Linear in number of gates Partitioning topological traversal Dynamic programming 2 topological traversals Limit the number of iterations to a small constant (e.g., 5) 38 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
47 Section outline Introduction Algorithm 4. Algorithm 39 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
48 Introduction Algorithm Circuit % Worse than Mid % Worse and UB Time (s) c c c c c c c c D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
49 Area Impacts Introduction Algorithm Circuit Total INC Original INC % Gates Gates Trans. Trans. Increase c c c c c c c c D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
50 Summary Introduction Algorithm Proposed Internal Node Control (INC) for reducing static NBTI degradation on idle functional units Showed that INC leads to an average 26.7% reduction in delay relative to IVC alone Proposed a linear-time heuristic that generates near optimal results quickly 42 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
51 Acknowledgments Introduction Algorithm This work was supported by the Semiconductor Research Corporation under award 2007-HJ-593 and by the National Science Foundation under awards CCF and CNS D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
52 Questions Introduction Algorithm Thank You 44 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
53 Introduction Dynamic Programming Example Algorithm 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
54 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps 0: 0 ps : 0 ps 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
55 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps : 50 ps 0: 0 ps : 0 ps 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
56 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps >: 53.3 ps 0 >0: 58. ps : 50 ps 0: 0 ps : 0 ps 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
57 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps : 50 ps 0: 0 ps : 0 ps 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
58 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps : 50 ps 0: 0 ps : 0 ps, >0: 06 ps, >: 3 ps \w INC 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
59 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps : 50 ps, >0: 8 ps 0,0 >: 82 ps 0: 0 ps : 0 ps, >0: 06 ps, >: 3 ps \w INC 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
60 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps : 50 ps 0, >0: 8 ps 0: 0 ps : 0 ps, >0: 06 ps, >: 3 ps \w INC 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
61 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps : 50 ps >0: 48 ps 0 >: 53 ps 0 0: 0 ps : 0 ps, >0: 06 ps, >: 3 ps \w INC 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
62 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps : 50 ps 0: 0 ps : 0 ps >0: 48 ps 0 >: 53 ps, >0: 06 ps, >: 3 ps \w INC 0 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
63 Introduction Dynamic Programming Example Algorithm 0: 0 ps : 0 ps : 50 ps 0 0 0: 0 ps : 0 ps 45 D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
64 Introduction Dynamic Programming Example Algorithm D.R. Bild, G.E. Bok, and R.P. Dick Minimization of NBTI Performance Degradation...
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