EECS 373 Midterm Winter 2012

Transcription

1 EECS 373 Midterm Winter 2012 Name: unique name: Sign the honor code: I have neither given nor received aid on this exam nor observed anyone else doing so. Nor did I discuss this exam with anyone after it was given to the rest of the class. Scores: Problem# Points 1 /18 2 /18 3 /15 4 /10 5a /25 5b /14 Total /100 NOTES: 1. Closed book/notes. 2. There are 9 pages including this one. The last page (page 9) is for reference. Feel free to rip it out. 3. Calculators are allowed, but no PDAs, Portables, Cell phones, etc. 4. Don t spend too much time on any one problem. 5. You have about 80 minutes for the exam. 6. Be sure to show work and explain what you ve done when asked to do so. Getting partial credit without showing work will be rare. 1

2 1. Fill-in-the-blank or circle the best answer. [18 points, -2 per wrong or blank answer, minimum 0] a) A 10 MHz clock with a duty cycle of 25% is high for µs per cycle. (Notice the units!) b) Bit stuffing is commonly used in serial busses to keep the receiver s clock synchronized with the sender s clock / reduce the impact of external noise / allow either the sender or receiver to send data without letting out the magic smoke. c) An assembler converts.s files into.o. (For this question each answer should be one of:.s,.c,.ld,.bin, or.o ) d) The I2C bus is generally slower than the SPI bus because the I2C bus has a slower rise time due to uses open-collector logic / can support multiple slaves / uses differential signaling / uses Manchester encoding e) When an enabled interrupt occurs, general purpose registers r0-r3 as well as r12 are saved to the stack automatically. Other values saved to the stack are the link register / stack pointer / interrupt number, the program counter / vector number / instruction register and the status register. The PC is then changed to a value hard-coded into the processor / determined by looking using the interrupt number as an index into a vector created by the programmer / found by polling the interrupting device and the LR is changed to a magic number / the PC where the ISR should return to / the old LR+4. In order to return back to the code that was interrupted, the ISR should move the LR into the BX /pop the stack and put the value into the PC /move the LR into the PC. 2

3 2. Write an ARM assembly language procedure that implements the following C function in an EABIcompliant manner and conforms to the following signature. Clearly comment your code so we can figure out what we are doing and what value each register holds. Poorly commented/unclear code will get points removed. [18 points] uint32 bob(uint32 a[], uint32 b, uint32 j) { int i=4; if(b>10) i=check(a[j],j)+b; return(i+1); } bob: push {r5, r6, r7, r8, lr} mov r7, #4 // r7 is i (4 as an initial value) cmp r1, #10 bls done // unsigned less or same mov r5, r1 // r5 is now b mov r6, r2 // r6 is now j mult r8, r5, #4 // r8 is the offset into the array ldr r0, [r0,r8] // r0 is now a[j] mov r1, r6 // r1=l bl check add r7, r0, r5 // i=return value +b done: addi r0, r7, #1 // return i (either way) pop{r5, r6, r7, r8, pc}// restore and return (lr to pc!) 3

4 3. Design a device which takes an input clock of 40MHz and outputs a 1MHz clock with a 25% duty cycle. You are to do this design in Verilog. Minor syntax/style errors will be ignored. We have started the module for you (though feel free to change anything we ve given). [15 points] module divide(clock_in, clock_out); input clock_in; output clock_out; reg clock_out; reg [5:0] count; clock_in) begin if(count>=39) count <= 6 d0; else count <= count + 6 d1; end if(count>=10) clock_out <= 1 b0; else clock_out <= 1 b1; endmodule 4

5 4. The last page of the exam includes information from the ARMv7-M Architecture Reference Manual. You may want to rip it out so you can look at it and this question at the same time. Write the hexadecimal for the machine code you would except to get for the following instructions. [10 points, 5 each) i. ROR R2, R2, R x41DA ii. ROR R11, R3, R xFA63FB03 5

6 5. For this problem you will be designing a simple interface using drawn gates, flip-flops etc. You will then write C code which controls these switches and lights. Part A: FPGA design [25 points] Say you want to use two switches and two LEDs on the SmartFusion platform. You have configured the system as shown in the figure below. Further, you have configured the system to send all requests of address 0x to address 0x F to this device. Using only standard gates, flip-flops, wires, ground and power, draw the logic needed so that writes to location 0x result in LED [1:0] being set according to the two lowest-order bits of the data being written (so writing 0 turns them both off, 1 turns on LED0, 3 turns on both LEDs, etc.). In addition, reads to location 0x result in returning a value 0 to 3 (0 if neither switch is on, 1 if SW 0 the only one on, 2 if SW 1 is the only one on, 3 if both are on). You are to assume all LEDs and switches are active high. We have left space for your answer on the next page. You should design your circuit using as simple of logic as possible, but should leave no shadow locations. Some notes/hints: You will probably want flip-flops that have a write-enable line (writes happen on the rising edge when enable is high). Shadow locations, as covered in class, are memory locations where the device will respond even though it isn t supposed to. In this case we only want responses at the given addresses. PADDR[8:0] is the nine least significant bits of the actual memory address. 6

7 PCLK PWDATA[0] D D flip-flop Q LED[0] PENABLE E PRDATA[31:0] PCLK C QB PSEL LED[1:0] PRESERN PWDATA[1] D D flip-flop Q LED[1] E PWRITE PCLK C QB PREADY PWDATA[31:0] PADDR[8:0] PADDR[0] PADDR[1] PADDR[2] PADDR[3] PADDR[4] PSLVERR SW[1:0] SW[0] SW[1] PRDATA[0] PRDATA[1] PRDATA[31:2] Feel free to either draw connections or using naming as you desire. (So you could connect PCLK to a flip-flop with a wire, or just label the input as PCLK. It may be the case you don t need all inputs. 7

8 Part B: Writing the controller in C [14 points] Write a C program which talks to your design. It should make it so that the LEDs are constantly updated to be the opposite of the switches. In other words, if switch 0 is off, LED 0 should be on and if switch 0 is on, LED 0 is off. Switch 1 and LED 1 should have a similar relationship. Your code must be legal C code. void main() //#define uint32 unsigned long // if uint32 not defined. { #define LED (*(volatile uint32 *) 0x ) #define SW (*(volatile uint32 *) 0x ) } while(1) LED=~SW; // There are a number of ways to do the above... // Be sure to use volatile... Be sure to cast. // Probably a good idea to only update bits 0 and 1, but // hardware design deals with 1 s and 0 s the same in upper bits. 8

9 The following is taken from the ARM v7-m Architecture Reference Manual and will be of use on problem # 4 9