Reading assignment. Chapter 3.1, 3.2 Chapter 4.1, 4.3

Transcription

1 Reading assignment Chapter 3.1, 3.2 Chapter 4.1, 4.3 1

2 Outline Introduc5on to assembly programing Introduc5on to Y86 Y86 instruc5ons, encoding and execu5on 2

3 Assembly The CPU uses machine language to perform all its opera5ons Machine code (pure numbers) is generated by transla5ng each instruc5on into binary numbers that the CPU uses This process is called "assembling"; conversely, we can take assembled code and disassemble it into (mostly) human readable assembly language Assembly is a much more readable transla5on of machine language, and it is what we work with if we need to see what the computer is doing There are many different kinds of assembly languages; we'll focus on the Y86/IA32 language as defined in the text and on our system (also SPARC and MIPS) 3

4 Assembly opera5ons Perform arithme5c func5on on register or memory data Transfer data between memory and register Load data from memory into register (read) Store register data into memory (write) Transfer control Uncondi5onal jumps to/from procedures (calls) Condi5onal branches (if, switch, for, while, etc) 4

5 ISA Instruc5on Set Architecture 5

6 ISA- More explana5ons ISA instruc5on set architecture Format and behavior of a machine level program Defines: The processor state (see the CPU fetch- execute cycle) The format of the instruc5ons The effect of each of these instruc5ons on the state Abstrac5ons Instruc5on executed in sequence Technically defined to be comple5ng one instruc5on before star5ng the next Pipelining Concurrent execu5on (but not really) Memory addresses are virtual addresses Very large byte- addressable array Address space managed by the OS (virtual à physical) Contains both executable code of the program AND its data» Run- 5me stack» Block of memory for user (global and heap) 6

7 Generic Instruc5on Cycle An instruc5on cycle is the basic opera5on cycle of a computer. It is the process by which a computer retrieves a program instruc5on from its memory, determines what ac5ons the instruc5on requires, and carries out those ac5ons. This cycle is repeated con5nuously by the central processing unit (CPU), from bootup to when the computer is shut down. 1. Fetching the instruc5on 2. Decode the instruc5on 3. Memory and addressing issues 4. Execute the instruc5on 7

8 Hardware abstrac5ons Program Counter (PC) Register %eip (X86-64) Address in memory of the next instruc5on to be executed Integer Register File Contains eight named loca5ons for storing 32- bit values Can hold addresses (C pointers) or integer data Have other special du5es Floa5ng point registers Condi5on Code registers Hold status informa5on About arithme5c or logical instruc5on executed CF (carry flag) OF (overflow flag) SF (sign flag) ZF (zero flag) Memory 8

9 Machine instruc5on example C code Add two signed integers Assembly Add 2 4- byte integers Operands X: register %eax Y: memory M[%ebp+8] T: register %eax Return func5on value in %eax Object code 3 byte instruc5on Stored at address: 0x???????? int t = x + y; addl 8(%ebp),%eax

10 Outline Introduc5on to assembly programing Introduc5on to Y86 Y86 instruc5ons, encoding and execu5on 10

11 Y86: A simpler instruc5on set IA32 has a lot more instruc5ons IA32 has a lot of quirks Y86 is a subset of IA32 instruc5ons Y86 has a simpler encoding scheme than IA32 Y86 is easier to reason about hardware first 5me programming in assembly language 11

12 Y86 abstrac5ons The Y86 has bit registers with the same names as the IA bit registers 3 condi5on codes: ZF, SF, OF no carry flag interprets integers as signed a program counter (PC) a program status byte: AOK, HLT, ADR, INS memory: up to 4 GB to hold program and data The Y86 does not have: floa5ng point registers or instruc5ons hsp://voices.yahoo.com/the- y86- processor- simulator html?cat=15 hsp://y86tutoring.wordpress.com/ 12

13 Y86 Memory and Stack high address low address Y86 Stack Y86 Code 1. A huge array of bytes; 2. Set the bosom of the stack far enough away from the code; 3. The loca5on of your code should always start from 0x0. How to set up the star5ng point of stack and code? direc5ve:.pos address- in- hex 13

14 YIS and YAS and the Y86 simulator Check: 1) How to set up $PATH; 2) How to connect Linux with X display Add these variables to your $PATH: /home/f85/bren/sovware/sim/misc /home/f85/bren/sovware/sim/pipe /home/f85/bren/sovware/sim/seq The example code was assembled during the build process and is in /home/f85/bren/sovware/sim/y86- code. HOW TO: %yas prog.ys Assembles the program Creates a *.yo file %yis prog.yo Instruc5on set simulator gives output and changes %ssim g prog.yo & SimGuide linkà hsp://csapp.cs.cmu.edu/public/simguide.pdf 14

15 Run Y86 program irmovl $55,%edx rrmovl %edx, %ebx irmovl Array, %eax rmmovl %ebx,4(%eax) mrmovl 0(%eax),%ecx halt.align 4 Array:.long 0x6f.long 0x84 y86prog1.ys % yas y86prog1.ys % yis y86prog1.yo Stopped in 6 steps at PC = 0x1a. Status 'HLT' CC Z=1 S=0 O=0 Changes to registers: %eax: 0x x c %ecx: 0x x f %edx: 0x x %ebx: 0x x Changes to memory: 0x0020: 0x x

16 Y86 Simulator program code 16

17 Y86 Simulator Contents of memory Processor State The fetch- execute loop Register file Status Condi5on Codes 17

18 Y86 take- home notes Y86 is an assembly language instruc5on set simpler than but similar to IA32; but not as compact (as we will see) The Y86 has: bit registers with the same names as the IA bit registers 3 condi5on codes: ZF, SF, OF no carry flag - interpret integers as signed a program counter (PC) Holds the address of the instruc5on currently being executed a program status byte: AOK, HLT, ADR, INS State of program execu5on memory: up to 4 GB to hold program and data RF: Program registers %eax %esi %ecx %edi %edx %esp CC: Condition codes ZF SF OF PC Stat: Program Status DMEM: Memory %ebx %ebp 18

19 Outline Introduc5on to assembly programing Introduc5on to Y86 Y86 instruc5ons, encoding and execu5on 19

20 Learning Y86 Assembler direc5ves Status condi5ons and Excep5ons Instruc5ons Opera5ons Branches Moves Addressing Modes Stack opera5ons Subrou5ne call/return How to encode each instruc5on 20

21 Y86 Assembler direc5ves 21

22 Status condi5ons 22

23 Y86 Excep5ons What happens when an invalid assembly instruc5on is found? How would this happen? This generates an excep5on. In Y86 an excep5on halts the machine, it stops execu5ng. On a real system, this would be handled by the OS and only the current process would be terminated. What are some possible causes of excep5ons? Invalid opera5on Divide by 0 sqrt of nega5ve number Memory access error (address too large) Hardware error Y86 handles 3 types of excep5ons: HLT instruc5on executed Invalid address encountered Invalid instruc5on encountered In each case the status is set 23

24 Y86 Instruc5ons Each accesses and modifies some part(s) of the program state Largely a subset of the IA32 instruc5on set Includes only 4- byte integer opera5ons à word Has fewer addressing modes Smaller set of opera5ons Format 1 6 bytes of informa5on read from memory Can determine the type of instruc5on from first byte Can determine instruc5on length from first byte Not as many instruc5on types Simpler encoding than with IA32 Registers ra or rb represent one of the registers (0-7) 0xF denotes no register (when needed) No par5al register op5ons (must be a byte) 24

25 Move opera5on 25

26 Move opera5on Different opcodes for 4 types of moves register to register (opcode = 2) No5ce condi5onal move has opcode 2 as well immediate to register (opcode = 3) register to memory (opcode = 4) memory to register (opcode = 5) The only memory addressing mode is base register + displacement Memory opera5ons always move 4 bytes (no byte or word memory opera5ons i.e. no 8/16- bit move) Source or des5na5on of memory move must be a register. CORRECTION = F 26

27 Supported Opera5ons OP1 (opcode = 6) Only take registers as operands Only work on 32 bits Note: no or and not ops Only instruc5ons to set CC Star5ng point ZF=1, SF=0, OF=0 Arithme5c instruc5ons addl ra, rb R[rB] R[rB] + R[rA] subl ra, rb R[rB] R[rB] R[rA] andl ra, rb R[rB] R[rB] & R[rA] xorl ra, rb R[rB] R[rB] ^ R[rA] # y86cc.ys.pos 0x0 irmovl $1, %eax irmovl $0, %ebx irmovl $1, %ecx addl %eax, %eax andl %ebx, %ebx subl %eax, %ecx irmovl $0x7fffffff, %edx addl %edx, %edx halt 27

28 Jump instruc5ons Jump instruc5ons (opcode = 7) fn = 0 for uncondi5onal jump fn =1-6 for <= < =!= >= > Refer to generically as jxx Encodings differ only by func5on code Based on values of condi5on codes Same as IA32 counterparts Encode full des5na5on address Unlike PC- rela5ve addressing seen in IA32 28

29 Jump instruc5on types Uncondi5onal jumps jmp Dest PC Dest Condi5onal jumps jle Dest PC Dest if last result 0 SF=1 or ZF=1 jl Dest PC Dest if last result < 0 SF=1 and ZF=0 je Dest PC Dest if last result = 0 ZF=1 jne Dest PC Dest if last result 0 ZF=0 jge Dest PC Dest if last result 0 SF=0 or ZF=1 jg Dest PC Dest if last result > 0 SF=0 and ZF=0 What about checking OF? If the last result is not what is specified, then the jump is not taken; and the next sequen5al instruc5on is executed i.e. PC = PC + jump instruc5on size vice Dest 29

30 Y86 example program w/ loop # y86loop.ys.pos 0x0 irmovl $0,%eax # sum = 0 irmovl $1,%ecx # num = 1 Loop: addl %ecx,%eax # sum += num irmovl $1,%edx # tmp = 1 addl %edx,%ecx # num++ irmovl $1000,%edx # lim = 1000 subl %ecx,%edx # if lim - num >= 0 jge Loop # loop again irmovl $10,%edx # ch = '\n' halt Which instruc5ons set the CC bits? What are the flags set to for each instruc5on? 30

31 Condi5onal move Refer to generically as cmovxx Encodings differ only by func5on code Based on values of condi5on codes Variants of rrmovl instruc5on (condi5onally) copy value from source to des5na5on register 31

32 Condi5onal move examples # y86ccmov.ys.pos 0x0 irmovl $1, %eax cmove %eax,%ecx irmovl 0, %ebx addl %eax, %eax cmovg %eax, %ebx andl %ebx, %ebx subl %eax, %ecx cmovg %ecx, %edx irmovl $0x7fffffff, %edx addl %edx, %edx halt The cmovxx statement only moves the source register value to the des5na5on register if the condi5on is true, so: If the condi5on is equal, that means the CC bits have the ZF set to 1 i.e. the previous result was equal to zero, cmovg checks if the previous result was greater than zero (i.e. SF=0) and if so, moves the source register value to the des5na5on register ETC 32

33 Y86 Program Stack Stack Bosom Region of memory holding program data Used in Y86 (and IA32) for suppor5ng procedure calls Stack Top %esp Increasing Addresses Stack top indicated by %esp Address of top stack element Increasing Addresses Stack grows toward lower addresses Top element is at highest address in the stack %esp Stack Top When pushing, must first decrement stack pointer When popping, increment stack pointer Stack Bosom 33

34 Stack Opera5ons Stack for Y86 works just the same as with IA32 R[%esp] R[%esp]- 4 M[R[%esp]] R[rA] Stack: ra pushl ra <- - %esp- 4 <- - %esp R[rA] M[R[%esp]] R[%esp] R[%esp]+4 Stack: value <- - %esp <- - %esp+4 popl ra ra <- - value 34

35 Subrou5ne call and return Note: call uses absolute addressing 35

36 Procedure calls and return support Call pushes the PC value (already point to next instruc5on) onto the top of the stack Dest R[%esp] R[%esp]- 4 Make space on the stack M[R[%esp]] PC Move the value of the PC, which has been incremented to the next instruc5on, and store it in the memory loca5on pointed to by reg %esp PC Dest Move the des5na5on address of the rou5ne being called into the PC ret PC M[R[%esp]] Get the return address off the stack R[%esp] R[%esp]+4 Adjust the stack pointer Stack Top %esp Increasing Addresses 36

37 Miscellaneous instruc5ons 37

38 Y86 Instruc5on Set Encoding of each instruc5on SEQ Hardware Structure SEE HANDOUT 38

39 SEQ Hardware Structure Abstract and Stages u State o o o o Program counter reg (PC) Condi5on code reg (CC) Register File Memories Data: read and write Instruc5on: read u Instruc5on Flow o o o Read instruc5on at address specified by PC Process through stages Update program counter u Fetch o o u Decode o u Execute o u Memory o Read instruc5on from instruc5on memory If PC points to it, we view it as instruc5on Read program registers Compute value or address Read or write data u Write Back o u PC o Write program registers Update program counter 39

40 Execu5ng à Arithme5c/Logical Ops Fetch Read 2 bytes Decode Read operand registers Execute Perform opera5on Set condi5on codes Memory Do nothing Write back Update register PC Update Increment PC by 2 40

41 Execu5ng à rmmovl Fetch Read 6 bytes Decode Read operand registers Execute Compute effec5ve address Memory Write to memory Write back Do nothing PC Update Increment PC by 6 41

42 Execu5ng à popl Fetch Read 2 bytes Decode Read stack pointer Execute Increment stack pointer by 4 Memory Read from old stack pointer Write back Update stack pointer Write result to register PC Update Increment PC by 2 F 42

43 Execu5ng à Jumps Fetch Read 5 bytes Increment PC by 5 Decode Do nothing Execute Determine whether to take branch based on jump condi5on and condi5on codes Memory Do nothing Write back Do nothing PC Update Set PC to Dest if branch taken or to incremented PC if not branch 43

44 Execu5ng à Call Fetch Read 5 bytes Increment PC by 5 Decode Read stack pointer Execute Decrement stack pointer by 4 Memory Write incremented PC to new value of stack pointer Write back Update stack pointer PC Update Set PC to Dest 44

45 Execu5ng à ret Fetch Read 5 bytes Increment PC by 5 Decode Read stack pointer Execute Decrement stack pointer by 4 Memory Write incremented PC to new value of stack pointer Write back Update stack pointer PC Update Set PC to Dest 45

46 Instruc5on encoding prac5ce Determine the byte encoding of the following Y86 instruc5on sequence given.pos 0x100 specifies the star5ng address of the object code to be 0x100 (prac5ce problem 4.1).pos 0x100 # start code at address 0x100 irmovl $15, %ebx # load 15 into %ebx rrmovl %ebx, %ecx # copy 15 to %ecx loop: rmmovl %ecx, - 3(%ebx) # save %ecx at addr 15-3=12 addl %ebx, %ecx # increment %ecx by 15 jmp loop # goto loop 46

47 Instruc5on encoding prac5ce (cont) 0x100: 30f3fcffffff x100: 30f3fcffffff irmovl $- 4, %ebx 0x106: rmmovl %esi, 0x800(%ebx) 0x10c: 00 halt Now you try: 0x200: a06f f30a x400:

48 Summary Important property of any instruc5on set THE BYTE ENCODINGS MUST HAVE A UNIQUE INTERPRETATION which ENSURES THAT A PROCESSOR CAN EXECUTE AN OBJECT- CODE PROGRAM WITHOUT ANY AMBIGUITY ABOUT THE MEANING OF THE CODE 48