It has hardware. It has application software.

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1 Q.1 What is System? Explain with an example A system is an arrangement in which all its unit assemble wrk tgether accrding t a set f rules. It can als be defined as a way f wrking, rganizing r ding ne r many tasks accrding t a fixed plan. Fr example, a watch is a time displaying system. Its cmpnents fllw a set f rules t shw time. If ne f its parts fails, the watch will stp wrking. S we can say, in a system, all its subcmpnents depend n each ther. Q.2 Define Embedded System. As its name suggests, Embedded means smething that is attached t anther thing. An embedded system can be thught f as a cmputer hardware system having sftware embedded in it. An embedded system can be an independent system r it can be a part f a large system. An embedded system is a micrcntrller r micrprcessr based system which is designed t perfrm a specific task. Fr example, a fire alarm is an embedded system; it will sense nly smke. Q.3 Explain 3 cmpnents f Embedded System. An embedded system has three cmpnents It has hardware. It has applicatin sftware. It has Real Time Operating system (RTOS) that supervises the applicatin sftware and prvide mechanism t let the prcessr run a prcess as per scheduling by fllwing a plan t cntrl the latencies. RTOS defines the way the system wrks. It sets the rules during the executin f applicatin prgram. A small scale embedded system may nt have RTOS. Q.4 Basic Structure f an Embedded System The fllwing illustratin shws the basic structure f an embedded system Sensr It measures the physical quantity and cnverts it t an electrical signal which can be read by an bserver r by any electrnic instrument like an A2D cnverter. A sensr stres the measured quantity t the memry.

2 A-D Cnverter An analg-t-digital cnverter cnverts the analg signal sent by the sensr int a digital signal. Prcessr & ASICs Prcessrs prcess the data t measure the utput and stre it t the memry. D-A Cnverter A digital-t-analg cnverter cnverts the digital data fed by the prcessr t analg data Actuatr An actuatr cmpares the utput given by the D-A Cnverter t the actual (expected) utput stred in it and stres the apprved utput. Q.5 Q.6 Prcessr and its units Prcessr is the heart f an embedded system. It is the basic unit that takes inputs and prduces an utput after prcessing the data. Fr an embedded system designer, it is necessary t have the knwledge f bth micrprcessrs and micrcntrllers. Prcessrs in a System

3 A prcessr has tw essential units Prgram Flw Cntrl Unit (CU) Executin Unit (EU) The CU includes a fetch unit fr fetching instructins frm the memry. The EU has circuits that implement the instructins pertaining t data transfer peratin and data cnversin frm ne frm t anther. The EU includes the Arithmetic and Lgical Unit (ALU) and als the circuits that execute instructins fr a prgram cntrl task such as interrupt, r jump t anther set f instructins. A prcessr runs the cycles f fetch and executes the instructins in the same sequence as they are fetched frm memry. Q.7 Types f Prcessrs Prcessrs can be f the fllwing categries General Purpse Prcessr (GPP) Micrprcessr Micrcntrller Embedded Prcessr Digital Signal Prcessr Media Prcessr Applicatin Specific System Prcessr (ASSP) Applicatin Specific Instructin Prcessrs (ASIPs) GPP cre(s) r ASIP cre(s) n either an Applicatin Specific Integrated Circuit (ASIC) r a Very Large Scale Integratin (VLSI) circuit. Q.8 Micrprcessr A micrprcessr is a single VLSI chip having a CPU. In additin, it may als have ther units such as caches, flating pint prcessing arithmetic unit, and pipelining units that help in faster prcessing f instructins.

4 Earlier generatin micrprcessrs fetch-and-execute cycle was guided by a clck frequency f rder f ~1 MHz. Prcessrs nw perate at a clck frequency f 2GHz Q.9 Micrcntrller A micrcntrller is a single-chip VLSI unit (als called micrcmputer) which, althugh having limited cmputatinal capabilities, pssesses enhanced input/utput capability and a number f n-chip functinal units. CPU RAM ROM I/O Prt Timer Serial COM Prt Micrcntrllers are particularly used in embedded systems fr real-time cntrl applicatins with n-chip prgram memry and devices. Q.10 Micrprcessr vs Micrcntrller Micrprcessr Micrcntrller Micrprcessrs are multitasking in nature. Can perfrm multiple tasks at a time. Fr example, n cmputer we can play music while writing text in text editr. Single task riented. Fr example, a washing machine is designed fr washing clthes nly.

5 RAM, ROM, I/O Prts, and Timers can be added externally and can vary in numbers. RAM, ROM, I/O Prts, and Timers cannt be added externally. These cmpnents are t be embedded tgether n a chip and are fixed in numbers. Designers can decide the number f memry r I/O prts needed. Fixed number fr memry r I/O makes a micrcntrller ideal fr a limited but specific task. External supprt f external memry and I/O prts makes a micrprcessr-based system heavier and cstlier. Micrcntrllers are lightweight and cheaper than a micrprcessr. External devices require mre space and their pwer cnsumptin is higher. A micrcntrller-based system cnsumes less pwer and takes less space. Q.11 Harvard architecture. The Harvard architecture ffers separate strage and signal buses fr instructins and data. This architecture has data strage entirely cntained within the CPU, and there is n access t the instructin strage as data. Cmputers have separate memry areas fr prgram instructins and data using internal data buses, allwing simultaneus access t bth instructins and data. Prgrams needed t be laded by an peratr; the prcessr culd nt bt itself. In a Harvard architecture, there is n need t make the tw memries share prperties.

6 Q.12 Vn Neumann architecture The Vn Neumann architecture was first prpsed by a cmputer scientist Jhn vn Neumann. In this architecture, ne data path r bus exists fr bth instructin and data. As a result, the CPU des ne peratin at a time. It either fetches an instructin frm memry, r perfrms read/write peratin n data. S an instructin fetch and a data peratin cannt ccur simultaneusly, sharing a cmmn bus. Vn-Neumann architecture supprts simple hardware. It allws the use f a single, sequential memry. Tday's prcessing speeds vastly utpace memry access times, and we emply a very fast but small amunt f memry (cache) lcal t the prcessr. Q.13 Vn-Neumann Architecture vs Harvard Architecture

7 The fllwing pints distinguish the Vn Neumann Architecture frm the Harvard Architecture. Vn-Neumann Architecture Harvard Architecture Single memry t be shared by bth cde and data. Separate memries fr cde and data. Prcessr needs t fetch cde in a separate clck cycle and data in anther clck cycle. S it requires tw clck cycles. Single clck cycle is sufficient, as separate buses are used t access cde and data. Higher speed, thus less time cnsuming. Slwer in speed, thus mre timecnsuming. Simple in design. Cmplex in design. Q.14 CISC and RISC CISC is a Cmplex Instructin Set Cmputer. It is a cmputer that can address a large number f instructins. In the early 1980s, cmputer designers recmmended that cmputers shuld use fewer instructins with simple cnstructs s that they can be executed much faster within the CPU withut having t use memry. Such cmputers are classified as Reduced Instructin Set Cmputer r RISC. Q.15 CISC vs RISC The fllwing pints differentiate a CISC frm a RISC CISC RISC Larger set f instructins. Easy t prgram Smaller set f Instructins. Difficult t prgram.

8 Simpler design f cmpiler, cnsidering larger set f instructins. Cmplex design f cmpiler. Many addressing mdes causing cmplex instructin frmats. Few addressing mdes, fix instructin frmat. Instructin length is variable. Instructin length varies. Higher clck cycles per secnd. Lw clck cycle per secnd. Emphasis is n hardware. Emphasis is n sftware. Cntrl unit implements large instructin set using micr-prgram unit. Each instructin is t be executed by hardware. Slwer executin, as instructins are t be read frm memry and decded by the decder unit. Faster executin, as each instructin is t be executed by hardware. Pipelining is nt pssible. Pipelining f instructins is pssible, cnsidering single clck cycle.