Knockout Switches. HIGH PERFORMANCE SWITCHES AND ROUTERS Wiley H. JONATHAN CHAO and BIN LIU Instructor: Mansour Rousta Zadeh

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1 HIGH PERFORMANCE SWITCHES AND ROUTERS Wiley H. JONATHAN CHAO and BIN LIU Instructor: Mansour Rousta Zadeh

2 Outlines Introduction Single Stage Knockout-Basic Architecture Knockout Concentration Principle Concentrator Architecture Channel grouping Principle Generalized Knockout Principle MOBAS Switch Fault Tolerant Knockout Switches Conclusion

3 Introduction-1 Output Buffered Switches: The best delaythroughput performance. Problem of Output Buffered Switches: Memory Speed Limitation Solution (Knockout Principle) limiting the number of cells that can arrive at an output port in each time slot Other cells are discarded Q:How Many? Tradeoff between Cell Loss Ratio and Memory Bandwidth

4 Introduction-2 the memory speed is no longer the bottleneck for the output-buffered switch No Commercial Products Why?

5 Single Stage Knockout-Basic Architecture Knockout switch interconnection fabric

6 Knockout Switches-Bus Interface

7 Operation of a Barrel Shifter-1

8 Operation of a Barrel Shifter-2

9 Knockout Concentration Principle

10 Concentration Cell Loss Performance

11 Concentration Cell Loss Performance

12 Construction of the Concentrator

13 An eight-input to four-output concentrator

14 Construction of large Concentrator with Small Concentrators

15 channel grouping principle

16 An asymmetric switch with line expansion ratio KM/N

17 Maximum Throughput

18

19 Generalized Knockout Principle

20 Generalized Knockout Principle

21 Generalized knockout principle Operation

22

23 The architecture of a multicast output buffered ATM switch

24 Replicating cells for a multicast connection in the MOBAS

25 Multicast Grouping Network

26 Switching condition of the switch element SWE

27 Routing a multicast cell

28 Translation Tables-1

29 Translation Tables-2

30 Fault Model of Switching Elements-1 Need to Reliability Redundancy Techniques: Time Redundancy Space Redundancy Fault Tolerant Topics Fault Diagnosis Fault Detection Fault Location System Reconfiguration

31 Fault Model of Switching Elements-2 Fault Sources In Control Logic Circuit (logic errors) Cross Stuck (Remains in Cross state) Toggle Stuck (Remains in Toggle state) In Data Link of SWE (link errors) Vertical Stuck Horizontal Stuck

32 Cross-Stuck (CS) Fault

33 Toggle-Stuck (TS) Fault

34 Vertical/Horizontal-Stuck(VS/HS) Fault

35 Fault Detection Using FD s (Fault detector) Test Pattern Generation by MPM s and AB s On Fault Diagnosis: Keeping user packets Doing Tests System Reconfiguration Fast, So no interruption in Switch Functionality

36 Cross-Stuck and Toggle-Stuck Fault Detection Toggle/Cross Fault Detection? Monitoring FA s If all 0 -> Fault Online Detection? Toggle Stuck possible! Cross Stuck Not possible! Vertial/Hor. Stuck Fault Detection? Monitoring Switch module If all the same ->Fault

37 Fault Location and Reconfiguration Fault localization after Detection System Reconfiguration after localization Using test cells Filelds: FA Field New Priority field Input source field in MGN1

38 Toggle-Stuck and Cross-Stuck Cases

39 Fault Location Test

40 Fault Location of Cross Stuck

41 Reconfiguration of Vertical Stuck Fault

42 Fault Location Test

43 Reconfiguration

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