Embedded System Design
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1 csee 4840 Embedded System Design Lab 1: Using the fpga Stephen A. Edwards Columbia University 2015 This shows how to compile and download an fpga-only project to the SoCKit board. Your assignment is to add functionality that allows a user to display and edit the contents of a 16 8 bit ram. 1 Configure the Board Set the jtag scan chain to include the hps but not the hsmc by setting sw4.1 to 1 (off) and sw4.2 to 0 (on) (upper right corner of the top of the board). Jtag is the serial protocol we use to configure and debug the fpga. The hps refers to the arm processor and its peripherals; the hsmc is the (unused) highspeed mezzanine connector on the board.
![Set jumpers j15 j19 such that bootsel[2:0] is 100 and clksel[1:0] is 00.](/docs-images/85/91694624/images/2-1.jpg "Bootsel controls how the arm processor boots; 100 sets it to boot from the fpga.")
2 Set the fpga configuration mode switches (sw6, on the underside of the board) to The msel switches control how the fpga loads its configuration when it is powered on. Set jumpers j15 j19 such that bootsel[2:0] is 100 and clksel[1:0] is 00. Bootsel controls how the arm processor boots; 100 sets it to boot from the fpga. Clksel controls the speed of the hps peripherals; 00 is slowest.
3 2 Download and Unpack the Lab 1 files Download lab1.tar.gz from the class website and extract it by typing tar zxf lab1.tar.gz. This will create a lab1 directory containing the files listed below. Name lab1.qpf lab1.qsf lab1.sdc vga_led_emulator.sv lab1.sv SoCKit_Top.sv Makefile Contents Quartus Project File. Select this when opening a project. Quartus Settings File: lists fpga type, pin names, project files Synopsys Design Constraints: clock pins and frequencies for the timing analyzer A module that emulates 8 seven-segment leds on a vga monitor connected to the SoCKit. Skeleton lab 1 code: the memory, a seven-segment decoder, the controller, and a top-level module that connects these. Your assignment: modify this file. SystemVerilog top-level module for the SoCKit board. Toplevel pins and default outputs. Instantiates the led emulator module and the lab1 module. Instructions for building lab1.tar.gz and for cleaning up unneeded files. 3 Compile and Download the Project Start Quartus (type quartus). Select lab1.qpf with File Open Project... Compile the design by selecting Processing Start Compilation. This will take a while. If all goes well, you should see Quartus II Compilation was successful. Download the generated file to the SoCKit board. Select Tools Programmer. If No Hardware appears, turn on the SoCKit board and click on Hardware Setup...
4 and select CV SoCKit. Click on Auto Detect. It should report that it found devices with a shared jtag id. Select 5CSXFC6D6ES and click ok. Answer yes if it asks to update the Programmer s device list. Click on 5CSX... device in the jtag chain to highlight the first line, then click on Change File..., enter the output_files directory and select lab1.sof, which the compilation process should have generated. Click the Program/Configure checkbox for the 5CSXF... device: see the image on the right.
![Click Start. It should take a couple of seconds: the progress bar should go from left to right and finally announce Success. Turn on sw[0] (rightmost on the board) by pushing it up.](/docs-images/85/91694624/images/5-0.jpg "The vga screen should now display csee4840 in a red-on-black sevensegment style. Now, switch off sw[0] and try pressing the four keys on the right of the SoCKit board.")
5 Click Start. It should take a couple of seconds: the progress bar should go from left to right and finally announce Success. Turn on sw[0] (rightmost on the board) by pushing it up. The vga screen should now display csee4840 in a red-on-black sevensegment style. Now, switch off sw[0] and try pressing the four keys on the right of the SoCKit board. The display should change.
6 4 The Lab 1 Design key[0] key[1] key[2] key[3] clk Controller a din we clk 16 8 RAM dout Hex-7 seg Decoder Hex-7 seg Decoder Hex-7 seg Decoder hex0 hex2 hex3 Implement a memory display and modification circuit according to the block diagram above. The circuit should always display the address and contents of one of 16 byte-wide memory locations. Have key3 and key2 increment and decrement the address and key1 and key0 modify its contents. The key inputs are active-low signals from the four pushbuttons on the right side of the SoCKit board. See the SoCKit User Manual for details. The vga led emulator displays the hex signals on the screen. hex0[0] controls the a segment of the leftmost digit, hex0[1] is the b segment of the leftmost digit, hex7[2] is the c segment of the rightmost digit, etc. Modify the code in lab1.sv to implement your lab. Put your names and unis in the comments. Turn off sw[0] when you are developing your code so you can see its output. Submit your modified lab1.sv file on Courseworks. e f d g a c b
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