A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system
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1 A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 26th July 2005 Alberto Donato Relatore: Prof. Fabrizio Ferrandi Correlatore: Ing. Marco Domenico Santambrogio
2 Index - Aim of the work - The reconfigurable platform: Hardware architecture Partial dynamic reconfiguration flows - Software architecture: The ICAP kernel module The IP-Core Manager - Tests and results - Future work Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 2/16
3 Aim of the Work FPGAs reconfiguration capabilities allow creation of Systems-on-Chip whose hardware components can be modified, added and removed at runtime. Issues: Provide software support for dynamic partial reconfiguration on Systems-on-Chip running the LINUX operating system. Partial reconfiguration process management from the OS Addition and removal of hardware reconfigurable components Automatic loading and unloading of specific drivers for the IP-Cores upon components configuration/deconfiguration Easier programming interface for specific drivers Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 3/16
4 Hardware Architecture Architecture derived from Caronte: General purpose processor Memory (BRAM, DDR) BUS BUS ICAP Reconfigurable components General Purpose Processor Reconfigurable Module Memory Bridge Reconfigurable Module ICAP Reconfigurable Module Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 4/16
5 Hardware Architecture (2) Components of the hardware architecture: PLB bus OPB bus PPC405 processor SRAM and SDRAM memory Flash memory Xilinx ICAP IP-Core PPC405 Processor SRAM Memory SDRAM Memory Interrupt Controler UART Interface I/O peripherals: Xilinx UARTLite interface Ethernet controller GPIO LEDs 7-Segments display Flash Memory BRAM Memory ICAP Bridge Ethernet Controller GPIO LEDs 7 Segments Display Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 5/16
6 Partial Dynamic Reconfiguration Flows Reconfiguration of areas of the FPGA fabric without interfering with the rest of the system. Two different approaches: small-bits and module-based reconfiguration. Small-bits manipulation: change single reconfigurable elements, such as slices useful to modify the configuration of hardware components of the system Module-based reconfiguration: addition or removal of system components changes in the resources available to the system Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 6/16
7 Software Side: Previous Work Hardware Indepentent Hardware Dependent ICAP API Device Drivers Embedded Microprocessor Application Code XPART Egret architecture: Emulated ICAP API External (Windows/Unix) Level 3 Level 2 Level 1 Level 0 Modular hardware/software architecture Based on the LINUX OS Dynamic configuration of hardware modules and loading of drivers Self-reconfigurable platform: PowerPc/MicroBlaze processor ICAP component Stand-alone application using the XPART API Supports small-bits reconfiguration. RSoC Core Module FPGA CPU Hard or Soft Core Internal CPU bus Peripheral Interface Core Peripheral Interface Core Peripheral Module Peripheral Device Peripheral Device Peripheral Module Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 7/16
8 Software Architecture Composed of two main elements: Driver to support partial reconfiguration Manager for the IP-Cores devices The software architecture provides: Access to ICAP component from userspace Interface between IP-Cores low-level drivers and kernel Access to reconfigurable devices from userspace processes ICAP Driver ICAP Applications Linux Kernel IP Core Manager Low level Device Drivers Reconfigurable Devices Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 8/16
9 The ICAP Kernel Module Implements a device driver, adds kernel support for the Xilinx ICAP component. Access from userspace via standard device node mechanism (i.e. /dev/icap) Masks hardware details Reconfiguration data provided in the form of partial bitstream files Kernel Application Configuration Data Reconfig. Controller Driver Data I/O Reconfig. Controller Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 9/16
10 The ICAP Kernel Module: Reconfiguration Reconfiguration process using the ICAP kernel module: WRITE system call /dev/icap configuration IOCTL call 1. partial bitstream is copied into ICAP module buffer from a userspace process 2. reconfiguration ioctl call is performed from userspace 3. the kernel module sends partial configuration data to the ICAP component partial bitstream ICAP module Memory Mapped I/O Space Linux Kernel IOCTL call partial bitstream memory buffer The hardware ICAP component is accessed through the memory mapping mechanism. ICAP copy content of buffer Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 10/16
11 The IP-Core Manager A LINUX kernel module which implements a unified infrastructure for the management of the IP-Cores. IP-Cores Plug-and-Play Runtime loading of specific IP-Cores drivers Management of operations common to all drivers Device Driver Load IPCM Access to reconfigurable components from userspace Standardize and simplify writing of specific drivers Read device info Interrupt IP Core I/O mem region Device type HW IPCM Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 11/16
12 The IP-Core Manager: Hierarchy The IP-Core Manager acts as a layer between the operating system kernel and the low-level device drivers. The low-level drivers contain: system calls implementation Kernel devices initialization and shutdown functions kernel modules Kernel Module register/unregister device request/free memory areas IP Core Manager (SW) The drivers also contain a stub: provides standard kernel module interface provides module initialization and shutdown functions IP Core drivers reconfigurable hardware register system calls Driver Driver Driver data I/O IP Core IP Core IP Core IP Core IP Core Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 12/16
13 The IP-Core Manager: Structure Registration process of a new IP-Core with the IPCM: 1. interrupt is received from the HW-IPCM 2. read device data (base address, device id, address range) 3. load low-level driver if not already loaded 4. the low-level driver initialization function registers driver data structures device data drv_id, baseaddr, range ipcm_core_register() device data structure IPCM request_module() Driver ipcm_stub_init() 5. data structures for the new device is initialized registered drivers ipc_dev_t drv_t ipcm_drv_register() allocate new driver structure drv_t * registered devices driver data structure Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 13/16
14 Tests and Results Comparison between original Caronte architecture and the one supporting LINUX Resource Orignal Caronte Caronte LINUX Total Elem. Perc. Elem. Perc. available Slice Flip Flops % % input LUTs % % 9856 Occupied Slices % % 4928 Bonded IOBs % % 396 Block RAM 32 72% 32 72% 44 DCMs 2 50% 2 50% 4 Resources usage in different hardware architectures supporting LINUX Resource Base Arch. No Ethernet No Flash Total Elem. Perc. Elem. Perc. Elem. Perc. available Slice Flip Flops % % % input LUTs % % % 9856 Occupied Slices % % % 4928 Bonded IOBs % % 36 81% 396 Tbufs 64 2% 64 2% 64 2% 2464 Block RAM 36 81% 32 72% 36 81% 44 GCLKs 6 37% 4 25% 6 37% 16 DCMs 2 50% 2 50% 2 50% 4 Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 14/16
15 Tests and Results (2) Small-bits manipulation partial reconfiguration tests Label Reconfig. Bitstream Configuration Throughput frames size (Byte) time (msec) (MByte/sec) RC RC RC RC RC RC RC RC RC RC Reconfiguration times have been measured on the Avnet Virtex-II Pro Development Board: with 66 Mhz processor: throughput ~1.5 Mbyte/s with 100 Mhz processor: throughput > 3.0 Mbyte/s Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 15/16
16 Future Work Possible extensions of the described software architecture: extension of the ICAP driver to allow creation of reconfiguration command from reconfiguration data (without pre-synthesized bitstreams) runtime calculation of difference bitstreams implementation of the HW-IPCM extension of the ICAP component to support DMA transfers Alberto Donato A software platform to support dynamically reconfigurable Systems-on-Chip under the GNU/Linux operating system 16/16
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