APPENDIX-A INTRODUCTION TO OrCAD PSPICE

Size: px
Start display at page:

Download "APPENDIX-A INTRODUCTION TO OrCAD PSPICE"

Transcription

1 220 APPENDIX-A INTRODUCTION TO OrCAD PSPICE

2 221 APPENDIX-A INTRODUCTION TO OrCAD PSPICE 1.0 INTRODUCTION Computer aided circuit analysis provides additional information about the circuit performance that is some times difficult to obtain with laboratory prototype measurements. A brief over view of PSPICE is given below. 1.1 BRIEF OVER VIEW OF PSPICE Simulation Program for Integrated Circuits Emphasis (SPICE) is a powerful general purpose analog and mixed-mode circuit simulator that is used to verify circuit designs and to predict the circuit behavior. SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975). PSpice is a PC version of SPICE (which is currently available from OrCAD Corporation of Cadence Design Systems, Inc.). The PSpice platform used depends on the SPICE version. There are three platforms available for PSpice. They are 1) PSpice Schematics (version 9.1 or below), 2) PSpice A/D or OrCAD PSpice A/D (version 9.1 or above) and 3) OrCAD Capture (version 9.2 or above). In this thesis OrCAD Capture 10.3 has been used for carrying out simulation of electro-optical hybrid logic circuits. The OrCAD Capture software package has three major interactive programs: Capture, Pspice and Probe. Capture is a powerful program that allows to build circuits by drawing them within a window on the monitor. Pspice A/D allows to specify the type of simulation and analyze the circuit created by Capture and to generate the voltage and current solutions. In addition, PSpice has analog and digital libraries of standard components. This makes it a useful tool for a wide range of analog and digital applications. PSpice simulator is closely integrated with OrCAD Capture to provide you with a rapid design-and-simulate iterative cycle. Probe is a graphic postprocessor that allows to display plots of voltages, currents and power. Capture is not on-

3 222 ly intended to generate the input for PSpice but also for PCB layout design programs. The circuit drawn using Capture is run from the PSpice menu. The simulation type and settings are specified from the PSpice menu. After the simulation run is completed, Capture automatically opens the PSpice A/D platform for displaying and viewing the output results. 1.2 TYPES OF CIRCUIT ANALYSIS PSpice can be used to perform several types of circuit analyses. Some of the important ones: 1) DC Analysis, 2) AC Analysis and 3) Transient Analysis. These three types of analysis have been used in the thesis and are explained briefly explained in the following DC analysis DC Analysis includes the following: can be carried out using DC sweep analysis and bias point analysis depending on the requirement DC sweep analysis The DC sweep analysis causes a DC sweep to be performed on the circuit that allows to sweep a source (voltage or current), a global parameter, a model parameter, or the temperature through a range of values. The bias point of the circuit is calculated for each value of the sweep Bias point analysis The bias point is calculated for any analysis whether or not the Bias Point analysis is enabled in the simulation settings dialog box AC sweep analysis AC sweep is a frequency response analysis. PSpice calculates the small-signal response of the circuit to a combination of inputs by transforming it around the bias point and treating it as a linear circuit Transient analysis A transient analysis calculates the behavior of the circuit as a function of time. The processer for simulating a circuit with PSpice has been explained in the following section.

4 PROCEDURE FOR SIMULATING A CIRCUIT WITH PSPICE There are four main steps involved in circuit simulation using PSpice. They are: 1) Creating a new project and schematic diagram 2) Instantiating circuit components, connecting them together and setting component values and properties and saving the schematic diagram. 3) Creating a New Simulation Profile and setting up the simulation 4) Simulating the circuit and observing the simulation results Procedure for creating a new project A new project will be created using the following steps: 1) Start ORCAD ) Start All Programs OrCAD 10.3 Capture CIS. 3) Create a New Project: File New Project. 4) Enter Project Name and Location. 5) Select Analog or Mixed A/D. 6) Click OK. 7) Select Create a blank project and Click OK. A blank schematic diagram is created and will be popped up Procedure for drawing a schematic diagram To draw a schematic in Pspice, the following steps are generally need: 1) Select the required libraries and choose the required parts/components from the libraries. 2) Place the part in the schematic. 3) Select Wire option in parts menu and connect the parts in the schematic. 4) To place the ground on the circuit: Go to Place => Ground and connect the ground to the circuit. 5) Save the schematic. Now the schematic is ready for simulation.

5 Procedure for setting up a new simulation profile Simulation profiles tell PSpice what type of analysis is desired. Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If simulation profile is already created and would like to edit it, go to Edit Simulation Profile option. Choose required analysis type from the drop down menu. Adjust the settings as per requirements and say OK. The required simulation profile is created Procedure for running the PSpice simulation After creating the new simulation profile, the circuit is ready to simulate. It is done by using the PSpice -> Run command. A new window (the simulation window) will pop up. Any errors in the circuit will be displayed on the bottom left text window. Debug the errors before proceeding furthur. If there are no errors, do one of two things: plot data on the simulation window or display the DC calculations on your schematic Procedure for viewing the simulation results 1) Add traces to the probe window 2) Use cursors to analyze waveforms 3) Check the output file, if needed 4) Save or print the results 1.4 PROCEDURES REQUIRED FOR CARRYING OUT DIFFERENT TYPES OF CIRCUIT ANALYSES Procedure for bias point analysis (DC Calculations) Bias point analysis is carriedout using the following steps: 1) Create a new simulation profile for bias point analysis 2) Choose the analysis type from the drop down menu as: General Settings 3) Press OK and then simulate the circuit using run option.

6 225 4) To display DC bias voltages and currents on the circuit after running the simulation, go to PSpice => Bias Points, and check Enable, Enable Bias Current Display, and/or Enable Bias Voltage Display. Current and/or voltage values are displayed in the circuit Procedure for DC sweep analysis The DC sweep analysis causes a DC sweep to be performed on the circuit that allows you to sweep a source (voltage or current), through a range of values. The following steps are used to perform the DC sweep analysis. 1) Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If you already have a profile and would like to edit it, go to Edit Simulation Profile 2) Choose the analysis type from the drop down menu as DC sweep. 3) Adjust the settings as per requirements. 4) Options: Primary Sweep 5) Sweep Variable: Voltage Source 6) Type in the name of the source you are sweeping (V 1 or V 2 ). 7) Select Sweep Type: Linear (this is so you can sweep through a range of values) 8) Set the Start, End, and Increment Values and Press OK. 9) Simulate the circuit using run command. 10) Once the simulation is finished a Probe window will open. From the TRACE menu select ADD TRACE and select the voltages and current required to display Procedure for transient response Transient analysis deals with the behavior of a circuit as a function of time. It calculates the behavior of the circuit over time. The transient response analysis causes the response of the circuit to be calculated from TIME = 0 to a specified time. Pulse source is used for transient analysis of the Hybrid NOT gate. The symbol of pulse source is PULSE, and the general form is: PULSE (V 1 V 2 TD TR TF PW PER), where, V 1 and V 2 must be

7 226 specified by the user and can be either voltages and currents. TD is delay time, TR is rise time, TF is fall time, PW is pulse width and PER is period. The transient analysis is carried out using the following steps: 1) Use the PSpice -> New Simulation Profile command to invoke the simulation setting window. If you already have a profile and would like to edit it, go to Edit Simulation Profile. 2) Select the analysis type from the drop down menu as Time Domain (Transient). 3) Adjust the settings as per requirements. Set the appropriate value for Run to time. 4) Select PSpice -> Run from the top menu bar to run the simulation. 1.5 CREATING MODELS USING PSPICE A model defines the behavior of a part. PSpice has built-in algorithms or models that describe the behavior of many device types. The behavior of these built-in models is described by a set of model parameters. One can define the behavior for a device that is based on a built-in model by using the corresponding model parameters. The simulation models are based on PSpice-provided templates and are a new addition to the PSpice model library. Simulation models that are based on PSpice provided templates are also referred to as parameterized models. Parameterized models are specified in terms of model parameters. Changing a parameter changes the behavior of the model. Template-based PSpice models describe the analog simulation behavior of a device in terms of parametric equations. The PSpice-provided templates are available in the TEMPLATES. LIB file. The main advantage of using template-based models is that simulation parameter values can be passed as properties from Capture. Model editor tool can be used to create models in OrCAD Capture. The model editor can be used to derive models from data sheet curves

8 227 provided by manufacturers or to create models based on PSpice-provided templates. The Model Editor converts information that you enter from the device manufacturer's data sheet into model parameter sets using PSpice.MODEL syntax. The most common way to characterize models is to enter data sheet information for each device characteristic. After satisfied with the behavior of each characteristic, one can have the Model Editor estimate (or extract) the corresponding model parameters and generate a graph showing the behavior of the characteristic. This is called the fitting process. Repeat this process, and when satisfied with the results, save them; the Model Editor creates model libraries containing appropriate model and subcircuit definitions Procedure for creating models based on PSpice templates An important advantage of using the template-based PSpice models is that you can pass simulation parameters as properties from the schematic editor. To create a template-based PSpice model, complete the following steps. 1) In Model Editor, create a new library or open an existing library. 2) From the Model menu, choose New. 3) Specify the name of the new model in the Model Name text box. 4) Select the Use Templates option. 5) From the Model drop-down list, select the device type.depending of the device type, you may have to provide some other details. For example, if the device type is Bipolar Transistor, it is also required to specify if the BJT will be of NPN or PNP type. 6) Click OK. The Simulation parameters window appears with the default values of all simulation parameters. These values are editable and can be modified as required.

9 IMPLEMENTATION OF HIERARCHICAL HYBRID CIRCUITS USING ORCAD CAPTURE Combinational hybrid circuits like half adder, full adder, 4 bit adder and sequential hybrid circuits like clocked hybrid RS latch, hybrid JK flip flop, master slave hybrid JK flip flop, hybrid D latch and clocked hybrid D latch have been implemented using hierarchical design procedure with OrCAD Capture. A bottom up design procedure is used for implementing the hybrid combinational circuits. Creating larger and complex circuit blocks by instantiating smaller circuit blocks is called hierarchical design. A design procedure in which first create lowest level smaller circuit block and then create larger and complex hierarchical circuit blocks for these lowest-level circuit blocks is called bottom up design procedure. To create a hierarchical design using the bottom-up procedure, the following steps are required. -Create the lowest-level design. -Create higher-level designs that instantiate the lower-level designs in the form of hierarchical blocks. The steps involved are: 1) Creating a project in Capture. 2) Creating the lowest-level design. In the full adder design example, the lowest-level design is the half adder design. 3) Creating the higher-level design. Create a schematic for the full adder design that uses the half adder design created in the previous step. In the following, the procedure for creating hierarchical design of full adder is explained Procedure for implementing full adder circuit An example To begin with, create a design in Capture by name for example fulladd.dsn. Then follow the steps given below to create hierarchical full adder design using bottom up methodology.

10 229 1) In the Project Manager window, right-click on fulladd.dsn and select New Schematic. 2) In the New Schematic dialog box, specify the name of the new schematic folder as FULLADD and click OK. 3) In the Project Manager window, the FULLADD folder appears below fulladd.dsn. 4) Save the design. 5) To make the full adder circuit as the root design (high-level design), right-click on FULLADD and from the pop-up menu select Make Root. The FULLADD folder moves up and a forward slash appears in the folder. 6) Right-click on FULLADD and select New Page. 7) In the New Page in schematic: FULLADD dialog box, specify the page name as FULLADD and click OK. A new page, FULLADD, gets added below the schematic folder FULLADD. 8) Double-click the FULLADD page to open it for editing. 9) From the Place menu, choose Hierarchical Block. 10) In the Place Hierarchical Block dialog box, specify the reference as HALFADD_A1. 11) Specify the Implementation Type as Schematic View. 12) Specify the Implementation name as HALFADD and click OK. The cursor changes to a crosshair. 13) Draw a rectangle on the schematic page. A hierarchical block with input and output ports is displayed on the page. X Y SUM CARRY HALFADD_B1 14) If required, resize the block. Also, reposition the input and output ports on the block.

11 230 To verify if the hierarchical block is correct, right-click on the block and select Descend Hierarchy. The half adder design you created earlier should appear. 15) Place another instance of the hierarchical block on the schematic page. a) Select the hierarchical block. b) From the Edit menu, choose Copy. c) From the Edit menu, choose Paste. d) Place the instance of the block at the desired location. 16) By default, the reference designator for the second hierarchical block is HALFADD_A2. Double-click on the reference designator, and change the reference value to HALFADD_B1. 17) Using the Place Part dialog box, add an OR gate to the schematic. 18) To connect the blocks, add wires to the circuit. From the Place menu, choose Wire. 19) Draw wires from all four ports on each of the hierarchical blocks. 20) Add wires until all the connections are made as shown in the figure below. 21) Add stimulus and input and output ports. 22) Save the design. Now the full adder hierarchical design is ready for simulation and it can be simulated using the simulation procedure already explained.

12 231 APPENDIX-B PAPER PUBLICATION FROM JOURNAL

Getting started. Starting Capture. To start Capture. This chapter describes how to start OrCAD Capture.

Getting started. Starting Capture. To start Capture. This chapter describes how to start OrCAD Capture. Getting started 1 This chapter describes how to start OrCAD Capture. Starting Capture The OrCAD Release 9 installation process puts Capture in the \PROGRAM FILES\ORCAD\CAPTURE folder, and adds Pspice Student

More information

PSpice with Orcad 10

PSpice with Orcad 10 PSpice with Orcad 10 1. Creating Circuits Using PSpice Tutorial 2. AC Analysis 3. Step Response 4. Dependent Sources 5. Variable Phase VSin Source Page 1 of 29 Creating Circuits using PSpice Start Orcad

More information

1. Working with PSpice:

1. Working with PSpice: Applied Electronics, Southwest Texas State University, 1, 13 1. Working with PSpice: PSpice is a circuit simulator. It uses the Kirchhoff s laws and the iv-relation of the used components to calculate

More information

PSpice Tutorial. Physics 160 Spring 2006

PSpice Tutorial. Physics 160 Spring 2006 PSpice Tutorial This is a tutorial designed to guide you through the simulation assignment included in the first homework set. You may either use the program as installed in the lab, or you may install

More information

Lesson 2: DC Bias Point Analysis

Lesson 2: DC Bias Point Analysis 2 Lesson 2: DC Bias Point Analysis Lesson Objectives After you complete this lesson you will be able to: Create a simulation profile for DC Bias analysis Netlist the design for simulation Run a DC Bias

More information

SCHEMATIC1 SCHEMATIC2 SCHEMATIC1 SCHEMATIC2 SCHEMATIC3 PAGE1 PAGE2 PAGE3 PAGE1 PAGE1 PAGE2 PAGE1 PAGE1 PAGE2

SCHEMATIC1 SCHEMATIC2 SCHEMATIC1 SCHEMATIC2 SCHEMATIC3 PAGE1 PAGE2 PAGE3 PAGE1 PAGE1 PAGE2 PAGE1 PAGE1 PAGE2 An OrCAD Tutorial Dr. S.S.Limaye 1. Introduction OrCAD is a suite of tools from Cadence company for the design and layout of printed circuit boards (PCBs). This is the most popular tool in the industry.

More information

1. INTRODUCTION. PSpice with OrCAD Capture (release 16.6 edition)

1. INTRODUCTION. PSpice with OrCAD Capture (release 16.6 edition) 1. INTRODUCTION SPICE (Simulation Program for Integrated Circuits Emphasis.) is a powerful general purpose analog and mixed-mode circuit simulator that is used to verify circuit designs and to predict

More information

There are three windows that are opened. The screen that you will probably spend the most time in is the SCHEMATIC page.

There are three windows that are opened. The screen that you will probably spend the most time in is the SCHEMATIC page. Pspice Tutorial Create a new project and select Analog or Mixed A/D. Choose an appropriate project name and a path. A new window pop up with the Pspice project type, select Create a blank project and click

More information

Lab 5: Circuit Simulation with PSPICE

Lab 5: Circuit Simulation with PSPICE Page 1 of 11 Laboratory Goals Introduce text-based PSPICE as a design tool Create transistor circuits using PSPICE Simulate output response for the designed circuits Introduce the Tektronics 571 Curve

More information

DC Circuit Simulation

DC Circuit Simulation Chapter 2 DC Circuit Simulation 2.1 Starting the Project Manager 1. Select Project Manager from the Start All Program Cadence Release 16.5 Project Manager. 2. Select Allegro PCB Designer (Schematic) from

More information

PSpice Analog and mixed signal simulation

PSpice Analog and mixed signal simulation PSpice Analog and mixed signal simulation You can count on PSpice for accurate circuit simulation results and regular innovations. PSpice has been tried and proven by thousands of engineers. Since the

More information

Simulation examples Chapter overview

Simulation examples Chapter overview Simulation examples 2 Chapter overview The examples in this chapter provide an introduction to the methods and tools for creating circuit designs, running simulations, and analyzing simulation results.

More information

Lesson 18: Creating a Hierarchical Block

Lesson 18: Creating a Hierarchical Block Lesson 18: Creating a Hierarchical Block Lesson Objectives After you complete this lesson you will be able to: Create hierarchical blocks Copying Schematics between Projects You can copy and paste between

More information

Lab 1: Analysis of DC and AC circuits using PSPICE

Lab 1: Analysis of DC and AC circuits using PSPICE Lab 1: Analysis of DC and AC circuits using PSPICE 1. Objectives. 1) Familiarize yourself with PSPICE simulation software environment. 2) Obtain confidence in performing DC and AC circuit simulation. 2.

More information

OrCad & Spice Tutorial By, Ronak Gandhi Syracuse University

OrCad & Spice Tutorial By, Ronak Gandhi Syracuse University OrCad & Spice Tutorial By, Ronak Gandhi Syracuse University Brief overview: OrCad is a suite of tools from Cadence for the design and layout of circuit design and PCB design. We are currently using version

More information

Getting Started with Orcad Lite, Release 9.2

Getting Started with Orcad Lite, Release 9.2 Getting Started with Orcad Lite, Release 9.2 Professor Robert Hofinger Purdue University - Columbus You start a new project (program) by going to the File menu in the upper left corner, then New, and then

More information

Cadence simulation technology for PCB design

Cadence simulation technology for PCB design DATASHEET CADENCE SIMULATION FOR PCB DESIGN On larger designs especially, PCB design teams need fast and reliable simulation to achieve convergence. Cadence simulation technology for PCB design offers

More information

Cadence Capture and PSpice Tutorial

Cadence Capture and PSpice Tutorial Cadence Capture and PSpice Tutorial This tutorial is intended to give you needed elements for using Cadence Capture and PSpice to design and simulate the digital logic circuit in Homework 2A, Problem 2.

More information

Setting up an initial ".tcshrc" file

Setting up an initial .tcshrc file ECE445 Fall 2005 Introduction to SaberSketch The SABER simulator is a tool for computer simulation of analog systems, digital systems and mixed signal systems. SaberDesigner consists of the three tools,

More information

TUTORIAL 1. V1.1 Update on Sept 17, 2003 ECE 755. Part 1: Design Architect IC

TUTORIAL 1. V1.1 Update on Sept 17, 2003 ECE 755. Part 1: Design Architect IC TUTORIAL 1 V1.1 Update on Sept 17, 2003 ECE 755 Part 1: Design Architect IC DA-IC provides a design environment comprising tools to create schematics, symbols and run simulations. The schematic editor

More information

ESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS)

ESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS) ESE 570 Cadence Lab Assignment 2: Introduction to Spectre, Manual Layout Drawing and Post Layout Simulation (PLS) Objective Part A: To become acquainted with Spectre (or HSpice) by simulating an inverter,

More information

EEC 118 Spring 2011 Lab #5 Manchester Carry-Chain Adder

EEC 118 Spring 2011 Lab #5 Manchester Carry-Chain Adder EEC 118 Spring 2011 Lab #5 Manchester Carry-Chain Adder Rajeevan Amirtharajah Dept. of Electrical and Computer Engineering University of California, Davis Issued: May 9, 2011 Due: May 20, 2011, 5 PM in

More information

Experiment 1 Introduction to PSpice

Experiment 1 Introduction to PSpice Experiment 1 Introduction to PSpice W.T. Yeung and R.T. Howe UC Berkeley EE 105 Fall 2003 1.0 Objective One of the CAD tools you will be using as an circuit designer is SPICE, a Berkeleydeveloped industry-standard

More information

Fundamentos de Electrónica Lab Guide

Fundamentos de Electrónica Lab Guide Fundamentos de Electrónica Lab Guide PSPICE IST-2016/2017 IST-2017/2018 21º nd Semester PSpice-Guide 1. Introduction SPICE is a simulator program for the project of electronic circuits. SPICE is the acronym

More information

EE 210 Lab Assignment #2: Intro to PSPICE

EE 210 Lab Assignment #2: Intro to PSPICE EE 210 Lab Assignment #2: Intro to PSPICE ITEMS REQUIRED None Non-formal Report due at the ASSIGNMENT beginning of the next lab no conclusion required Answers and results from all of the numbered, bolded

More information

Using P-SPICE Models for Vishay Siliconix Power MOSFETs

Using P-SPICE Models for Vishay Siliconix Power MOSFETs VISHAY SILICONIX Power MOSFETs Application Note 838 By Kandarp Pandya Introduction Vishay provides P-SPICE models for each of its power MOSFETs on the Vishay Web site, allowing design engineers to evaluate

More information

Introduction to FCE1

Introduction to FCE1 Universität Duisburg-Essen PRACTICAL TRAINING TO THE LECTURE Introduction to FCE1 Introduction to computer-aided design with OrCAD Name: First Name: Tutor: Matriculation-Number: Group-Number: Date: Prof.

More information

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group.

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group. Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Andrew Mason and the AMSaC lab group. Revision Notes: Aug. 2003 update and edit A. Mason add intro/revision/contents

More information

Cadence Tutorial D: Using Design Variables and Parametric Analysis Document Contents Introduction Using Design Variables Apply Apply

Cadence Tutorial D: Using Design Variables and Parametric Analysis Document Contents Introduction Using Design Variables Apply Apply Cadence Tutorial D: Using Design Variables and Parametric Analysis Created for the MSU VLSI program by Casey Wallace Last Updated by: Patrick O Hara SS15 Document Contents Introduction Using Design Variables

More information

EE115C Digital Electronic Circuits. Tutorial 2: Hierarchical Schematic and Simulation

EE115C Digital Electronic Circuits. Tutorial 2: Hierarchical Schematic and Simulation EE115C Digital Electronic Circuits Tutorial 2: Hierarchical Schematic and Simulation The objectives are to become familiar with Virtuoso schematic editor, learn how to create the symbol view of basic primitives,

More information

Figure 1: ADE Test Editor

Figure 1: ADE Test Editor Due to some issues that ADE GXL simulation environment has (probably because of inappropriate setup), we will run simulations in the ADE L design environment, which includes all the necessary tools that

More information

Copyright 2008 Linear Technology. All rights reserved. Getting Started

Copyright 2008 Linear Technology. All rights reserved. Getting Started Copyright. All rights reserved. Getting Started Copyright. All rights reserved. Draft a Design Using the Schematic Editor 14 Start with a New Schematic New Schematic Left click on the New Schematic symbol

More information

OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator

OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator Title: Product: Summary: Creating Design Hierarchy OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator This application note shows you how to create a hierarchical block using bottom-up or top-down method

More information

Analog IC Simulation. Mentor Graphics 2006

Analog IC Simulation. Mentor Graphics 2006 Analog IC Simulation Mentor Graphics 2006 Santa Clara University Department of Electrical Engineering Date of Last Revision: March 29, 2007 Table of Contents 1. Objective... 3 2. Basic Test Circuit Creation...

More information

Instructions for EE 42 PSpice Assignment

Instructions for EE 42 PSpice Assignment Instructions for EE 42 PSpice Assignment This assignment gives you an introduction to the SPICE circuit simulator. You will use the PSpice version of it to analyze a few problems from previous homework

More information

EEC 116 Fall 2011 Lab #3: Digital Simulation Tutorial

EEC 116 Fall 2011 Lab #3: Digital Simulation Tutorial EEC 116 Fall 2011 Lab #3: Digital Simulation Tutorial Dept. of Electrical and Computer Engineering University of California, Davis Issued: October 10, 2011 Due: October 19, 2011, 4PM Reading: Rabaey Insert

More information

Using PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I

Using PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I Using PSpice to Simulate Transmission Lines K. A. Connor Summer 2000 Fields and Waves I We want to produce the image shown above as a screen capture or below as the schematic of this circuit. R1 V1 25

More information

DOWNLOAD PDF CADENCE WAVEFORM CALCULATOR USER GUIDE

DOWNLOAD PDF CADENCE WAVEFORM CALCULATOR USER GUIDE Chapter 1 : CSE / Cadence Tutorial The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems

More information

LTSPICE MANUAL. For Teaching Module EE4415 ZHENG HAUN QUN. December 2016

LTSPICE MANUAL. For Teaching Module EE4415 ZHENG HAUN QUN. December 2016 LTSPICE MANUAL For Teaching Module EE4415 ZHENG HAUN QUN December 2016 DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINNERING NATIONAL UNIVERSITY OF SINGAPORE Contents 1. Introduction... 2 1.1 Installation...

More information

SPICE Models: ROHM Voltage Detector ICs

SPICE Models: ROHM Voltage Detector ICs SPICE Models: ROHM Voltage Detector ICs BD48 G/FVE,BD49 G/FVE,BD52 G/FVE,BD53 G/FVE, No.10006EAY01 1. INTRODUCTION 1.1 SPICE SPICE is a general-purpose circuit-simulation program for nonlinear DC, nonlinear

More information

Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial

Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial Cadence Virtuoso Schematic Design and Circuit Simulation Tutorial Introduction This tutorial is an introduction to schematic capture and circuit simulation for ENGN1600 using Cadence Virtuoso. These courses

More information

Pspice Tutorial for ELEN 3081 Written by Menachem Gielchinsky

Pspice Tutorial for ELEN 3081 Written by Menachem Gielchinsky Introduction Pspice Tutorial for ELEN 3081 Written by Menachem Gielchinsky Welcome to Pspice. Pspice is a program Electrical Engineers use to simulate circuits. In the past an older program known as Hspice

More information

SOUTHERN POLYTECHNIC S. U.

SOUTHERN POLYTECHNIC S. U. SOUTHERN POLYTECHNIC S. U. ECET 1012 Laboratory Exercise #4 ELECTRICAL & COMPUTER ENGINEERING TECHNOLOGY Introduction to PSpice Name Lab Section Date Overview: This laboratory experiment introduces the

More information

CMOS Design Lab Manual

CMOS Design Lab Manual CMOS Design Lab Manual Developed By University Program Team CoreEl Technologies (I) Pvt. Ltd. 1 Objective Objective of this lab is to learn the Mentor Graphics HEP2 tools as well learn the flow of the

More information

Lab 1 Modular Design and Testbench Simulation ENGIN 341 Advanced Digital Design University of Massachusetts Boston

Lab 1 Modular Design and Testbench Simulation ENGIN 341 Advanced Digital Design University of Massachusetts Boston Lab 1 Modular Design and Testbench Simulation ENGIN 341 Advanced Digital Design University of Massachusetts Boston Introduction This lab introduces the concept of modular design by guiding you through

More information

EE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits

EE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits EE 330 Spring 2018 Laboratory 2: Basic Boolean Circuits Contents Objective:... 2 Part 1: Introduction... 2 Part 2 Simulation of a CMOS Inverter... 3 Part 2.1 Attaching technology information... 3 Part

More information

Orcad Tutorial: Oscillator design and Simulation Schematic Design and Simulation in Orcad Capture CIS Full Version

Orcad Tutorial: Oscillator design and Simulation Schematic Design and Simulation in Orcad Capture CIS Full Version Orcad Tutorial: Oscillator design and Simulation Prof. Law Schematic Design and Simulation in Orcad Capture CIS Full Version Notation: To simplify what one should click to perform a task, the following

More information

CS755 CAD TOOL TUTORIAL

CS755 CAD TOOL TUTORIAL CS755 CAD TOOL TUTORIAL CREATING SCHEMATIC IN CADENCE Shi-Ting Zhou shi-ting@cs.wisc.edu After you have figured out what you want to design, and drafted some pictures and diagrams, it s time to input schematics

More information

Cadence Tutorial C: Simulating DC and Timing Characteristics 1

Cadence Tutorial C: Simulating DC and Timing Characteristics 1 Cadence Tutorial C: Simulating DC and Timing Characteristics Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group Last updated by Patrick O Hara SS15 Document Contents Introduction

More information

Revision Notes: July2004 Generate tutorial for single transistor analysis. Based on existing schematic entry tutorial developed for ECE410

Revision Notes: July2004 Generate tutorial for single transistor analysis. Based on existing schematic entry tutorial developed for ECE410 Cadence Analog Tutorial 1: Schematic Entry and Transistor Characterization Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group. Revision Notes: July2004 Generate tutorial for

More information

CPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2)

CPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2) CPE/EE 427, CPE 527, VLSI Design I: Tutorial #2, Schematic Capture, DC Analysis, Transient Analysis (Inverter, NAND2) Joel Wilder, Aleksandar Milenkovic, ECE Dept., The University of Alabama in Huntsville

More information

OrCAD, Pspice 복습 OrCAD and PSpice PSpice is a SPICE analog circuit and digital logic simulation program for Microsoft Windows. The name is an acronym for Personal Simulation Program with Integrated Circuit

More information

Parag Choudhary Engineering Architect

Parag Choudhary Engineering Architect Parag Choudhary Engineering Architect Agenda Overview of Design Trends & Designer Challenges PCB Virtual Prototyping in PSpice Simulator extensions for Models and Abstraction levels Examples of a coding

More information

EE 471: Transport Phenomena in Solid State Devices

EE 471: Transport Phenomena in Solid State Devices EE 471: Transport Phenomena in Solid State Devices HW7 Due: 4/17/18 For this homework, you will download a free PC version of the industry standard SPICE circuit simulator called LTspice, provided by Linear

More information

Introduction to laboratory exercises in Digital IC Design.

Introduction to laboratory exercises in Digital IC Design. Introduction to laboratory exercises in Digital IC Design. A digital ASIC typically consists of four parts: Controller, datapath, memory, and I/O. The digital ASIC below, which is an FFT/IFFT co-processor,

More information

What s New OrCAD 16.6 Quarterly Incremental Release #7

What s New OrCAD 16.6 Quarterly Incremental Release #7 What s New OrCAD 16.6 Quarterly Incremental Release #7 Josh Moore Director Product Marketing Cadence OrCAD Solutions Parag Choudhary Product Engineering Cadence OrCAD Solutions Additional Material and

More information

PSpice Simulation Using isppac SPICE Models and PAC-Designer

PSpice Simulation Using isppac SPICE Models and PAC-Designer PSpice Simulation Using isppac SPICE Models Introduction PAC-Designer software, a Windows-based design tool from Lattice Semiconductor gives users the capability to graphically design analog filters and

More information

Introduction to PSpice

Introduction to PSpice Introduction to PSpice Simulation Software 1 The Origins of SPICE In the 1960 s, simulation software begins CANCER Computer Analysis of Nonlinear Circuits, Excluding Radiation Developed at the University

More information

Lesson 19: Processing a Hierarchical Design

Lesson 19: Processing a Hierarchical Design Lesson 19: Processing a Hierarchical Design Lesson Objectives After you complete this lesson you will be able to: Annotate a hierarchical design Perform a Design Rule Check on a hierarchical design Correct

More information

SystemVision Example: H-Bridge SPICE Motor Controller

SystemVision Example: H-Bridge SPICE Motor Controller SystemVision Example: H-Bridge SPICE Motor Controller Copyright Mentor Graphics Corporation 2003 All Rights Reserved. This document contains information that is proprietary to Mentor Graphics Corporation.

More information

Previous versions supported SIMPLIS only. Now DVM has been enhanced to allow design verification using the SIMetrix simulator.

Previous versions supported SIMPLIS only. Now DVM has been enhanced to allow design verification using the SIMetrix simulator. RELEASE NOTES VERSION 6.1 O VERVIEW This document describes SIMetrix and SIMetrix/SIMPLIS version 6.1 DESIGN VERIFICATION MODULE SUPPORT FOR SIMETRIX Previous versions supported SIMPLIS only. Now DVM has

More information

PDK-Based Analog/Mixed-Signal/RF Design Flow 11/17/05

PDK-Based Analog/Mixed-Signal/RF Design Flow 11/17/05 PDK-Based Analog/Mixed-Signal/RF Design Flow 11/17/05 Silvaco s What is a PDK? Which people build, use, and support PDKs? How do analog/mixed-signal/rf engineers use a PDK to design ICs? What is an analog/mixed-signal/rf

More information

TUTORIAL How to Use the SPICE Module

TUTORIAL How to Use the SPICE Module TUTORIAL How to Use the SPICE Module February 2018 1 1. Overview The SPICE Module is an add-on option in PSIM. Powered by CoolSPICE developed by CoolCAD Electronics LLC., the SPICE Module provides a SPICE

More information

Cadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter

Cadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter Cadence Tutorial: Schematic Entry and Circuit Simulation of a CMOS Inverter Introduction This tutorial describes the steps involved in the design and simulation of a CMOS inverter using the Cadence Virtuoso

More information

SmartSpice Verilog-A Interface. Behavioral and Structural Modeling Tool - Device Model Development

SmartSpice Verilog-A Interface. Behavioral and Structural Modeling Tool - Device Model Development SmartSpice Verilog-A Interface Behavioral and Structural Modeling Tool - Device Model Development Verilog-A Models and Features Agenda Overview Design Capability Compact Modeling Verilog-A Inteface - 2

More information

Figure C-4 Captured PSpice design schematic (via screen capture)

Figure C-4 Captured PSpice design schematic (via screen capture) Ports from Cadence ORCAD (PSpice): Cadence is the company name (and the folder where you ll find this electronics CAD suite of applications), and ORCAD is the particular CAD application used for design.

More information

TUTORIAL How to Use the SPICE Module

TUTORIAL How to Use the SPICE Module TUTORIAL How to Use the SPICE Module November 2017 1 1. Overview The SPICE Module is an add-on option in PSIM. Powered by CoolSPICE developed by CoolCAD Electronics LLC., the SPICE Module provides a SPICE

More information

Generating a hierarchical Part. OrCAD Capture, OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator

Generating a hierarchical Part. OrCAD Capture, OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator Title: Product: Summary: Generating a hierarchical Part OrCAD Capture, OrCAD PSpice A/D, OrCAD PSpice AA and AMS Simulator This application note shows you how to generate a hierarchical part based on a

More information

MENTOR GRAPHICS IC DESIGN MANUAL. Schematic & Simulation. Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun

MENTOR GRAPHICS IC DESIGN MANUAL. Schematic & Simulation. Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun MENTOR GRAPHICS IC DESIGN MANUAL Schematic & Simulation By Gun Jun K Praveen Jayakar Thomas Zheng Huan Qun August 2004 Signal Processing & VLSI Design Laboratory Department of Electrical & Computer Engineering

More information

OrCAD Lite Products Reference

OrCAD Lite Products Reference Version 17.2 Updated on: September 17, 2018 1991 2018 Cadence Design Systems, Inc. All rights reserved. Portions Apache Software Foundation, Sun Microsystems, Free Software Foundation, Inc., Regents of

More information

CS/EE 5720/6720 Analog IC Design Tutorial for Schematic Design and Analysis using Spectre

CS/EE 5720/6720 Analog IC Design Tutorial for Schematic Design and Analysis using Spectre CS/EE 5720/6720 Analog IC Design Tutorial for Schematic Design and Analysis using Spectre Introduction to Cadence EDA: The Cadence toolset is a complete microchip EDA (Electronic Design Automation) system,

More information

One possible window configuration preferences for debug cycles

One possible window configuration preferences for debug cycles NEW USER S TUTORIAL Welcome to ICAP/4, Intusoft s suite of analog and mixed-signal simulation products. There is also a New User s Tutorial 2 as follow-on to this tutorial for non-icap/4rx products. Let

More information

LTspice Getting Started Guide. Copyright 2007 Linear Technology. All rights reserved.

LTspice Getting Started Guide. Copyright 2007 Linear Technology. All rights reserved. Copyright 2007 Linear Technology. All rights reserved. Why Use LTspice? Stable SPICE circuit simulation with Unlimited number of nodes Schematic/symbol editor Waveform viewer Library of passive devices

More information

Verilog Design Entry, Synthesis, and Behavioral Simulation

Verilog Design Entry, Synthesis, and Behavioral Simulation ------------------------------------------------------------- PURPOSE - This lab will present a brief overview of a typical design flow and then will start to walk you through some typical tasks and familiarize

More information

Lab 2. Standard Cell layout.

Lab 2. Standard Cell layout. Lab 2. Standard Cell layout. The purpose of this lab is to demonstrate CMOS-standard cell design. Use the lab instructions and the cadence manual (http://www.es.lth.se/ugradcourses/cadsys/cadence.html)

More information

How to Get Started. Figure 3

How to Get Started. Figure 3 Tutorial PSpice How to Get Started To start a simulation, begin by going to the Start button on the Windows toolbar, then select Engineering Tools, then OrCAD Demo. From now on the document menu selection

More information

GETTING STARTED WITH ADS

GETTING STARTED WITH ADS ADS Startup Tutorial v2 Page 1 of 17 GETTING STARTED WITH ADS Advanced Design System (ADS) from Agilent Technologies is an extremely powerful design tool for many aspects of electrical and computer engineering

More information

10-MINUTE TUTORIAL DIGITAL LOGIC CIRCUIT MODELING AND SIMULATION WITH MULTISIM

10-MINUTE TUTORIAL DIGITAL LOGIC CIRCUIT MODELING AND SIMULATION WITH MULTISIM 1-MINUTE TUTORIAL DIGITAL LOGIC CIRCUIT MODELING AND SIMULATION WITH MULTISIM Multisim is a schematic capture and simulation program for analog, digital and mixed analog/digital circuits, and is one application

More information

Using Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine

Using Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine Using Cadence Virtuoso, a UNIX based OrCAD PSpice like program, Remotely on a Windows Machine A. Launch PuTTY. 1. Load the Saved Session that has Enable X11 forwarding and the Host Name is cvl.ece.vt.edu.

More information

OrCAD && PSPICE

OrCAD && PSPICE כלי תוכנה להנדסת חשמל ומחשבים 361-1-1041 OrCAD && PSPICE 361-1-1041 כל י תוכנ ה ל הנד סת חש מל ו מח שבים 2 Introduction OrCAD OrCAD products offer a total solution for core design tasks: schematic- and

More information

EXPERIMENT NUMBER 7 HIERARCHICAL DESIGN OF A FOUR BIT ADDER (EDA-2)

EXPERIMENT NUMBER 7 HIERARCHICAL DESIGN OF A FOUR BIT ADDER (EDA-2) 7-1 EXPERIMENT NUMBER 7 HIERARCHICAL DESIGN OF A FOUR BIT ADDER (EDA-2) Purpose The purpose of this exercise is to explore more advanced features of schematic based design. In particular you will go through

More information

Cadence Tutorial. Introduction to Cadence 0.18um, Implementation and Simulation of an inverter. A. Moradi, A. Miled et M. Sawan

Cadence Tutorial. Introduction to Cadence 0.18um, Implementation and Simulation of an inverter. A. Moradi, A. Miled et M. Sawan Cadence Tutorial Introduction to Cadence 0.18um, Implementation and Simulation of an inverter A. Moradi, A. Miled et M. Sawan Section 1: Introduction to Cadence You will see how to create a new library

More information

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group.

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group. Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group. Revision Notes: Jan. 2006 Updated for use with spectre simulator

More information

Cadence SPB: What s New in 16.6 QIR 8 (HotFix 38)

Cadence SPB: What s New in 16.6 QIR 8 (HotFix 38) Cadence SPB: What s New in 16.6 QIR 8 (HotFix 38) This document describes the new features and enhancements in Cadence SPB products in 16.6 Quarterly Incremental Release (QIR) 8- HotFix38. The products

More information

PSpice Optimizer. User s Guide

PSpice Optimizer. User s Guide PSpice Optimizer User s Guide Copyright 1985-2000 Cadence Design Systems, Inc. All rights reserved. Trademarks Allegro, Ambit, BuildGates, Cadence, Cadence logo, Concept, Diva, Dracula, Gate Ensemble,

More information

How To Plot Transconductance and Even More. By Ruida Yun

How To Plot Transconductance and Even More. By Ruida Yun How To Plot Transconductance and Even More By Ruida Yun g m /I d based methodology is preferred for short-channel length analog circuit design however there is no GUI support for this method in the current

More information

EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25

EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25 EET2141 Project 2: Binary Adder Using Xilinx 7.1i Due Friday April 25 Introduction This Xilinx project introduces the characteristics of the ripple carry adder. From the last project, you learned that

More information

Parameter Sweep. Description. Setup. Parameters. Modified by on 13-Sep-2017

Parameter Sweep. Description. Setup. Parameters. Modified by on 13-Sep-2017 Parameter Sweep Old Content - visit altium.com/documentation Modified by on 13-Sep-2017 Description The Parameter Sweep feature allows you to sweep the value of a device in defined increments, over a specified

More information

EECS 211 CAD Tutorial. 1. Introduction

EECS 211 CAD Tutorial. 1. Introduction EECS 211 CAD Tutorial 1. Introduction This tutorial has been devised to run through all the steps involved in the design and simulation of an audio tone control amplifier using the Mentor Graphics CAD

More information

Lab 1: Cadence Custom IC design tools- Setup, Schematic capture and simulation

Lab 1: Cadence Custom IC design tools- Setup, Schematic capture and simulation Lab 1: Cadence Custom IC design tools- Setup, Schematic capture and simulation Brittany Duffy EE 330- Integrated Electronics Lab Section B Professor Randy Geiger 1/24/13 Introduction The main goal of this

More information

Appendix. Using OrCAD. Setup OrCAD

Appendix. Using OrCAD. Setup OrCAD Using OrCAD Appendix B Setup OrCAD T install OrCAD pen the flder disk and the run the file setup.exe, then fllw the setup wizard as shwn in the fllwing windws: 1 1 Starting OrCAD T start OrCAD, press Start

More information

Verilog Tutorial (Structure, Test)

Verilog Tutorial (Structure, Test) Digital Circuit Design and Language Verilog Tutorial (Structure, Test) Chang, Ik Joon Kyunghee University Hierarchical Design Top-down Design Methodology Bottom-up Design Methodology Module START Example)

More information

TUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION

TUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION TUTORIAL II ECE 555 / 755 Updated on September 11 th 2006 CADENCE LAYOUT AND PARASITIC EXTRACTION After finishing a schematic of your design (Tutorial-I), the next step is creating masks which are for

More information

Defining & Running Circuit Simulation Analyses

Defining & Running Circuit Simulation Analyses Defining & Running Circuit Simulation Analyses Summary Tutorial TU0106 (v1.6) April 20, 2008 This tutorial looks at creating a schematic of an analog filter design that is set up for circuit simulation.

More information

Laboratory 3. EE 342 (VLSI Circuit Design) - Using Spectre netlist and Calculator for simulation

Laboratory 3. EE 342 (VLSI Circuit Design) - Using Spectre netlist and Calculator for simulation EE 342 (VLSI Circuit Design) Laboratory 3 - Using Spectre netlist and Calculator for simulation By Mulong Li, 2013 1 Background knowledge Spectre: is a SPICE-class circuit simulator. It provides the basic

More information

Some of the above changes have been made to accommodate Windows Vista User Access Control which write protects the Program Files tree.

Some of the above changes have been made to accommodate Windows Vista User Access Control which write protects the Program Files tree. RELEASE NOTES SIMETRIX 5.4 NOTES This document describes the new features and changes for version 5.4. L ICENSING If you have current maintenance, you should already have been issued with a license file

More information

6. Latches and Memories

6. Latches and Memories 6 Latches and Memories This chapter . RS Latch The RS Latch, also called Set-Reset Flip Flop (SR FF), transforms a pulse into a continuous state. The RS latch can be made up of two interconnected

More information

Tutorial 3: Using the Waveform Viewer Introduces the basics of using the waveform viewer. Read Tutorial SIMPLIS Tutorials SIMPLIS provide a range of t

Tutorial 3: Using the Waveform Viewer Introduces the basics of using the waveform viewer. Read Tutorial SIMPLIS Tutorials SIMPLIS provide a range of t Tutorials Introductory Tutorials These tutorials are designed to give new users a basic understanding of how to use SIMetrix and SIMetrix/SIMPLIS. Tutorial 1: Getting Started Guides you through getting

More information

FACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT

FACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT FACULTY OF ENGINEERING MULTIMEDIA UNIVERSITY LAB SHEET DIGITAL INTEGRATED CIRCUIT DIC1: Schematic Design Entry, Simulation & Verification DIC2: Schematic Driven Layout Drawing (SDL) Design Rule Check (DRC)

More information

Intro to Cadence. Brady Salz. ECE483 Spring 17

Intro to Cadence. Brady Salz. ECE483 Spring 17 Intro to Cadence Brady Salz ECE483 Spring 17 What We re Doing Learn you a Cadence Learn simulation vocabulary Basic schematic guidelines Simulation results Init Before we begin, open a terminal: $ module

More information