A Petri Net Approach for. Performance Oriented Parallel Program Design. A. Ferscha. Institut fur Statistik und Informatik, Universitat Wien

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1 A eri Ne Approach for erformance Oriened arallel rogram Design A. Ferscha Insiu fur Saisik und Informaik, Universia Wien Lenaugasse 2/8, A-1080 Vienna, AUSTRIA Tel.: , Fax: A4424DAB@AWIUNI11.BITNET 1

2 roposed running head: erformance Oriened arallel rogram Design A. Ferscha Insiu fur Saisik und Informaik, Universia Wien Lenaugasse 2/8, A-1080 Vienna, AUSTRIA, Tel.: , Fax.: A4424DAB@AWIUNI11.BITNET Absrac erformance orienaion in he developmen process of parallel sofware is moivaed by oulining he misconcepion of curren approaches where performance acivies come in a he very end of he developmen, mainly in erms of measuremen or monioring afer he implemenaion phase. A ha ime major par of he developmen work is already done, and performance pifalls are very hard o repair - if his is possible a all. A developmen process for parallel programs ha launches performance engineering in he early design phase is proposed, based on a eri ne specicaion mehodology for he performance criical pars of a parallel sysem. The eri ne formalism is used o dene rogram Resource Mapping-ne (RM-ne) models, ha serve as an inegraed performance model of parallel processing sysems, combining performance characerisics of parallel programs (-ne), parallel hardware (R-ne) and he assignmen of programs o hardware (Mapping) ino a single performance model, while simulaneously represening he specicaion of a parallel applicaion. redicable parallel algorihm skeleons are worked ou as RM-ne models o simulaneously serve as generic program emplaes o be insaniaed according o specic needs, hus represening he saring poin of he developmen process. The sysemaic inegraion of a se of ools supporing performance oriened parallel programming resuls in he CASE (Compuer Aided arallel Sofware Engineering) environmen, which is being buil around he RM-ne mehodology. Specicaion and performance predicion of parallel applicaions a he algorihm srucure level are demonsraed by example. 2

3 1 Inroducion Alhough he skills in developing parallel algorihms and programs are growing wih he use of parallel and massively parallel hardware [16], here are no general developmen rules or guidelines in order o be conform wih he primary moivaion for using his echnology, i.e. gaining maximum performance from he hardware. I is clear a leas oday, ha peak performance (he heoreical upper limi of machine insrucions execued per ime uni) and performance aainable by a `pracical' applicaion ofen diverge by orders of magniude. Summarizing curren eors o escape from he `parallel sofware'-crises shows, ha alarmingly few aenion is given o he mos criical issue in his concern, namely performance: Compiler Approach Vecorizing compilers have been successfully used for resrucuring innermos loops of programs o be execued on vecor processors [2] arallelizing compilers [46] ry o exrac parallelism a he insrucion and/or loop level, hus making explici parallel programming and he parallelizaion of exising code unnecessary. The compiler approach seems promising in he deecion and exploiaion of ne grain parallelism, bu is no realisic for large grain parallelism [29]. Hence we can expec saisfacory eciency only for a small subclass of parallel archiecures (SIMD). arallel Languages A broad specrum of programming languages [40] for coding parallel applicaions has been developed inuenced by communicaion and synchronizaion mechanisms [3], as well as by programming paradigms as such [5]. A leas imperaive parallel languages are relaively easy o implemen, and reec o some exen he underlying hardware model, so ha he programmer can embody his applicaion domain knowledge o opimally pariion and assign his problem. However, he is ofen concerned wih he burden of correcly managing communicaion and synchronizaion, which is overwhelming his menal capaciy. The funcional, logic and objec oriened approaches ry o relief his burden by providing higher expressiveness of he language, bu considerably complicae implemenaion [44]. Theoreical approaches of parallel programming [9] are sill far from ecien implemenaions. Suppor for parallel programming a a higher level of absracion o ge rid of he underlying hardware is given by language consrucs for manipulaing a shared daa srucure like he Linda uple space [8], bu again ecien implemenaions are lacking. The language approach ends o follow he same developmen as sequenial languages (from hird o forh and fh generaion) by absracing more and more from machine models and hus enlarging expressiveness. No aemps seem o be underaken o suppor any kind of performance analysis a he language level. 3

4 Environmens The needs for oolses assising program developen for parallel machines have rs been addressed in environmenal prooypes like he FAUST [25] or he CODE [7] projec. Recen advances like he SE projec [31] address arge machine independen design and implemenaion of parallel sofware sysems based on large grain daa ow using a graphical and hierarchical consrucion of realisically sized programs. Working projecs deal e.g. wih source code generaion from exual/graphical design, code visualizaion in erms of annoaed graphs like in aragraph [4], concurrency analysis of Ada asking programs in Toal, visualizaion and ineracive parallelizaion of Forran code in a C programs in Aspar, daaow and saic dependency analysis ec. [26]. Wih respec o performance he focus is on visualizaion ools [39], all of which use some combinaion of color, graphics, animaion and even sound o presen performance daa of execuing programs on he y, or raced daa (gahered by sofware or hardware moniors) pos morem. Examples for resource uilizaion visualizaion are he Sysem erformance Displayer [41], or he aragraph environmen [27], which akes execuion prole daa colleced from message passing parallel compuers o animae he behaviour of a parallel program in various modes of moion via several simulaneous views. The TraceView [32] ool has nealy he same aims for machines supporing smaller grained parallelism. The IS-2 insrumenaion sysem [34] suppors a hierarchical view of programs and provides performance daa for each level (program-, machine-, process-, procedure-, insrucion level). From his (seemingly represenaive) examples on developmen environmens we can conclude, ha he parallel program developmen suppor given is dominaed by radiional life cylce models for sequenial sofware. erformance engineering aciviies come ino he developmen process as soon as a running implemenaion of some parallel applicaion is a hand. Of course, a ha ime i is already oo lae for performance invesigaions, because pifalls deeced in he nal implemenaion would cause remendeous reimplemenaion eors, someimes even a redesign of he enire applicaion. This work is o be seen as an aemp in favour of a suppor o he process of developing parallel sofware. We rs propose performance oriened parallel program design and sysemaically describe a parallel sofware developmen cycle (Secion 2). In a second sep a eri ne based design mehodology inegraing funcional specicaion and performance evaluaion echniques (Secion 3) is inroduced. The desing process is concepually demonsraed for he specicaion of a general purpose, reusable applicaion emplae a he algorihm srucure level (Secion 4), and pracically performed in he CASE developmen environmen (Secion 5). 4

5 TOOLSUORT Algorihm Idea High Level Specificaion Implemenaion Skeleon Coding Execuable rogram Assignmen Running Version of Applicaion Hybrid Ediing, Diagramming rove Funcional Validiy erformance redicion Ediing Code Generaion Compiling, Debugging, Tesing Reusabiliy, Library Managemen erformance redicion By Hand lacemen Daa ariioning & Mapping rogram Decomposiion & Mapping Auomaed Mapping Tuning erformance Measuremen Efficien arallel Applicaion Visualizaion User Inerface Figure1: hases of arallel rogram Developmen. 2 erformance Oriened arallel rogram Design Compared o he radiional developmen process of sequenial sofware where performance issues are insucienly considered one is now (naurally) convinced ha performance evaluaion is a criical facor in he upcoming parallel sofware developmen mehodology. The challenges are o suppor he process of developing parallel sofware by eecive (auomaed) performance engineering during he whole sofware developmen cycle. In conras o approaches in he environmens presened above, in a performance oriened parallel program design performance engineering has o approach in he early design phases, accompanying his process unil he compleion of he applicaion. erformance engineering aciviies mus hence range from performance predicion in early developmen sages, performance analysis (boh based on analyical and simulaion modeling) in he deailed design and coding phase, o nally monioring and measuremens in he esing and correcion phase. The following seps are o be aken owards an ecien applicaion in he performance sense (gure 1 shows developmen phases as well as useful and demanded ool suppor.): For expressing he rough algorihm idea of a parallel program he designer for rs should no have o use radiional programming languages and immediaely sar wih an implemenaion, as his is usually ime consuming and errorprone. This work proposes a high level specicaion mehod (based on he eri ne formalism) able o suppor auomaic vericaion of funcional validiy and performance prediciion, while simulaneously exploiing he graphical expressiveness of he framework (op of gure 2). Tool suppor in his developmen phase is given by graphical and hybrid 5

6 (combined graphical and exual) ediing ools consisen wih he specicaion mehod. Afer arriving a an implemenaion skeleon (program emplae) in he specicaion phase, one is now ineresed wheher he prediced performance promises an ecien implemenaion. To his end he specicaion is rened unil a level of absracion is reached, where deailed funcionaliy is specied in erms of program code (middle of gure 2). Code generaors can ranslae from he specicaion ino high level languages (boom of gure 2), he use of several programming language paradigms, faciliies and formalism for language deniions by he user and library mainenance ools become essenial. The reuse of specicaions as well as program fragmens has o be suppored by rerieval and adapion faciliies. erformance predicion in his phase relies on addiional user informaion, hence ineracive ools for he specicaion of he expeced dynamic program behaviour are necessary. On he oher hand he designer may wish o improve he prediced performance by experimenally modifying implemenaions, again by using performance predicion ools. If funcional validiy of he program is assured and performance gures are accepable, he designer can now urn o assign componens of his program o devices of he arge archiecure. Tool suppor can be by eiher oally auomaic (bu generally inecien) process-o-processor or daa-oprocessor mappers, by providing a se of sandard mappings, or by faciliaing o nd an opimum mapping by experimenaion. In he laer case an objec oriened, graphical, direc manipulaive user inerface wih associaed assignemen-code generaors and insrumenaion ools are required. Finally, if a running parallel program has been achieved, performance sudies using monioring echniques can be fruiful in deecing sysem bolenecks and aid in `ne-uning' he applicaion. Furher oolsuppor in his phase are required for visualizing he running sysem on he basis of compuaion and communicaion evens. The resul of his phase is eiher an ecien parallel applicaion, or he nding ha he implemenaion has o be modied or rebuil. The inegraion of he ools menioned o form an environmen is illusraed in gure 8. The major focuss of his work alhough will be on he presenaion of he specicaion echnique and is applicaion in he rs developmen phase. 6

7 3 RM-ne Models as arallel rogram Specicaions 3.1 Formal Specicaion and eri Nes Among he mos frequenly used formalisms for specifying he funcional behaviour of dynamic sysems are auomaa, process algebras and eri nes. rocess algebras (e.g. CS [28] or CCS [35]) like eri nes allow a precise descripion of sysems due o heir formal synax and behavioural semanics, bu also algebraic reasoning, deducion of properies and equaional ransformaion preserving behaviour. Boh approaches have proven highly suiable for parallel and disribued sysem consrucion, as simple composiion operaors (like sequenial, parallel, ieraion and nondeerminisic choice) can be given o incremenally consruc complex sysems ou of simpler ones. Addiionally, eri nes have a simple graphical represenaion hus supporing visualizaion of concurren acions. Specicaion of a parallel program (in he sense of his work) mus also capure performance requiremens eecively, no only he funcional requiremens. Beyond (radiional) requiremens o specicaion mehods (like consisency, formal framework ec.) we claim suppor for funcional and emporal specicaion, suiabiliy for he specicaion of various aspecs of parallel sysems like sofware (conrol ow, daa ow, communicaion, synchronizaion, nondeerminism ec.) and hardware (resources like processing elemens, memory modules, communicaion media ec.), simple bu expressive graphical means, he capabiliy of invesigaions on various levels of absracion, (i.e. provide conceps of modulariy and hierarchical decomposabiliy), for (auomaed) analysis concerning performance, funcional validiy, correcness and expeced behaviour, and suppor for generaing execuable and analysable applicaion prooypes as well as he generaion of high level language source code. I is well known and pracically approved ha eri nes suppor srucured, hierarchical speci- caion of phenomena ypically arising in parallel programming (e.g. asynchronous or synchronous concurren execuion of cooperaing processes), by a he same ime providing a graphical formalism. Furhermore he generaion of he corresponding performance models ou of high level specicaions is a (more or less simple) ranslaion sep, and several mehods and oolsuppor exiss for evaluaing eri ne performance models. On he oher hand - despie superior modeling power - he eri ne formalism is no acively used by sofware engineers. The fundamenal problems o applying formal mehods in general, alhough 7

8 heir analysis capabiliies are commonly recognized, lie in he diculy of heir use [14]. Therefore, for applicaion o pracical work we have o provide means o specify a a more absrac level wih a se of `easy o use' descripive mehods. In he case of eri nes his could be by reducing he generaliy of he framework o an accepable radeo beween expressive power and pracical usabiliy in sofware engineering. In his work we apply a resriced class of hierarchical eri nes (bu sucien wih respec o parallel programming) for specicaion a he highes level, namely he (parallel) algorihm srucure level. A his level, mainly communicaion paerns among independen (sequenial) asks are specied, reecing he kind of parallelism acually exploied for he dedicaed hardware. Obviously a ha level he mos criical performance decisions are being made, and performance predicion is becoming essenial. The eri ne specicaion is paramerized by performance characerisics of he dedicaed hardware and esimaed resource requiremens - analogously o classical performance modeling echniques (e.g. [17]), where a machine model (characerisics of he servicing sysem) is joined wih a workload model (characerisics of service demands) o form a sysem model for which performance indices are evaluaed. (See he illusraion in gure 2.) As soon as here is only a rough esimae of he resource requiremens, only a vague predicion of he performance behaviour will be possible. Neverheless i should be possible o judge wheher some specicaion promises saisfacory performance or no. If so, he applicaion developmen should proceed wih a renemen of he specicaion. (The possibiliy and imporance of reuse of approved algorihm skeleons (parallel program emplaes) has been poined ou in [20].) A he program code level of specicaion, a change from graphical o mulilingual exual represenaion is performed, in order o allow he engineer o use languages he is used o for expressing he funcionaliy and he dynamic behaviour of he program under developmen. Depending on he predicabiliy of he languages used in his renemen sep, he esimaion of he resource requiremen parameers can be improved by auomaic or semiauomaic paramerizaion of he model. The specicaion a he algorihm srucure level and he program code level are consisen in he sense, ha auomaic code generaion can be applied o ranslae he specicaion ino a synacically and semanically correc parallel program in exual form (along wih he specied mapping informaion), o be fed ino a radiional compiler generaing objec code and execuion schedules. erformance predicion based on a (semi-)auomaic generaion of resource requiremen parameers 8

9 Developmen phase erformance predicion Specificaion: algorihm srucure level rough resource requiremen parameers service characerisics of dedicaed hardware Transformaion erformance model Evaluaion program o hardware mapping informaion rough predicion Specificaion: program code level SEQUENTIALLY DO process A process B process C process D improved resource requiremen parameers service characerisics of dedicaed hardware Transformaion erformance model Evaluaion program o hardware mapping informaion improved predicion Code generaion Coding ARALLEL DO SEQUENTIALLY DO on ROCESSOR1 process A process B process C process D SEQUENTIALLY DO on ROCESSOR2 process X process Y process Z auomaically generaed resource requiremen parameers service characerisics of dedicaed hardware Transformaion erformance model program o hardware mapping informaion Evaluaion "precise" predicion Figure2: eri Ne Specicaion and redicion of arallel Applicaions. 9

10 is again improved. 3.2 erformance Modeling and eri Nes eri ne research has signicanly conribued o he performance evaluaion eld in recen years [43], [36], [1], [15], [45], [13], analysis and evaluaion ools have evolved [11]. The simulaneous use of he formalism for analysing qualiaive and quaniave aspecs of sysems is pracically approved and can be seen for example in [6]. The performance of parallel sysems (a parallel program execuing on parallel hardware) is no only deermined by he performance of he hardware iself (e.g. processor-, bus- or link-, memory access-speed ec.), bu also by he srucure of he parallel program (he underlying algorihm, he communicaion paern, synchronizaion of asks ec.) and he assignmen of program pars (asks ha execue concurrenly and cooperaively) o resources. Neiher he approach of resource oriened performance evaluaion of parallel processing sysems, where only he sysem resources are modeled o some exen of deail [38], nor he program or process oriened approach, where exclusively sofware aspecs are subjec o he analysis [45], [23], [10], seem adequae o characerize he performance of parallel sysems. The acual performance of such sysems is always deermined by he inerdependencies beween hardware performance and he requiremens of parallel programs, i.e. he proper uilizaion of hardware performance by he program. Wih RM-nes [19] a modeling echnique has been given considering hardware, sofware and mapping as he performance inuencing facors along wih a compuaionally ecien and accurae mehod for he predicion of performance of parallel compuaions running on parallel hardware. The performance measures of ineres are he (expeced) execuion ime of he program and he degree of resource uilizaion a he hardware level. In he sequel we briey inroduce RM-ne models as a specicaion mehod for parallel programs, focussing mainly he srucure and he resource requiremens of an applicaion and he aspec of he specicaion as far as i helps o consruc a corresponding performance model. The aspec of specifying deailed program funcionaliy is of secondary imporance a he algorihm srucure level. We will denoe funcionaliy a ha level of specicaion by he symbol, which sands for a funcional specicaion in some convenional programming language o be added o he specicaion laer on in he developmen process. 10

11 E rocess 1 fork rocess 2 Loop 1 E1 C 1.1 C 2.1 E2 Loop 1 sub 1 ((2<1>+ <2>);p) E1 Loop 1 A1 n BSR 1 ESR 1 SR 12 BSR 2 ESR 2 n E2 Loop 2 A2 C 1.1 ((2<1>+2<2> +4<3>);p) 1 sub 2 2 ((<3>;p) A1 C 1.2 C 2.2 A2 BSR 1 sub 3 ((<2>+ 3<3>);p) join BSR 1 A (a) (b) Figure3: -ne model of a parallel program 3.3 -nes A eri ne oriened process model is used o specify he srucure, funcionaliy and resource requiremens of parallel programs. A process is graphically represened by a ransiion, where inpuplaces and oupuplaces o he ransiion are used o model he curren sae of he process. A process is ready o ge acive, if is corresponding process ransiion is enabled; he process ges acive as he corresponding ransiion sars ring, and remains acive for he ring duraion. The process behaves according o a predened funcionaliy and erminaes by releasing okens o oupuplaces, herewih making subsequen processes (ransiions) ready o ge acive (enabled). The eri ne specicaion of processes (componenens of parallel programs) is called a -ne or process graph. rocesses can be arranged o be execued in sequence (gure 4 (b)), in parallel (gure 4 (c)), alernaively (gure 4 (d)) or ieraively (gure 4 (e)). Concurren processes are allowed o communicae on a synchronous or asynchronous message passing basis. In gure 3 (a) he -ne of a simple program consiued by wo cyclic processes working in parallel and communicaing wih each oher is given. I is buil 11

12 by a se of process ransiions in a proper arrangemen deermining he dynamic behaviour of he program. Wih every process ransiion in he -ne a mulise of services oered by some physical (hardware) resource is associaed, which we call he resource requiremens of he process. To suppor hierarchical specicaion, process composiions can be folded o form a single, compound process, graphically represened by a single ransiion (box), by aggregaion of he resource requiremens of all he consiuing processes. The opposie is also possible: a single process can be rened by specifying is inernal srucure in erms of complex process composiions. Figure 3 (b) shows ha process C 1:1 is consiued by hree subprocesses sub 1, sub 2 and sub 3, each of hem requiring a cerain amoun of he physical resource services 1 ; 2 and 3. The ype of resource p (processor) is also specied. When aggregaing sub 1, sub 2 and sub 3 o comp 1, he resource requiremens are cumulaed. More formally we have: Deniion 3.1 (-ne) A -ne (or process graph) is a six-uple = ( ; T ; R ; M sar ; R; ) where: (i) (, T ; R ) is he underlying ne wih = fp 1 ; p 2 ; : : : ; p n g and T = f 1 ; 2 ; : : : ; n T g. The elemens i 2 T are called processes. (ii) 9p E 2 wih p E 62 O 8 2 T. p E is he enry place of (iii) 9p A 2 wih p A 62 I 8 2 T. p A is he erminaion place of (iv) 8 2 T : is eiher a primiive or a compound process. (v) The direcion of each r 2 R denes he direcion of he ow of conrol. (vi) M sar = fm 1 ; m 2 ; : : : ; m n g is he iniial marking wih m E = 1 and m i = 0 8p i 2 n p E. (vii) R = f% 1 ; % 2 ; : : : ; % n T g is he se of resource requiremens of f 1 ; 2 : : : ; n T g where % i, he requiremen of process i, is a se of uples (;!) and is a mulise of primiive processes requiring a resource of ype!. (viii) = f 1 ; 2 ; : : : ; n T g is he se of funcionaliies of f 1 ; 2 : : : ; n T g. 12

13 E E E send receive f 1 1 f 2 2 f n T nt A (a) Synchronous Communicaion E A E E E fork A (d) Alernaive Composiion 2 E send receive n T -1 n T E A A (a ) Asynchronous Communicaion... nt join n A n A T+1 (b) Sequenial Composiion A (c) arallel Composiion A (e) Ieraive Composiion Figure4: Graphs of process composiions. We disinguish wo ypes of process ransiions: rimiive processes are deerminisic in behaviour, i.e. hey have deerminisic resource requiremens in ha hey always require he same amoun of services from he physical resources. They are no furher divisible and hence represen he building blocks of a parallel program. The se of all primiive processes wihin a parallel program is denoed by = f 1 ; 2 ; : : : ; n g. The graph of a primiive process is a single ransiion (represened by a bar) wih an enry place and one erminaion place. Complex srucures of parallel programs are represened by process composiions, which are being buil as an arrangemen of primiive or compound processes. A sucien [28] se (o specify any kind of block srucured parallel applicaion) of process composiions is given in erms of process graph composiions in gure 4. For he aggregaion of resource requiremens when folding a process composiion o a single, compound process (represened by a double bordered box) we have he 13

14 following rules: Sequenial A sequenial composiion seq = ( ; T ; R ; M sar ; R; ) of processes T = f 1, 2, : : : n T g wih resource requiremens R = f% 1 ; % 2 ; : : : % n T g and funcionaliies = f 1 ; 2 ; : : : ; n T g is aggregaed o a compound process = ( = fp E ; p A g, T = fg, R = f(p E ; ); (; p A )g, M sar = f1; 0g; R = f%g; = f g), where % = S n! i=1( i ;! i ) denoes he se of all uples of mulises of primiive processes and resource ypes respecively if n! dieren ypes of resources are required by he processes 1 ; 2 ; : : : n T. = n T i=1 i is he (absrac) produc of funcionaliies i. Le % i = Sn! i k=1( k ;! k ) be he resource requiremen of he process i 2 T, assuming ha n! i is he number of dieren ypes of resources required by i. i = f! 1 ;! 2 ; : : : ;! n!i g is he se of all ypes of resources required by i, and = S nt i=1 i he se of all ypes of resources waned by he whole composiion. The resource requiremen (of he compound process) is % = [ jj!j 2 ( X ij(k;!j)2%i k ;! j ); where is a symbol for he sum of mulises. This means ha when aggregaing a se of sequenial processes o a single compound process as a maer of absracion, he resource requiremens of he consiuen processes have o be cumulaed wih respec o dieren ypes of physical resources. arallel The process graph par of a parallel process composiion comprises wo addiional processes: a fork process f and a join process j, such ha he parallel processes ( 1 ; 2 ; : : : ; n T ) are allowed o ge acive concurrenly if he fork process has erminaed. The join process j ges acive as soon as he las 2 f 1 ; 2 ; : : : ; n T g has erminaed. Folding a parallel process composiion o a single compound process is similar o he sequenial case wih respec o cumulaion of resource requiremens, since i is necessary o serve all he requiremens of he (poenially parallel) subprocesses. (We assume ha neiher he fork-, nor he join-process require resources for heir execuion.) Communicaion arallel processes, i.e. processes having a fork-ransiion in common, are allowed o communicae wih each oher. Inerprocess communicaion wih synchronous message passing is expressed by maching send (!) and receive (?) primiives and akes place if boh 14

15 processes issuing hese commands are ready for he message exchange a he same ime. We recognize he operaions! and? o be processes and specify he communicaion of processes by a synchronizaion ransiion (see gure 4 (a)). (Noe ha he inerruped bar for he synchronizaion ransiion is only a drawing convenion and represens a single ransiion in he usual sense.) On he oher hand, asynchronous message passing where he send primiive is nonblocking, a faciliy like a monior or buer is used o deposi he message for collecion a a laer ime. In his case he operaions! and? can again be seen as processes. A deposi place is used o specify asynchronous communicaion (see gure 4 (a 0 )). Alernaive The graph of an alernaive process composiion al has only wo places = fp E ; p A g, allowing a mos one of he alernaive processes ( 1 ; 2 ; : : : ; n T ) o ge acive a he same ime (free choice conic). Boolean guards f i are assigned o he arcs (p E ; i ) for conic resoluion. If none of he guards f 2 ff 1 ; f 2 ; : : : ; f n T g is rue, none of he corresponding processes can ge acive. If more han one of hem are rue simulaneously, one of he corresponding processes is seleced a random o ge acive (nondeerminisic choice). The aggregaion of he resource requiremens in al hence is probabilisic: Le q i = ff (p E;i) = g be he probabiliy ha guard f i is rue ( nt i=1 q i = 1), hen al is aggregaed o a compound process wih resource requiremen: % = [ jj!j2 ( X ij(k;!j)2%i q i k ;! j ): Ieraive The graph of an ieraive process composiion ier conains a 'loop place' p L wih enryand exi-processes E and A (which are again assumed o require no resource services). The arc (p L ; A ) is a couner arc [15] denoing a specic number of loop ieraions (consecuive enablings of he 'loop body' ). (In he example -ne in gure 3 (a) ( Loop1 ; A1 ) is a couner arc labeled by n, denoing ha A1 is enabled if here are n + 1 okens in Loop1. ( Loop1 ; C 1:1 ) is he corresponding couner-alernae arc enabling C 1:1 when he coun in Loop1 is beween 1 and n inclusively. Firing of C 1:1 is allowed whenever a new oken eners Loop1, bu does no remove okens from here, and places okens o subsequen oupuplaces.) Le n be an esimae of he loop ieraions, hen ier aggregaes o a single, compound process 15

16 wih % = n![ k=1 (n k ;! k ): Concise specicaion of replicaed -nes For process composiions wih replicaed srucures -nes can be specied in he avour of r/t-nes [24] o ge a more concise and easier o undersand specicaion of composiions of huge ses of idenical processes. This is of pracical imporance especially for sequenial and parallel processes composiions. We call seq wih T = f 1 ; 2 ; : : : n T g a replicaed sequenial process composiion if all i 2 T are insances of one and he same process (see gure 5 (a)). In his case seq is denoed by he abbreviaion as in gure 5 (c), wih an inerpreaion according he semanics of a r/t-ne as in gure 5 (b). The variable predicae E x iniially holds for all individual processes < i >. 1inT The ransiion selecor x = min i < i > of selecs processes by increasing ideniers o be execued (red) by (removed form E x and deposied ino A x). (In general: an individual < i > is allowed o leave E x only if he individual < j >, j = i? 1 has arrived in A x.) Muliple replicaions are possible and denoed by subsequenial annoaion of replicaors. The same is possible for replicaed parallel process composiions wih noaions as in gure 5 (d)? (f). Noe ha has no ransiion selecor, i.e. can re concurrenly in all modes of x. The range of replicaion is enclosed in brackes (gure 5 (f)). The following relaion among individual okens in muliple (hierarchical) replicaions and plain okens guaranees consisency wih plain -nes: Le u k i k o k be he range of individuals in he k-h replicaion hen X (ukik ok) < i 1 ; i 2 ; : : : ; i k > = < i 1 ; i 2 ; : : : ; i k?1 > holds wih (u 1 i 1 o 1 ) < i 1 > =, i.e. presence of all individuals of single replicaion is equivalen o he presence of he plain oken. Firing Rules -nes have he same ring behaviour as plain lace/transiion nes [42] wih he excepion of he guarded ransiion ring in alernaive process composiions. In his case he conic among enabled ransiions is solved depending on daa in he specicaion - usually performed (ineracively) by an applicaion designer ineresed in he behaviour of he program when simulaing he -ne. For he purpose of invesigaing srucural or performance properies of he -ne i is no 16

17 E E x j 1xN E x j 1xN < i > (i=1..n) E fork < i > 1iN 1iN <x> <x> E E [i=1..n] x = min <i> i <x> <x> (i=1..n) A join [i=1..n] A A A x j 1xN A A x j 1xN (a) (b) (c) (d) (e) (f) Figure5: Replicaed Sequenial/arallel rocess Composiions. longer necessary o consider guarded processes, one is raher ineresed in wha he `real alernaives' are. Hence we can resric our furher consideraions o -nes meeing he following assumpion of deniive choice: whenever he enry-place of an alernaive process composiion is reached, a leas one guard is rue. According o his assumpions we can eliminae guards from -nes by simulaneously assigning appropiae random swiches for conic resoluion. 3.4 roperies of -nes Every -ne is safe in every marking M Sar ; M i reachable from he iniial marking M sar = fm E ; m 2 ; : : : ; m A g = f1; 0; : : : ; 0g, and saises he free choice condiion by deniion. For he invesigaion of behavioural properies of -nes we rs exend -nes as follows: Le = ( ; T ; R, M Sar, R; ) be a -ne. Is exension o = ( ; T ; R ; M sar ), wih: = ; T = T [ e ; R = R [ (p A ; e ) [ ( e ; p E ) is called he exension of. (The exension of he -ne in g. 3 is consruced by adding a ransiion e and arcs from A and o E hus `looping back' he oken ow from A o E.) The exension of a valid -ne is a srongly conneced Free Choice Ne (FC--ne) (I mees he free choice condiion and j p I j 1; j p O j 1; 8 p 2 ). If here are no alernaive or ieraive process composiions in, hen is a srongly conneced Marked Graph (MG--ne) (8 p 2 ; j p I j = j p O j = 1) 17

18 rocess 1 rocess 2 rocess 1 rocess 2 n C 1.1 BSR 1 Loop 1 ESR 1 C 1.2 SR 12 C 2.1 BSR 2 Loop 2 ESR 2 C 2.2 n n C 1.1 BSR 1 Loop 1 ESR 1 C 1.2 SR 12 C 2.1 BSR 2 Loop 2 ESR 2 C 2.2 n o rocessor 1 Link 1-2 (a) o rocessor 2 o rocessor 1 (b) Figure6: RM-nes for (a) wo processor (b) one processor mapping. To deermine wheher a parallel program is free of saic deadlocks we consider a -ne wih M sar = fm E ; m 2 ; : : : ; m A g = f1; 0; : : : ; 0g o erminae if M sop = fm E ; m 2 ; : : : ; m A g = f0; 0; : : : ; 1g is reachable from every marking M Sar ; M i. Now le be he exension of. erminaes if p E as well as p A are covered by all (minimal) place invarians of (for a proof of an equivalen heorem see [18].) Thus, if an invarian does no cover p E as well as p A hen wo undesirable siuaions appear depending on wheher he invarian is iniially marked or no: if i is marked, hen here is a cycle in he process causing livelock, if no, hen (some) subprocesses can never ge acive (dead ransiions). Solving for he minimum place invarians of he exension of he -ne in gure 3 (a) (solve I 0 ~i = ~0) we obain ha he wo of hem boh cover p E as well as p A ; hus will erminae. Moreover in his example he number of invarians (2) obained simulaneously expresses he degree of exploiable parallelism; can (poenially) execue on wo dieren processing elemens. We can conclude ha -nes due o heir deniion allow he applicaion of powerful mehods (and ools) developed for srucural analysis wihin he framework of /T nes. -nes a ha sage represen qualiaively analyzable specicaions of parallel applicaions a he algorihm srucure level. 18

19 3.5 RM-nes Afer qualiaive analysis of he -ne model one is ineresed in he expeced performance of he parallel applicaion under developmen. This requires inclusion of hardware performance characerisics and program o hardware mapping informaion ino he model. arallel processing sysems ypically employ pools of resources like memory, processing elemens and communicaion devices, allowing heir concurren usage. The pool of resources, heir conneciviy and ineraciviy as well as heir poenial performance are in he sequel modeled by R-nes (resource nes). We assume ha for every resource in a parallel processing environmen one can idenify is ype and a se of services (primiive processes) oered o applicaions. Deniion 3.2 Le = f 1 ; 2 ; : : : ; n g be he se of resources and processes ha can be execued by 2. A R-ne is a resource graph R = ( R ; T R ; R R ; M ini ; T ) where: he se of primiive (i) R = fh 1 ; h 2 ; : : : ; h n g is a nie se of 'home' places for he resources 2. (ii) T R = f 1 ; 2 ; : : : ; n T g is a nie se of ransiions and R R ( R T R )[(T R R ) is a ow relaion. (iii) M ini : R 7! iniially assigns resource okens i 2 o 'home' places h i 2 R. (iv) T = f 1 ; 2 ; : : : ; n g is a se of funcions, each i : i 7! Z assigning deerminisic iming informaion o primiive processes execuable by i. Every resource in he sysem is modeled by a oken in he R-ne having is proper home place. resence of he (resource-) oken in ha place indicaes he availabiliy of he resource (idle o serve). Arcs in R R describe he direcion of resource ows and help, ogeher wih ransiions in T R, o model ineracions and inerdependencies beween resources. Wih every resource is associaed a se of primiive processes, along wih iming informaion () for each 2. () is he ime i would ake he resource o serve he primiive process. The assignmen of parallel (sofware) processes o resources is now expressed by a se of arcs combining -nes and R-nes o a single eri ne: Deniion 3.3 A mapping is a se of arcs M ( R T ) [ (T R ) where 19

20 (i) R T is he se of arcs leading from home places o processes such ha if (h i ; j ) 2 R T and he ype of i is!, hen 2 i 8 2 for all uples (;!) 2 % j. (ii) T R is he se of arcs leading from processes o home places wih ( j ; h i ) 2 T R ) 9(h i ; j ) 2 R T as in (i). Assigning home places o process ransiions is allowed only if all he primiive processes required by he ransiion are oered as services by he resource (he resource also has o have he desired ype). We nally call he riple RM = f; R; Mg, he combinaion of a -ne and a R-ne by a mapping o a single, inegraed ne model, RM-ne model. The RM-ne model is a he same ime he specicaion of he parallel applicaion a he algorihm srucure level (see gure 2 and a deailed example in he nex Secion). Figure 6 gives sample mappings of he -ne in gure 3 (a) o a se of resources. Assume ha he compound processes C 1:1, C 1:2, C 2:1 and C 2:2 all require recources of ype p (processor), while rocessor 1 and rocessor 2 being resources of ha ype, hen he process ransiions are allowed o be mapped o hem if hey can serve all he primiive processes required by C 1:1, C 1:2, C 2:1 and C 2:2. Figure 6 (a) shows he assignmen of he parallel program o wo processors conneced o each oher by a communicaion link, fully exploiing he inheren parallelism. During one ieraion sep C 1:1 and C 2:1 can be execued concurrenly by rocessor 1 and rocessor 2. The communicaion process SR 12 synchronizes he wo processes when being execued by a link ype resource. (The link resource is made available only if boh processes are ready for communicaion, i.e. here is a ow oken boh in BSR 1 as well as in BSR 2. This is expressed by bidirecional arcs beween BSR 1 (BSR 2 ) and he ransiion preceding place Link, enabling his ransiion only if BSR 1 and BSR 2 are marked.) Finally C 1:2 and C 2:2 are execued concurrenly. In he second case (gure 6 (b)) he program is mapped - wihou any change in he specicaion of he algorihm srucure - o a single processor (capable of serving also communicaion processes, e.g. emulaed by shared variables). All he processes C 1:1, C 1:2, C 2:1 and C 2:2, as well as SR 12 are execued sequenially. rocesses are scheduled according o heir ow precedence in he -ne: When saring a new loop ieraion only C 1:1 and C 1:2 are ready o ge acive. This is due o C 1:1 and C 1:2 being enabled by okens in he loop places (m Loop1 = 1, m Loop2 = 1), and he residence of he resource oken of rocessor 1 in is home-place (m rocessor1 = 1). The conic among C 1:1 and C 1:2 is resolved as in ordinary eri nes by nondeerminisic selecion of one ransiion (process) o re (execue). 20

21 Assume C 1:1 beeing chosen o execue rs, hen, afer replacing he resource used in is home-place, only C 1:2 is enabled and will re. Afer ha, conrol ow in he -ne forces he communicaion SR 12 o happen (m BSR1 = 1, m BSR2 = 1 and m rocessor1 = 1) ec. To conclude, a ransiion (process) assigned o some resource is enabled (ready o ge acive) if all of is inpuplaces in he -ne hold a (ow-) oken, and he required resource oken is in is home place. The ransiion (process) res (execues) by removing all he ow okens from he inpuplaces in he -ne and he resource oken from he R-ne, making he resource unavailable for oher processes. Afer a cerain ring period ow okens are placed o oupuplaces in he -ne, while he resource oken is placed back in is home place (R-ne), making he resource available again. Timing in RM-nes To suppor independence among he specicaion of he algorihm srucure of an applicaion and he characerisics of resources we inroduce he noion of ineracive iming in he evaluaion of RM-nes. A he ime a parallel applicaion is being developed, he conguraion of he arge hardware is generally no known. The number, ype and arrangemen of processing elemens for example is ofen deermined on he basis of he parallel program so as o achieve opimum performance. To his end a model of he program has o reveal he amoun and ype of services required from hardware resources, independenly of an acual, physical resource consellaion. The -ne provides all hese informaions: he amoun of resources required is impliciely specied by he number of processes and he resource ypes required by hem. The amoun and ype of services is expliciely in he model in erms of resource requiremens associaed o process ransiions. The resource requiremens are expressed in erms of mulises of primiive processes during he paramerizaion of he -ne, and aggregaed in he case of process composiions according o he rules given above. The acual execuion ime of some process is based on performance characerisics of an assigned resource; hese characerisics are expliciely in he R-ne model in he shape of iming funcions for primiive processes, he assignmen informaion is expliciely in he RM-ne model. Given now a process ransiion i wih resource requiremens % i = (;!), where = n kjk2i k k is a mulise of primiive processes ou of i (n k denoes he mulipliciy of k in j ), assigned o a resource j wih services j and service imes j (), 2 j ( i j ), hen he (deerminisic) ring 21

22 ime for ha ransiion is ineracively (a he ring insan) calculaed as X kjk2i n k j ( k ): The compound process C 1:1 in gure 6 (a) for example, wih resource requiremens as in gure 3 (b), assigned o resource rocessor 1 wih execuion imes 1 ( 1 ), 1 ( 2 ) and 1 ( 3 ) for he primiive processes 1, 2 and 3 would ake 2 1 ( 1 )+2 1 ( 2 )+4 1 ( 3 ) ime seps o execue. In he RM-ne (gure 6 (a)) his would cause (afer ring of f ork - which is no assigned o a resource since i does no require services - in zero ime) a removal of he resource oken from place rocessor 1 in he R-ne and he ow oken from place Loop1 in he -ne a ime zero, and a release of boh okens (he resource oken back o place rocessor 1, and he ow oken o BSR 1 ) a ime 2 1 ( 1 )+2 1 ( 2 )+4 1 ( 3 ). During ha ime period, neiher he specic ow oken, nor he resource oken would be available (visible) in he RM-ne (noe ha his ring policy is in conras o he usual `race policy'). Based on he above iming convenions, he expeced overall execuion ime of he parallel program in he specicaion phase is evaluaed by simulaion of he RM-ne model. Tools [12] have proven useful for his ask, alhough preprocessing is necessary o simulae ineracive iming. Wih he simulaion of he RM-ne one a he same ime observes oken disribuions of home-places in he R-ne, represening he basis for he derivaion of gures describing resource usage. A his poin i is easy seen ha RM-nes serve as he basic model for performance predicion, while a he same ime acing as he specicaion of he parallel applicaion a he algorihm srucure level. Moreover RM-ne models bear he poenial of reusing hem as general purpose applicaion emplaes, insanciaed by a assigning a specic funcionaliy for a special purpose. We will demonsrae his aspec of RM-ne based specicaion in he nex secion, by demonsraing he developmen seps from he algorihm idea downo an implemenaion skeleon (gure 2), and he former aspec (performance predicion) in erms of anoher example in he CASE environmen aferwards. 4 Specicaion of a rocess ipeline The principle common o pipelined parallel algorihms [37] is ha daa is owing hrough a cascade of processes (pipeline sages) being modied by process aciviies. rocesses acing as ransformers of daa usually have dieren funcionaliy. Applying his funcionaliy in a predened sequence 22

23 upon he inpu daa sream generaes an oupu daa sream represening he problem soluion. The behaviour of a pipeline sage is o accep daa from a predecessor sage, apply a se of operaions on ha daa and pass he resul o he successor sage. Consequenly, as he sages have dieren funcionaliy, he compuaions in a pipeline are asynchronous. Communicaion in a pipeline is always beween consecuive sages and usually a daa iem is allowed o ener a sage if he predecessor has already released i, i.e. communicaion is regular. As he arrival and deparure of daa drives he compuaions in a pipeline, he regular communicaions naurally synchronise he asynchronous compuaions. For he developmen of a pipelined parallel applicaion we sar according o he scheme in gure 1 wih an algorihm idea, which is has verbally been described above. Formally we can hink of a pipeline sage as a box wih some hidden funcionaliy as a he op lef corner of gure 7, and he pipeline iself as a linear arrangemen of sages. A -ne specicaion for a single sage is easily derived: Firs a daa iem is acceped from he previous sage, which is specied as a receive process wih resource requiremen of f(h?i; l)g (where l denoes a link ype resource). Afer daa is received, some operaion wih funcionaliy has o be performed, which is expressed by a process ransiion wih resource requiremens o a processor f(: : : ; p)g (a mulise of primiive processes describing he resource requiremens o he processor is inenionally lef open here). Finally daa is passed by o a succeeding sage, specied by a send communicaion process wih resource requiremen f(h!i; l)g. This has o be repeaed ieraively for a given se of daa, being specied by an ieraive process composiion ha will erminae afer a cerain number (n) of ieraions. A -ne for he behaviour of a single pipeline sage is developed in he upper hird of gure 7 Assuming synchronous message passing communicaion, he pipeline sages have o be ied o each oher such ha he oupu (!) of some sage i forms a single (synchronizaion) ransiion wih he inpu (?) of sage i + 1. In he middle of gure 7 a hree sage pipeline is given, where he ieraive processes represening single sages are forced operae in parallel by being arranged as a parallel process composiion. The -ne derived can now be analyzed from a correcness and erminaion poin of view by applying srucural analysis upon he corresponding eri ne. Qualiaive analysis of he -ne reveals ha a process in sage i can ge ready for execuion in ieraion j only if sage i? 1 has already compleed ieraion j and passed he resuling daa o sage i. Furhermore, all he sages can poenially execue heir processes in parallel, sage i in ieraion j, sage i?1 in ieraion 23

24 Behaviour of Single ipeline Sage Algorihmic Idea E E n A A {(<?>, l)} {(..., p)} {(<!>, l)} E f Three Sage ipeline (-ne) change mapping {(..., p)} n {(<!>, l)} n {(<?>, l)} {(<!>, l)} {(..., p)} j A n {(<?>, l)} {(..., p)} Three Sage ipeline Mapped on Three rocessors processor link processor link processor {(..., p)} processor 1 n {(<!>, l)} n {(<?>, l)} {(<!>, l)} {(..., p)} n {(<?>, l)} link 1-2 link 2-3 processor 2 {(..., p)} processor 3 erformance redicion Implemenaion Skeleon Figure7: Specicaion for a rocess ipeline. 24

25 j + 1, sage i + 1 in ieraion j? 1 ec. The maximum degree of parallelism is deermined by he maximum overlap of sage compuaions, which can be veried by applying invarian analysis. For performance predicion we have o provide addiional informaion o he -ne model. Firs by giving hardware o mapping informaion, and secondly by providing service characerisics of he hardware in use. This is achieved by exending he -ne o a RM-ne. In he case of he availabiliy of a hree processor pipeline, one possible mapping resuls from assigning a single pipeline sage o a single processor, and communicaions among sages o communicaion links connecing processors (lower hird of gure 7). The RM-ne can be evaluaed under is paramerizaion (se of all resource requiremens in he -ne) by simulaing he corresponding imed eri ne. The eciency of pipelined algorihms is deermined by he homogeniy of sages, i.e. he balance of operaions in he sages and he grain size of sage compuaions, i.e. he communicaion frequency beween sages. If a p-ype resource is able also o serve a l-ype requiremen (emulaion of message exchange), hen communicaion could also be mapped o a processor. Wihou changing he - ne, several dieren mappings could be invesigaed o balance he operaions across processors by variaions of he R-ne and he mapping arcs yielding dieren paramerizaions of he RM-ne. (racical case sudies wih a real applicaion on a real muliprocessor sysem are repored in [19] [22].) As soon as a specicaion for which he prediced performance is saisfacory (or opimum) is found, he specicaion is kep as an applicaion or program emplae, and he designer can sar wih he implemenaion by sepwise renemen of he specicaion, i.e. providing he funcionaliy of sages in erms of a high level programming language. rogram emplaes a ha high level of absracion can be insaniaed in fuure applicaions by simply assigning dieren funcionaliy o sages, hus serving as general purpose, reusable, performance opimized implemenaion skeleons which can considerably ease applicaion design and save developmen ime. 5 Applicaion Specicaion in he CASE Environmen 5.1 The CASE Environmen In conras o he echnology of compuer aided sofware engineering (CASE) which provides se of ools for sofware developmen, according o radiional mehodologies like he waerfall-model, 25

26 GRAHICAL, OBJECT ORIENTED USER INTERFACE X-Windows DESIGN Hierarchy- Diagram Edior CODING Texual/Graphical Edior Compiler Debugger ERFORMANCE REDICT./MEASUREM. Model Generaor Model Edior Evaluaor Analysis/Simulaion EXECUTION VISUALIZATION View Specifier Even Tracer ASSIGNMENT rocess/daa lacer rocess/daa Mapper Library Manager Sofware Monior erformance Viewer Execuion Viewer Mapping Library Manager SECIFICATION ERFORMANCE MODELS ERFORMANCE DATA MAING BASE LIBRARIES CODE EXECUTABLES VIEW SETTINGS TRACE INFORMATION Figure8: Archiecure of he CASE Environmen he spiral- model or rapid prooyping, he Compuer Aided arallel Sofware Engineering (CASE) environmen [21] aims o assis he proposed performance oriened developmen cycle (gure 1) in all developmen phases by inegraion of auomaed performance ools and he CASE mehodology. I inegraes he RM-ne based specicaion mehod for parallel programs wih eri ne relaed srucural and performance analysis mehods. The inerdependencies and henceforh conneciviy of ools in he compound oolse is given in gure 8. All he ool funcionaliy is hidden behind a unique, graphical, window-oriened user inerface. The design ools follow he need for graphical program developmen a he algorihm srucure level by applying he RM-ne meaphor, and are used o work ou he specicaion which is used by coding ools o generae or develop program code, and by he performance ools o derive performance models. In his secion we give a avour of he developmen process from he algorihm idea o he implemenaion skeleon of he applicaion in he CASE environmen (he rs sep in gure 1 applying ools for semigraphical ediing and performace predicion). As in his phase he major performance decisions have o be made, and as he proposed mehod applies mainly in his sep (see upper hird of gure 2), we concenrae only on his subse of CASE (see [21] for a sysemaic descripion). 26