Interrupts. Embedded Systems Interfacing. 08 September 2011

Transcription

1 08 September 2011

2 An iterrupt is an internal or external event that forces a hardware call to a specified function called an interrupt service routine Interrupt enable must be set (initialization) The interrupt-causing event causes the interrupt flag to be set (hardware) The event forces the routine at the interrupt vector to be called (hardware) The processor state must be preserved (compiler) The interrupt service routine must process data (user code) The interrupt flag must be cleared manually by the user (user code) The processor state must be restored (compiler)

3 C-30 Rules for ISRs The ISR cannot return a value No parameters may be passed to the ISR The ISR cannot be called directly by another function Ideally, the ISR ought not to call other functions

4 ISR Templates Template 1 void attribute ((interrupt)) T 1Interrupt (void) { //ISR code here} Template 2 void ISR T 1Interrupt (void) {//ISR code here} Template 1 is preferred because it is faster. Template 2, while increasing readability inserts a save/restore command Many C compilers use the inderline as the first character for internal variables

5 and Priority External Sources 5 external pins with level trigger detection 22 external pins connected to the Change Notification module 5 Input Capture modules 5 Output Capture modules 2 Serial port interfaces (UARTs) 4 Synchronous serial interfaces (SPI and I 2 C) 1 Parallel Master Port

6 (cont d) Internal Sources 5 16-bit Timers 1 Analog-to-Digital Converter 1 Analog Comparator module 1 Real-Time Clock and Calendar 1 Cyclic Redundancy Check generator

7 Interrupt Priority are given one of seven priorites A lower-priority interrupt may be interrupted by a higher-priority one This nesting behavior is controlled by the NSTDIS bit in the INTCON1 register Special errors are handled by traps, which have fixed priority above the priority of interrupts

8 Traps Traps are generated by processor fault conditions Traps cannot be inadvertently delayed by the NSTDIS mechanism Sources Oscillator Failure Address Error Stack Error Math Error Four Reserved

9 #include <p24fj128ga010.h> int dsec = 0; deciseconds int Sec = 0; int Min = 0;

10 (cont d) // 1. Timer1 interrupt service routine void attribute (( interrupt)) T1Interrupt( void) { // 1.1 your code here dsec++; // increment the tens of a second counter if ( dsec > 9) // 10 tens in a second { dsec = 0; Sec++; // increment the seconds counter if ( Sec > 59) // 60 seconds make a minute { Sec = 0; Min++; // increment the minute counter if ( Min > 59)// 59 minutes in an hour Embedded Systems Min = Interfacing 0;

11 (cont d) } // seconds // 1.2 clear the interrupt flag T1IF = 0; } //T1Interrupt

12 (cont d) main() { // 2. init Timer 1, T1ON, 1:1 prescaler, internal clock source T1IP = 4; // this is the default value anyway TMR1 = 0; // clear the timer PR1 = ; // set the period register TRISA = 0xff00; // set PORTA lsb as output // 2.1 configure Timer1 module T1CON = 0x8020; // enabled, prescaler 1:64, internal clock // 2.2 init the Timer 1 Interrupt, clear the flag, enable the source T1IF = 0; T1IE = 1;

13 (cont d) // 3. main loop while( 1) { // your main code here PORTA = Sec; } // main loop } // main

14 Timer 1 can use external clock input or an amplifier for an external resonator The secondary oscillator uses a 32, 768 Hz crystal resonator Configure Timer1 for an external resonator Set PR1 to An interrupt is produced every second

15 (cont d) Two changes need to be made T1CON=0x8002; PR1=0x7FFF;

16 Managing Multiple Most real applications have two or more interrupt sources Keep each ISR as short and simple as possible Use priority levels to determine which event will be serviced first Nested interrupts require more care; disable interrupt nesting with NSTDIS = 1

17 Additional Information C30 has two interrupt vector tables One is used while debugging The other is used during program execution There is no global interrupt disable, however, asm volatile( disi #0x3FFF ); will disable interrupts for a limited number of cycles and DISICONT = 0 will reenable interrupts