Student # (In case pages get detached) The Edward S. Rogers Sr. Department of Electrical and Computer Engineering

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1 ECE 243S - Computer Organization The Edward S. Rogers Sr. Department of Electrical and Computer Engineering Mid-term Examination, March 2005 Name Student # Please circle your lecture section for exam return LEC0101 Mochovos MTuTh LEC0102 Mochovos MWTh LEC0103 Anderson MWF LEC0104 Anderson TuThF Answer all questions. Write your answers on the exam paper. Show your work. Each question has a different assigned value, as indicated. Not all questions will require the same amount of time and effort, use your time wisely. Permitted: textbook and lab manual; one extra page. No other printed or written material. No calculator. NO PHOTOCOPIED MATERIAL Total marks available: Verify that your exam has all the pages. Only exams written in ink will be eligible for remarking. ECE243 Midterm pg 1 of 12 Feb. 2005

2 1. [20] Quick Answer Circle the correct answer in A to E. A. Memory address $40000 contains the word $0034. Is this: a) Data only. b) An instruction only. c) Could be either data or an instruction. B. How many times will the instruction sub be executed in the following code? move.w ETA: beq sub.w bra ETB: #N, d0 koko #2, d0 ETA a) integer part of N / 2 b) integer part of (N - 1) /2 c) either integer part of N / 2 or infinite times The instructions form a loop starting at label ETA. As long as d0 is non-zero the loop will continue executing and at every iteration will subtract 2 from d0. So, if N is an even number the loop will iterate N/2 times. If N is an odd number, then subtracting 2 will never produce 0. Instead, d0 will cycle through 3, 1, -1, -3,. d) either integer part of (N - 1)/2 or infinite times e) 2N f) N + (N 1) g) None of the above C. Which C language construct the following assembly code corresponds to? ETB: ETA: ETG: cmp.w bgt ETA add.w bra ETG add.w d0, d1 #1, d1 #2, d1 a) if (a > b) { a = a + 1; } else { a = a + 2; } b) if (a <= b) { a = a + 1; } else { a = a + 2; } Notice that d1 is either incremented by 1 or 2. The question is whether d1 holds a or b. The cmp and bgt instructions provide the necessary clues. The cmp compares d1 to d1 and the bgt branches to the code that increments d1 by 2 if (d1 > d0). In other words, we will increment d1 by 2 if d1 is greater than d0 or increment it by 1 if d1 is less than or equal than d0. c) if (a > b) { b = b + 1; } else { b = b + 2; } d) if (a <= b) { b = b + 1; } else { a = b + 2; } ECE243 Midterm pg 2 of 12 Feb. 2005

3 D. What will happen when the following code is executed? jsr ETB ETB rts a) jsr and rts will execute an infinite number of times b) jsr and rts will execute once and then execution will continue immediately after rts. c) jsr will execute once, rts will execute twice and then execution will resume at an unspecified address (value at the top of the stack prior to executing the code). Ignoring any memory alignment issues (i.e., assuming that the value of a7 is divisible by 2) the first jsr instruction will push on the stack the address ETB (its return address) and then jump to ETB. At ETB the rts instruction will be executed. It will a long word from the top of the stack and jump there. As explained this value will be ETB. So, the rts will execute once more. It will again read the long word at the top of the stack but now this value is unknown to us (it can not be determined with the information given to us). Hence, execution will continue at an unspecified address. d) None of the above. This will happen: E. How many seconds is taken on a serial link to send the message MY MESSAGE (ignore the quotation marks) over a UART set to 9600 BAUD, 1 Stop Bit, 8 Bit Data, No parity. Ignore the time to set up the communication and assume that characters are sent as fast as possible. a) 80/9600 b) 90/9600 c) 100/9600 In serial communication, each character is transmitted using 8 bits (as stated in the question 8 bit data ). To send a character we always need a stop and a start bit as we have explained in the lectures. The stop/start bit force a 1 to 0 transition on the communication line and this helps us correct any phase differences that may exist. Thus, we need bits per character. There are 10 characters, so in total we need to be able to sent 100 bits. The BAUD rate is the rate at which bit cells occur and it follows that we need 100 x 1/9600 bit cells to sent the message. d) 110/9600 ECE243 Midterm pg 3 of 12 Feb. 2005

4 2. [15] Basic Addressing Modes Memory and registers are as on the left side of the table below. Show what happens after all of the following instructions are executed: INST_1 AA equ $1003 INST_2 move.b #6,AA+1 INST_3 move.l $100C,d1 INST_4 move.l #$100C,d2 INST_5 movea.l #$1008,a1 INST_6 move.l (a0)+,d0 INST_7 move.b 5(a2),d3 Address Before After Word contents $1000 $4963 $1002 $1000 $1004 $2039 $0639 The $06 is from INST_1 $1006 $3322 $1008 $5544 $100A $FAA5 $100C $B2FC $100E $0000 $1010 $0203 Registers Long Words d0 $ d1 $23282A2C d2 $ d3 $ABCDEF d4 $0 a0 $1000 a1 $4670 a2 $FFE a3 $6 $ from INST_6 $B2FC0000 from INST_3 $100C from INST_4 $ABCD00 from INST_7 $1004 from INST_6 $1008 from INST_5 ECE243 Midterm pg 4 of 12 Feb. 2005

5 2. [15] Parallel Interface In the following diagram of one bit of a PIT: Vdd DIR Read Registor Data DOR Write D Write DOR Q External connection DDR Write D Write DDR Q a. What is the purpose of the Resistor? The resister is there to set the line at Vdd if no external source is currently drives the wire. It also allows an external source to set the wire s voltage at any value desired. Finally, it can help an external device set the wire to Vdd (in case the device is not as strong at forcing a high voltage). Of course, the latter benefit comes at the expense of making driving the wire to 0V harder. b. What drives DDR Write? An address decoder. The address decoder is a combinatorial circuit that inspects the processor s memory interface and determines whether an access is currently being requested by the CPU for the memory address where DDR is mapped to. c. What drives DOR Write? As in (b). d. What is the purpose of the DDR? To control the direction of the external connection. If DDR is set to 1 then the tri-state buffer is activated passing the value of DOR onto the external wire. In this case, the external connection is an output (from the computer s perspective). If DDR is set to 0 then the tri-state buffer is de-activated effectively isolating DOR s output from the external connection. In this case, an external device can set the wire to any voltage it desires. e. How many flipflops would be in an 8 bit PIT interface of this type? EIGHT per register one per bit. There are two registers DDR and DOR, hence in total we need 16 bits. ECE243 Midterm pg 5 of 12 Feb. 2005

6 4. [25] Writing Assembly Code Write a subroutine in 68k assembly that takes as input three long word parameters on the stack: The first parameter is the base address of an array of long words. The second parameter is the number of array elements counting from 1. The third parameter is a number. The routine should calculate and return in d0 the number of array elements whose value matches that of the third parameter. Assume that all registers are calleesaved. Note that parameters are pushed on the stack in reverse order so that at the end the first parameter appears at the top. There are many possible implementations. We present one of them. We start with what the stack will contain when this function is called. This is part of the calling convention as this is described in the question. We are given that there are three parameters. We do know that the first parameter is the last pushed on the stack. Hence the stack will look as follows: a7 return address +4 base address +8 number of elements +12 number We will use three registers for our routine a0, d1 and d2. Since all registers are callee-saved we must preserve their values. Accordingly we need to push them on the stack and restore them prior to returning: routine movem.l a0/d1/d2, -(a7) ; save the registers we will be changing ; all aforementioned stack offsets will ; have to be adjusted by +12. clr.l d0 ; d0 counts the number of matching elements movea.l 16(a7), a0 ; a0 will point to the next element ; make it point to the first element ; this the base address move.l 20(a7), d1 ; d1 counts elements not processed yet ; read the second parameter off the stack move.l 24(a7), d2 ; d2 hold the value to match against ; this is the third parameter loop tst.l d1 bra done cmp.l (a0), d2 bne nomatch match addq.l #1, d0 nomatch addq.l #4, a0 subq.l #1, d1 bra loop ; any elements left? ; d1 is zero = no elements left ; is this the value we are matching against? ; yes it is increment d0 ; move on to the next element ; one less element to check ECE243 Midterm pg 6 of 12 Feb. 2005

7 done movem.l (a7)+, a0/d1/d2 rts ECE243 Midterm pg 7 of 12 Feb. 2005

8 5. [25] Analysing Assembly Code What does the following program do? Show a pseudo-code or flowchart description as part of your answer. SSub movea.l #InList,a0 movea.l a0,a1 addq.l #2,a1 clr.b d1 L0 cmpm.w (a0)+,(a1)+ ;cmpm.w is just like cmp.w ble L1 move.w -2(a0),d0 move.w -2(a1),-2(a0) move.w d0,-2(a1) moveq.b #1,d1 L1 cmpa.l #EndInList,a1 blo L0 ;blo is an unsigned blt instruction tst.b d1 bne SSub L2 rts This code sorts the input array into ascending order. ***** A flowchart should contain the following items: Callee save registers Set up pointers & get parameters Until no swaps required Look at first 2 elements in list Until done list If current element > next element Swap current element and next element Go to next element pair End Until End Until Restore register values Return to caller ***** STEP-BY-STEP analysis of the code: SSub movea.l #InList,a0 movea.l a0,a1 addq.l #2,a1 clr.b d1 ; a0 points to the first array element ; a1 = a0 + 2 so a1 now points to the ; second array element ; d1 is a flag ; it s zero if no changes happened during ; a full scan over the array ; so, we set it to 0 L0 cmpm.w (a0)+,(a1)+ ;cmpm.w is just like cmp.w ; compare the element pointed to by a0 ; with the element pointed to by a1 ; these are always to adjacent elements ; notice that both a0 and a1 will be ; incremented by 2 after this instruction ECE243 Midterm pg 8 of 12 Feb. 2005

9 ble L1 move.w -2(a0),d0 move.w -2(a1),-2(a0) move.w d0,-2(a1) moveq.b #1,d1 ; so they will point to the next pair ; of array elements ; if a1 element is smaller or equal move ; on ; otherwise swap ; these three instructions swap the ; two elements with the help of d0 ; we need the -2 offset since both a0 and ; a1 have been increased by 2 by the ; preceding cmp instruction ; set d1 to 1 to indicate that at least ; one change has happened L1 cmpa.l #EndInList,a1 ; is a1 pointing to the last element? blo L0 ; no, continue with the next element pair tst.b d1 ; We have just completed a full pass ; over the whole array ; if changes occurred we repeat a full ; scan bne SSub L2 rts ; done return to caller NOTE that this algorithm is *NOT* bubble-sort. It s similar in that it scans adjacent elements and swaps them. It is different in that it always scans all of the array. ECE243 Midterm pg 9 of 12 Feb. 2005

10 6. [+10 Extra Credit Question] Not a Assume a computer with a single instruction called subtract and branch if negative or SBN. The SBN instruction accepts four arguments as follows: SBN T, A, B, N Where T and N are memory addresses and A and B can either be 32-bit memory addresses or 32-bit constants. The SBN instruction subtracts the value of B from the value of A, stores the result into T and if this result is negative continues execution at address N. If the result is positive execution continues with the next in memory instruction. If A or B is an address, SBN first reads the 32-bit value at that address. For example: SBN $30, $40, #10, next Reads the 32 bit value at memory address $40, subtracts 10 from it, stores the result into memory location $30 and if this result was negative continues execution at the address defined by the label next. Otherwise execution continues with the next in memory instruction. In all questions that follow the locx identifiers refer to memory addresses. A) What is the minimum number of bytes that will be needed to encode the SBN instruction. Briefly explain your answer. We start by determining the information contained in the instruction: 1. The operation: SBN 2. The four operands We then consider each item separately. 1. There is only one operation SBN. We could explicitly specify this one operation but this turns out to be superfluous. Since the is only one, it is always implied. So we need 0 bits for encoding the operation type. It is always SBN. (+0 bits for the operation type.) 2. There are four parameters. The last is always an address. Hence we need four bytes for it. (+4 bytes for next field.) The same applies for the first parameter. Each of the other two operands can be either an address or an immediate. In either case we need 4 bytes for the address or immediate. So, +4 bytes per operand for the operand s value. But we also need to specify which of the two it is: an address or an immediate. Thus, we need one more bit per operand. (+1 bit for distinguishing between an address and an immediate.) In summary: 2 x (1 bit + 4 bytes) + 2 x (4 bytes) = 16 bytes + 2 bits. Assuming that we must round this off to bytes we need 17 bytes (where 6 bits are left unused). ECE243 Midterm pg 10 of 12 Feb. 2005

11 B) Write a program that adds the values at loca and locb and stores the result into locc without changing the values in loca and locb. Do not assume that locc has a known value to start with. sbn locc, #0, locb, i2 ; locc = -B i2 sbn locc, loca, locc, i3 ; locc = A (locc) = A (-B) ; locc = A + B i3 C) Write a program that checks whether the value at loca is greater than or equal the value at locb and writes 1 if this is true into locc. If this condition is false it should write 0 into locc. If we assume that there is one more memory location (locd) we can use: sbn locc, #1, #0, i3 ; locc = 1 ; assume that A is GT B sbn locd, locb, loca, greater ; locc = B-A notgt sbn locc, #0, #0, greater ; locc = 0 greater If we want to avoid accessing any other memory location: sbn locc, #1, #0, i3 ; locc = 1 ; assume that A is GT B sbn locb, loca, locb, notgt ; locb = A - B sbn locc, #1, #0, notgt ; locc = 1 notgt sbn locb, locb, loca, i4 ; locb = (A B) A = -B i4 sbn locb, #0, locb, i5 ; locb = #0 (-B) = B i5 ECE243 Midterm pg 11 of 12 Feb. 2005

12 Use this page for extra work Results Bonus Total ECE243 Midterm pg 12 of 12 Feb. 2005