General Purpose Timers. Chapter 15
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1 General Purpose Timers Chapter
2 Timer Free-run counter (independent of processor) Functions Input capture Output compare Pulse-width modulation (PWM) generation
3 Block Diagram
4 Timer: Clock Reload Value ARR Reload f CL_PSC clock PSC Prescaler f CL_CNT Timer ISR Interrupt! "#_"%& =! "(_)*" +,- +
5 Timer: Output Reload Value ARR Reload f CL_PSC clock PSC Prescaler f CL_CNT Timer ISR Interrupt = Timer Output (OCREF) Compare & Capture Register (CCR)
6 Timer: Input Capture Reload Value ARR Reload f CL_PSC clock PSC Prescaler f CL_CNT Timer ISR Interrupt Compare & Capture Register (CCR)
7 Multi-Channel Outputs Each timer has four channels. Each channel has its own Compare and Capture Register. CCR, CCR, CCR, CCR. These four channels share the timer counter Compare & Capture Register (CCR) 7
8 GP Timer Block Diagram ARR (Autoloaded Register)
9 Output Compare Output Compare Mode (OCM) Timer Output (OCREF) Frozen High ifcnt==ccr Low if CNT == CCR Toggle ifcnt== CCR Forced low (alwayslow) Forced high (alwayshigh) 9
10 Counting up, down, center,,,,,,,..,,,,,,,.,,,,,,,,,,
11 PWM Mode Mode < Reference Reference PWM mode (Low True) PWM mode (High True) Active Inactive Inactive Active
12 Edge-aligned Mode (Up-counting) ARR =, RCR = clock counter overflow overflow overflow overflow Update event (UEV) Period = ( + ARR) * Clock Period = 7 * Clock Period RCR=Repetition
13 Edge-aligned Mode (down-counting) ARR =, RCR = Clock underflow underflow underflow underflow Update event (UEV) Period = ( + ARR) * Clock Period = 7 * Clock Period
14 Center-aligned Mode ARR =, RCR = Clock overflow underflow overflow underflow Update event (UEV) Period = * ARR * Clock Period = * Clock Period
15 PWM Mode (Low-True) Upcounting mode, ARR =, CCR =, RCR = Mode Timer Output = High if counter < CCR Low if counter CCR Clock CCR = OCREF Duty Cycle = CCR ARR + Period = ( + ARR) * Clock Period = 7 * Clock Period = 7
16 PWM Mode (High-True) Upcounting mode, ARR =, CCR =, RCR = Mode Timer Output = Low if counter < CCR High if counter CCR Clock CCR = OCREF Duty Cycle = - = 7 CCR ARR + Period = ( + ARR) * Clock Period = 7 * Clock Period
17 PWM Mode (High-True) Upcounting mode, ARR =, CCR =, RCR = Mode Timer Output = Low if counter < CCR High if counter CCR Clock CCR = OCREF Duty Cycle = - = 7 CCR ARR + Period = ( + ARR) * Clock Period = 7 * Clock Period 7
18 PWM Mode (High-True) Center-aligned mode, ARR =, CCR =, RCR = Mode Timer Output = Low if counter < CCR High if counter CCR Clock CCR = OCREF Duty Cycle = - = CCR ARR Period = * ARR * Clock Period = * Clock Period 8
19 PWM Mode (High-True) Center-aligned mode, ARR =, CCR =, RCR = Mode Timer Output = Low if counter < CCR High if counter CCR Clock CCR = OCREF Duty Cycle = - = CCR ARR Period = * ARR * Clock Period = * Clock Period 9
20 Up-Counting: Left Edge-aligned Upcounting mode, ARR =, CCR =, RCR = Clock CCR = CCR = CCR = OCREF CCR = OCREF All rising edges occur at the same time! Left-aligned PWM Period
21 PWM Mode : Right Edge-aligned Upcounting mode, ARR =, CCR =, RCR = Clock CCR = CCR = OCREF CCR = OCREF CCR = All falling edges occur at the same time! Right-aligned PWM Period
22 PWM Mode : Center Aligned Timer Output = Low if counter < CCR High if counter CCR Center-aligned mode, ARR =, CCR =, RCR = Clock CCR = CCR = OCREF CCR = OCREF CCR = PWM signals are center aligned! Center-aligned PWM Period
23 The devil is in the detail Timer output control Enable Timer Output MOE: Main output enable OSSI: Off-state selection for Idle mode OSSR: Off-state selection for Run mode CCxE: Enable of capture/compare output for channel x CCxNE: Enable of capture/compare complementary output for channel x
24 Input Capture Monitor both rising and falling edge
25 Input Capture Monitor only rising edges or only falling edge
26 Input Capture
27 Input Filtering 7
28 Input Capture Diagram 8
29 Ultrasonic Distance Sensor!"#$%&'( = *+,&-./"."( ((- + +,&- = 789: ;<=> ;=?@ AB CDEF GHD?/B J = *+,&-./"."( µ# 8 9
30 Ultrasonic Distance Sensor The echo pulse width corresponds to round-trip time.!"#$%&'( ('*) = -./#( "$h (#) 8 or!"#$%&'( ("&'h) = -./#( "$h (#) 8 If pulse width is 8ms, no obstacle is detected.
31 Ultrasonic Distance Sensor
32 Later
33 Repetition Register (PCR)
34 Repetition Register (PCR)
35 Repetition Register (RCR)
36 Repetition Register (PCR)
37 Repetition Register (PCR) 7
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